自学教程：C++ ssbi_write函数代码示例

// kmj_el15.pm8901_patchint pm8901_preload_dVdd(void){	int rc;	u8 reg;	if (pmic_chip == NULL) {		pr_err("%s: Error: PMIC 8901 driver has not probed/n",			__func__);		return -ENODEV;	}	reg = 0x0F;	rc = ssbi_write(pmic_chip->dev, 0x0BD, &reg, 1);	if (rc)		pr_err("%s: ssbi_write failed for 0x0BD, rc=%d/n", __func__,			rc);	reg = 0xB4;	rc = ssbi_write(pmic_chip->dev, 0x001, &reg, 1);	if (rc)		pr_err("%s: ssbi_write failed for 0x001, rc=%d/n", __func__,			rc);	pr_info("%s: dVdd preloaded/n", __func__);	return rc;}

static int pm8921_writeb(const struct device *dev, u16 addr, u8 val){	const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);	const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;	return ssbi_write(pmic->dev->parent, addr, &val, 1);}

static int pm8058_masked_write(u16 addr, u8 val, u8 mask){	int rc;	u8 reg;	if (pmic_chip == NULL)		return -ENODEV;	rc = ssbi_read(pmic_chip->dev, addr, &reg, 1);	if (rc) {		pr_err("%s: ssbi_read(0x%03X) failed: rc=%d/n", __func__, addr,			rc);		goto done;	}	reg &= ~mask;	reg |= val & mask;	rc = ssbi_write(pmic_chip->dev, addr, &reg, 1);	if (rc)		pr_err("%s: ssbi_write(0x%03X)=0x%02X failed: rc=%d/n",			__func__, addr, reg, rc);done:	return rc;}

int pm8058_reset_pwr_off(int reset){	int		rc;	u8		pon;	unsigned long	irqsave;	if (pmic_chip == NULL)		return -ENODEV;	spin_lock_irqsave(&pmic_chip->pm_lock, irqsave);	rc = ssbi_read(pmic_chip->dev, SSBI_REG_ADDR_PON_CNTL_1, &pon, 1);	if (rc) {		pr_err("%s: FAIL ssbi_read(0x%x): rc=%d/n",		       __func__, SSBI_REG_ADDR_PON_CNTL_1, rc);		goto get_out;	}	pon &= ~PM8058_PON_WD_EN_MASK;	pon |= reset ? PM8058_PON_WD_EN_RESET : PM8058_PON_WD_EN_PWR_OFF;	rc = ssbi_write(pmic_chip->dev, SSBI_REG_ADDR_PON_CNTL_1, &pon, 1);	if (rc) {		pr_err("%s: FAIL ssbi_write(0x%x)=0x%x: rc=%d/n",		       __func__, SSBI_REG_ADDR_PON_CNTL_1, pon, rc);		goto get_out;	}get_out:	spin_unlock_irqrestore(&pmic_chip->pm_lock, irqsave);	return rc;}

int pm8058_misc_control(struct pm8058_chip *chip, int mask, int flag){	int		rc;	u8		misc;	if (chip == NULL)		chip = pmic_chip;	/* for calls from non child */	if (chip == NULL)		return -ENODEV;	mutex_lock(&chip->pm_lock);	rc = ssbi_read(chip->dev, SSBI_REG_ADDR_MISC, &misc, 1);	if (rc) {		pr_err("%s: FAIL ssbi_read(0x%x): rc=%d/n",		       __func__, SSBI_REG_ADDR_MISC, rc);		goto get_out;	}	misc &= ~mask;	misc |= flag;	rc = ssbi_write(chip->dev, SSBI_REG_ADDR_MISC, &misc, 1);	if (rc) {		pr_err("%s: FAIL ssbi_write(0x%x)=0x%x: rc=%d/n",		       __func__, SSBI_REG_ADDR_MISC, misc, rc);		goto get_out;	}get_out:	mutex_unlock(&chip->pm_lock);	return rc;}

int pm8058_write(struct pm8058_chip *chip, u16 addr, u8 *values,		 unsigned int len){	if (chip == NULL)		return -EINVAL;	return ssbi_write(chip->dev, addr, values, len);}

static int pm8921_write_buf(const struct device *dev, u16 addr, u8 *buf,									int cnt){	const struct pm8xxx_drvdata *pm8921_drvdata = dev_get_drvdata(dev);	const struct pm8921 *pmic = pm8921_drvdata->pm_chip_data;	return ssbi_write(pmic->dev->parent, addr, buf, cnt);}

/* Internal functions */static inline intpm8901_config_irq(struct pm8901_chip *chip, u8 *bp, u8 *cp){	int	rc;	rc = ssbi_write(chip->dev, SSBI_REG_ADDR_IRQ_BLK_SEL, bp, 1);	if (rc) {		pr_err("%s: ssbi_write: rc=%d (Select block)/n",			__func__, rc);		goto bail_out;	}	rc = ssbi_write(chip->dev, SSBI_REG_ADDR_IRQ_CONFIG, cp, 1);	if (rc)		pr_err("%s: ssbi_write: rc=%d (Configure IRQ)/n",			__func__, rc);bail_out:	return rc;}

int pm8058_irq_get_rt_status(struct pm8058_chip *chip, int irq){	int     rc;	u8      block, bits, bit;#ifdef CONFIG_MSM8X60_SSBI	unsigned long irqsave;#endif	if (chip == NULL || irq < chip->pdata.irq_base ||			irq >= chip->pdata.irq_base + MAX_PM_IRQ)		return -EINVAL;	irq -= chip->pdata.irq_base;	block = irq / 8;	bit = irq % 8;#ifdef CONFIG_MSM8X60_SSBI	spin_lock_irqsave(&chip->pm_lock, irqsave);#else	mutex_lock(&chip->pm_lock);#endif	rc = ssbi_write(chip->dev, SSBI_REG_ADDR_IRQ_BLK_SEL, &block, 1);	if (rc) {		pr_err("%s: FAIL ssbi_write(): rc=%d (Select Block)/n",				__func__, rc);		goto bail_out;	}	rc = ssbi_read(chip->dev, SSBI_REG_ADDR_IRQ_RT_STATUS, &bits, 1);	if (rc) {		pr_err("%s: FAIL ssbi_read(): rc=%d (Read RT Status)/n",				__func__, rc);		goto bail_out;	}	rc = (bits & (1 << bit)) ? 1 : 0;bail_out:#ifdef CONFIG_MSM8X60_SSBI	spin_unlock_irqrestore(&chip->pm_lock, irqsave);#else	mutex_unlock(&chip->pm_lock);#endif	return rc;}

/* Helper Functions */DEFINE_RATELIMIT_STATE(pm8058_msg_ratelimit, 60 * HZ, 10);static inline int pm8058_can_print(void){	return __ratelimit(&pm8058_msg_ratelimit);}#ifdef CONFIG_MSM8X60_SSBI#define ssbi_write(client, addr, buf, len) /	msm_ssbi_write(pmic_chip->id, addr, buf, len)#define ssbi_read(client, addr, buf, len) /	msm_ssbi_read(pmic_chip->id, addr, buf, len)#else /*CONFIG_MSM8X60_SSBI*/static inline intssbi_write(struct i2c_client *client, u16 addr, const u8 *buf, size_t len){	int	rc;	struct	i2c_msg msg = {		.addr           = addr,		.flags          = 0x0,		.buf            = (u8 *)buf,		.len            = len,	};	rc = i2c_transfer(client->adapter, &msg, 1);	return (rc == 1) ? 0 : rc;}static inline intssbi_read(struct i2c_client *client, u16 addr, u8 *buf, size_t len){	int	rc;	struct	i2c_msg msg = {		.addr           = addr,		.flags          = I2C_M_RD,		.buf            = buf,		.len            = len,	};	rc = i2c_transfer(client->adapter, &msg, 1);	return (rc == 1) ? 0 : rc;}#endif/*CONFIG_MSM8X60_SSBI*/static int pm8058_masked_write(u16 addr, u8 val, u8 mask){	int rc;	u8 reg;#ifndef CONFIG_MACH_VERDI_LTE //[Puccini] QCT patch: SMPS actvie pull-down#ifdef CONFIG_MSM8X60_SSBI	unsigned long irqsave;#endif#endif // !CONFIG_MACH_VERDI_LTE	if (pmic_chip == NULL)		return -ENODEV;#ifndef CONFIG_MACH_VERDI_LTE //[Puccini] QCT patch: SMPS actvie pull-down#ifdef CONFIG_MSM8X60_SSBI	spin_lock_irqsave(&pmic_chip->pm_lock, irqsave);#else	mutex_lock(&pmic_chip->pm_lock);#endif#endif // !CONFIG_MACH_VERDI_LTE	rc = ssbi_read(pmic_chip->dev, addr, &reg, 1);	if (rc) {		pr_err("%s: ssbi_read(0x%03X) failed: rc=%d/n", __func__, addr,			rc);		goto done;	}	reg &= ~mask;	reg |= val & mask;	rc = ssbi_write(pmic_chip->dev, addr, &reg, 1);	if (rc)		pr_err("%s: ssbi_write(0x%03X)=0x%02X failed: rc=%d/n",			__func__, addr, reg, rc);done:#ifndef CONFIG_MACH_VERDI_LTE //[Puccini] QCT patch: SMPS actvie pull-down#ifdef CONFIG_MSM8X60_SSBI	spin_unlock_irqrestore(&pmic_chip->pm_lock, irqsave);#else	mutex_unlock(&pmic_chip->pm_lock);#endif#endif // !CONFIG_MACH_VERDI_LTE	return rc;}

/* External APIs */int pm8058_rev(struct pm8058_chip *chip){	if (chip == NULL)		return -EINVAL;	return chip->revision;}EXPORT_SYMBOL(pm8058_rev);int pm8058_irq_get_rt_status(struct pm8058_chip *chip, int irq){	int     rc;	u8      block, bits, bit;#ifdef CONFIG_MSM8X60_SSBI	unsigned long irqsave;#endif	if (chip == NULL || irq < chip->pdata.irq_base ||			irq >= chip->pdata.irq_base + MAX_PM_IRQ)		return -EINVAL;	irq -= chip->pdata.irq_base;	block = irq / 8;	bit = irq % 8;#ifdef CONFIG_MSM8X60_SSBI	spin_lock_irqsave(&chip->pm_lock, irqsave);#else	mutex_lock(&chip->pm_lock);#endif	rc = ssbi_write(chip->dev, SSBI_REG_ADDR_IRQ_BLK_SEL, &block, 1);	if (rc) {		pr_err("%s: FAIL ssbi_write(): rc=%d (Select Block)/n",				__func__, rc);		goto bail_out;	}	rc = ssbi_read(chip->dev, SSBI_REG_ADDR_IRQ_RT_STATUS, &bits, 1);	if (rc) {		pr_err("%s: FAIL ssbi_read(): rc=%d (Read RT Status)/n",				__func__, rc);		goto bail_out;	}	rc = (bits & (1 << bit)) ? 1 : 0;bail_out:#ifdef CONFIG_MSM8X60_SSBI	spin_unlock_irqrestore(&chip->pm_lock, irqsave);#else	mutex_unlock(&chip->pm_lock);#endif	return rc;}EXPORT_SYMBOL(pm8058_irq_get_rt_status);#ifdef CONFIG_MSM8X60_SSBIint pm8058_read(struct pm8058_chip *chip, u16 addr, u8 *values,		unsigned int len){	int rc;	unsigned long irqsave;	if (chip == NULL)		return -EINVAL;	spin_lock_irqsave(&chip->pm_lock, irqsave);	rc = ssbi_read(chip->dev, addr, values, len);	spin_unlock_irqrestore(&chip->pm_lock, irqsave);	return rc;}EXPORT_SYMBOL(pm8058_read);int pm8058_write(struct pm8058_chip *chip, u16 addr, u8 *values,		 unsigned int len){	int rc;	unsigned long irqsave;	if (chip == NULL)		return -EINVAL;	spin_lock_irqsave(&chip->pm_lock, irqsave);	rc = ssbi_write(chip->dev, addr, values, len);	spin_unlock_irqrestore(&chip->pm_lock, irqsave);	return rc;}EXPORT_SYMBOL(pm8058_write);#elseint pm8058_read(struct pm8058_chip *chip, u16 addr, u8 *values,		unsigned int len){	if (chip == NULL)		return -EINVAL;//.........这里部分代码省略.........

static inline intpm8901_read_block(struct pm8901_chip *chip, u8 *bp, u8 *ip){	int	rc;	rc = ssbi_write(chip->dev, SSBI_REG_ADDR_IRQ_BLK_SEL, bp, 1);	if (rc) {		pr_err("%s: FAIL ssbi_write(): rc=%d (Select Block)/n",		       __func__, rc);		*bp = 0;		goto bail_out;	}	rc = ssbi_read(chip->dev, SSBI_REG_ADDR_IRQ_IT_STATUS, ip, 1);	if (rc)		pr_err("%s: FAIL ssbi_read(): rc=%d (Read Status)/n",		       __func__, rc);bail_out:	return rc;}

int pm8058_irq_get_rt_status(struct pm8058_chip *chip, int irq){	int     rc;	u8      block, bits, bit;	if (chip == NULL || irq < chip->pdata.irq_base ||			irq >= chip->pdata.irq_base + MAX_PM_IRQ)		return -EINVAL;	irq -= chip->pdata.irq_base;	block = irq / 8;	bit = irq % 8;	mutex_lock(&chip->pm_lock);	rc = ssbi_write(chip->dev, SSBI_REG_ADDR_IRQ_BLK_SEL, &block, 1);	if (rc) {		pr_err("%s: FAIL ssbi_write(): rc=%d (Select Block)/n",				__func__, rc);		goto bail_out;	}	rc = ssbi_read(chip->dev, SSBI_REG_ADDR_IRQ_RT_STATUS, &bits, 1);	if (rc) {		pr_err("%s: FAIL ssbi_read(): rc=%d (Read RT Status)/n",				__func__, rc);		goto bail_out;	}	rc = (bits & (1 << bit)) ? 1 : 0;bail_out:	mutex_unlock(&chip->pm_lock);	return rc;}

/* * Set an SMPS regulator to be disabled in its CTRL register, but enabled * in the master enable register.  Also set it's pull down enable bit. * Take care to make sure that the output voltage doesn't change if switching * from advanced mode to legacy mode. */static int disable_smps_locally_set_pull_down(u16 ctrl_addr, u16 test2_addr,		u16 master_enable_addr, u8 master_enable_bit){	int rc = 0;	u8 vref_sel, vlow_sel, band, vprog, bank, reg;	if (pmic_chip == NULL)		return -ENODEV;	bank = REGULATOR_BANK_SEL(7);	rc = ssbi_write(pmic_chip->dev, test2_addr, &bank, 1);	if (rc) {		pr_err("%s: FAIL ssbi_write(0x%03X): rc=%d/n", __func__,			test2_addr, rc);		goto done;	}	rc = ssbi_read(pmic_chip->dev, test2_addr, &reg, 1);	if (rc) {		pr_err("%s: FAIL pm8058_read(0x%03X): rc=%d/n",		       __func__, test2_addr, rc);		goto done;	}	/* Check if in advanced mode. */	if ((reg & SMPS_ADVANCED_MODE_MASK) == SMPS_ADVANCED_MODE) {		/* Determine current output voltage. */		rc = ssbi_read(pmic_chip->dev, ctrl_addr, &reg, 1);		if (rc) {			pr_err("%s: FAIL pm8058_read(0x%03X): rc=%d/n",			       __func__, ctrl_addr, rc);			goto done;		}		band = (reg & SMPS_ADVANCED_BAND_MASK)			>> SMPS_ADVANCED_BAND_SHIFT;		switch (band) {		case 3:			vref_sel = 0;			vlow_sel = 0;			break;		case 2:			vref_sel = SMPS_LEGACY_VREF_SEL;			vlow_sel = 0;			break;		case 1:			vref_sel = SMPS_LEGACY_VREF_SEL;			vlow_sel = SMPS_LEGACY_VLOW_SEL;			break;		default:			pr_err("%s: regulator already disabled/n", __func__);			return -EPERM;		}		vprog = (reg & SMPS_ADVANCED_VPROG_MASK);		/* Round up if fine step is in use. */		vprog = (vprog + 1) >> 1;		if (vprog > SMPS_LEGACY_VPROG_MASK)			vprog = SMPS_LEGACY_VPROG_MASK;		/* Set VLOW_SEL bit. */		bank = REGULATOR_BANK_SEL(1);		rc = ssbi_write(pmic_chip->dev, test2_addr, &bank, 1);		if (rc) {			pr_err("%s: FAIL ssbi_write(0x%03X): rc=%d/n",			       __func__, test2_addr, rc);			goto done;		}		rc = pm8058_masked_write(test2_addr,			REGULATOR_BANK_WRITE | REGULATOR_BANK_SEL(1)				| vlow_sel,			REGULATOR_BANK_WRITE | REGULATOR_BANK_MASK				| SMPS_LEGACY_VLOW_SEL);		if (rc)			goto done;		/* Switch to legacy mode */		bank = REGULATOR_BANK_SEL(7);		rc = ssbi_write(pmic_chip->dev, test2_addr, &bank, 1);		if (rc) {			pr_err("%s: FAIL ssbi_write(0x%03X): rc=%d/n", __func__,				test2_addr, rc);			goto done;		}		rc = pm8058_masked_write(test2_addr,				REGULATOR_BANK_WRITE | REGULATOR_BANK_SEL(7)					| SMPS_LEGACY_MODE,				REGULATOR_BANK_WRITE | REGULATOR_BANK_MASK					| SMPS_ADVANCED_MODE_MASK);		if (rc)			goto done;		/* Enable locally, enable pull down, keep voltage the same. */		rc = pm8058_masked_write(ctrl_addr,			REGULATOR_ENABLE | REGULATOR_PULL_DOWN_EN//.........这里部分代码省略.........

static long ftr_ioctl(struct file *file,	unsigned int cmd, unsigned long arg){	unsigned int __user *argp = (unsigned int __user *) arg;	struct ftr_dev_file_info *pdfi =		(struct ftr_dev_file_info *) file->private_data;	struct ftr_dev_node_info *pdev;	if (pdfi->ftrid < 0 || pdfi->ftrid >= RFIC_DEVICE_NUM)		return -EINVAL;	pdev = ftr_dev_info + pdfi->ftrid;	switch (cmd) {	case RFIC_IOCTL_READ_REGISTER:		{		    int ret = 0;		    unsigned int rficaddr;		    u8 value = 0;		    if (get_user(rficaddr, argp))			return -EFAULT;		    mutex_lock(&pdev->lock);		    if (((pdfi->ftrid == 1) || (pdfi->ftrid == 2))				&& (rfbid < RF_TYPE_48)) {			__raw_writel(				pdev->busselect[RFIC_FTR_GET_BUS(rficaddr)],				pdev->grfcctrladdr);			mb();		    }		    ret = ssbi_read(pdev->dev->parent,			RFIC_FTR_GET_ADDR(rficaddr), &value, 1);		    mutex_unlock(&pdev->lock);		    if (ret)			return ret;		    if (put_user(value, argp))			return -EFAULT;}	break;	case RFIC_IOCTL_WRITE_REGISTER:		{		    int ret;		    struct rfic_write_register_param param;		    unsigned int rficaddr;		    u8 value;		    if (copy_from_user(&param, argp, sizeof(param)))			return -EFAULT;		    rficaddr = param.rficaddr;		    value = (u8) param.value;		    mutex_lock(&pdev->lock);		    if (((pdfi->ftrid == 1) || (pdfi->ftrid == 2))				&& (rfbid < RF_TYPE_48)) {			__raw_writel(				pdev->busselect[RFIC_FTR_GET_BUS(rficaddr)],				pdev->grfcctrladdr);			mb();		    }		    ret = ssbi_write(pdev->dev->parent,			RFIC_FTR_GET_ADDR(rficaddr), &value, 1);		    mutex_unlock(&pdev->lock);		    if (ret)			return ret;		}		break;	case RFIC_IOCTL_WRITE_REGISTER_WITH_MASK:		{			int ret;			struct rfic_write_register_mask_param param;			unsigned int rficaddr;			u8 value;			if (copy_from_user(&param, argp, sizeof(param)))				return -EFAULT;			rficaddr = param.rficaddr;			mutex_lock(&pdev->lock);			if (((pdfi->ftrid == 1) || (pdfi->ftrid == 2))				&& (rfbid < RF_TYPE_48)) {				__raw_writel(				pdev->busselect[RFIC_FTR_GET_BUS(rficaddr)],				pdev->grfcctrladdr);				mb();			}//.........这里部分代码省略.........

//.........这里部分代码省略.........			pdm_mtr_enable();			pr_info("%s: MTR PDM Enabled/n", __func__);		} else if ((rfbid > RF_TYPE_16) && (rfbid < RF_TYPE_32)) {			fsm9900_rfic_init();			pdm_enable();			pr_info("%s: PDM Enabled/n", __func__);		} else if ((rfbid > RF_TYPE_32) && (rfbid < RF_TYPE_48)) {			fsm9900_gluon_init();			pr_info("%s: Gluon Enabled/n", __func__);		} else {			pr_warn("%s:PDMs not configured %d/n",					__func__, rfbid);		}	}	ptr = ftr_dev_info + n_dev;	ptr->dev = &pdev->dev;	if ((n_dev >= 1)  && (n_dev <= 7)) {		struct ssbi *ssbi =		platform_get_drvdata(to_platform_device(pdev->dev.parent));		if ((rfbid > RF_TYPE_48) && (n_dev <= 4)) {			ssbi->controller_type =				FSM_SBI_CTRL_GENI_SSBI2_ARBITER;			set_ssbi_mode_2(ssbi->base);			pr_debug("%s: SSBI2 = 0x%x/n", __func__,				ssbi->controller_type);			rfic_pvc_enable(ssbi->base, 3);		} else {			ssbi->controller_type =				FSM_SBI_CTRL_GENI_SSBI_ARBITER;			set_ssbi_mode_1(ssbi->base);			pr_debug("%s: SSBI1 = 0x%x/n", __func__,				ssbi->controller_type);			if ((n_dev == 1) || (n_dev == 2))				rfic_pvc_enable(ssbi->base, 1);			if ((n_dev == 3) && (rfbid > RF_TYPE_16)					&& (rfbid < RF_TYPE_32))				rfic_pvc_enable(ssbi->base, 2);		}		platform_set_drvdata(to_platform_device(pdev->dev.parent),				ssbi);	}	if ((rfbid > RF_TYPE_16) && (rfbid < RF_TYPE_48) && (n_dev == 1)) {		ssbi_write(pdev->dev.parent, 0xff, &version, 1);		ssbi_read(pdev->dev.parent, 0x2, &version, 1);		pr_info("%s: FTR1 Version = %02x/n", __func__, version);		ptr->grfcctrladdr = grfc_base + 0x10; /* grp 4 */		ptr->grfcmaskaddr = grfc_base + 0x30;		__raw_writel(0x00001800, ptr->grfcmaskaddr);		ptr->maskvalue = 0x00001800;		ptr->busselect[TX1_BUS] = 0x00000000;		ptr->busselect[TX2_BUS] = 0x00001000;		ptr->busselect[MISC_BUS] = 0x00000800;		ptr->busselect[RX_BUS] = 0x00001800;	} else if ((rfbid > RF_TYPE_16) && (rfbid < RF_TYPE_48) &&		(n_dev == 2)) {		ssbi_write(pdev->dev.parent, 0xff, &version, 1);		ssbi_read(pdev->dev.parent, 0x2, &version, 1);		pr_info("%s: FTR2 Version = %02x/n", __func__, version);		ptr->grfcctrladdr = grfc_base + 0x14; /* grp 5*/		ptr->grfcmaskaddr = grfc_base + 0x34;		__raw_writel(0x00000600, ptr->grfcmaskaddr);		ptr->maskvalue = 0x00000600;		ptr->busselect[TX1_BUS] = 0x000000;		ptr->busselect[TX2_BUS] = 0x00000400;		ptr->busselect[MISC_BUS] = 0x00000200;		ptr->busselect[RX_BUS] = 0x00000600;	}	mutex_init(&ptr->lock);	if (rfbid < RF_TYPE_48) {		ret = misc_register(ftr_misc_dev + n_dev);		if (ret < 0) {			misc_deregister(ftr_misc_dev + n_dev);			mutex_unlock(&rficlock);			return ret;		}	} else {		ret = misc_register(mtr_misc_dev + n_dev);		if (ret < 0) {			misc_deregister(mtr_misc_dev + n_dev);			mutex_unlock(&rficlock);			return ret;		}	}	n_dev++;	pr_debug("%s: num_of_ssbi_devices = %d/n", __func__, n_dev);	mutex_unlock(&rficlock);	return of_platform_populate(np, NULL, NULL, &pdev->dev);}

int pm8058_reset_pwr_off(int reset){	int		rc;	u8		pon;	u8		ctrl;	u8		smpl;	if (pmic_chip == NULL)		return -ENODEV;	mutex_lock(&pmic_chip->pm_lock);	/* Set regulator L22 to 1.225V in high power mode. */	rc = ssbi_read(pmic_chip->dev, SSBI_REG_ADDR_L22_CTRL, &ctrl, 1);	if (rc) {		pr_err("%s: FAIL ssbi_read(0x%x): rc=%d/n", __func__,			SSBI_REG_ADDR_L22_CTRL, rc);		goto get_out3;	}	/* Leave pull-down state intact. */	ctrl &= 0x40;	ctrl |= 0x93;	rc = ssbi_write(pmic_chip->dev, SSBI_REG_ADDR_L22_CTRL, &ctrl, 1);	if (rc)		pr_err("%s: FAIL ssbi_write(0x%x)=0x%x: rc=%d/n", __func__,			SSBI_REG_ADDR_L22_CTRL, ctrl, rc);get_out3:	if (!reset) {		/* Only modify the SLEEP_CNTL reg if shutdown is desired. */		rc = ssbi_read(pmic_chip->dev, SSBI_REG_ADDR_SLEEP_CNTL,			       &smpl, 1);		if (rc) {			pr_err("%s: FAIL ssbi_read(0x%x): rc=%d/n",			       __func__, SSBI_REG_ADDR_SLEEP_CNTL, rc);			goto get_out2;		}		smpl &= ~PM8058_SLEEP_SMPL_EN_MASK;		smpl |= PM8058_SLEEP_SMPL_EN_PWR_OFF;		rc = ssbi_write(pmic_chip->dev, SSBI_REG_ADDR_SLEEP_CNTL,				&smpl, 1);		if (rc)			pr_err("%s: FAIL ssbi_write(0x%x)=0x%x: rc=%d/n",			       __func__, SSBI_REG_ADDR_SLEEP_CNTL, smpl, rc);	}get_out2:	rc = ssbi_read(pmic_chip->dev, SSBI_REG_ADDR_PON_CNTL_1, &pon, 1);	if (rc) {		pr_err("%s: FAIL ssbi_read(0x%x): rc=%d/n",		       __func__, SSBI_REG_ADDR_PON_CNTL_1, rc);		goto get_out;	}	pon &= ~PM8058_PON_WD_EN_MASK;	pon |= reset ? PM8058_PON_WD_EN_RESET : PM8058_PON_WD_EN_PWR_OFF;	rc = ssbi_write(pmic_chip->dev, SSBI_REG_ADDR_PON_CNTL_1, &pon, 1);	if (rc) {		pr_err("%s: FAIL ssbi_write(0x%x)=0x%x: rc=%d/n",		       __func__, SSBI_REG_ADDR_PON_CNTL_1, pon, rc);		goto get_out;	}get_out:	mutex_unlock(&pmic_chip->pm_lock);	return rc;}