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本文整理汇总了C++中sysclk_init函数的典型用法代码示例。如果您正苦于以下问题:C++ sysclk_init函数的具体用法?C++ sysclk_init怎么用?C++ sysclk_init使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。 在下文中一共展示了sysclk_init函数的24个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于我们的系统推荐出更棒的C++代码示例。 示例1: mainint main(void){ board_init(); sysclk_init(); adc_init(); //Offset is stored in EEPROM int adc_offset = 0; if (nvm_eeprom_read_byte(EEPROM_ADDR_ID) == EEPROM_ID){ adc_offset = nvm_eeprom_read_byte(EEPROM_ADDR_OFFSET_POS) - nvm_eeprom_read_byte(EEPROM_ADDR_OFFSET_NEG); } PORTE_DIRSET = MASK_DIGIT012; PORTD_DIRSET = 0xFF; int32_t i = 0; uint8_t disp = 0; uint8_t adccnt = 0; unsigned int adc_readings[AVG_READINGS]; //Setup ADC hardware adc_init(); //Main loop...measure VCC-INT while(1){ // Vref = 2.048V // 4096 count ADC (12-bit) // 2.048V / 4096count = 0.0005 V/Count // We want i to be result in mV // = 0.5 mV/count //So divide count by 2 to get mV reading if (adccnt < AVG_READINGS){ adc_readings[adccnt] = adc_get_unsigned_result(&MY_ADC, MY_ADC_CH); if (adc_readings[adccnt] < 0){ adc_readings[adccnt] = 0; } adccnt++; } else { int32_t adctemp = 0; for (adccnt = 0; adccnt < AVG_READINGS; adccnt++){ adctemp += (int32_t)(adc_readings[adccnt] + adc_offset); } i = adctemp / AVG_READINGS; //Limit negative values to 0 //i = i - 2048; if (i < 0) i = 0; i = i / 2; adccnt = 0; } //Switch between mV and V ranges if (i > 999){ if (disp == 0){ display((i / 10)%10, 0, 2); _delay_ms(2); } else if (disp == 1){ display((i / 100) % 10, 0, 1); _delay_ms(2); } else { display(i / 1000, 1, 0); _delay_ms(2); } } else { if (disp == 0){ display(i % 10, 0, 2); _delay_ms(2); } else if (disp == 1){ display((i / 10) % 10, 0, 1); _delay_ms(2); } else { display(i / 100, 0, 0); _delay_ms(2); } } disp++; if (disp > 2){ disp = 0; } adc_start_conversion(&MY_ADC, MY_ADC_CH); }}
开发者ID:FrankMuenzner,项目名称:chipwhisperer,代码行数:87,
示例2: main/** * /brief ACC example application entry point. * * /return Unused (ANSI-C compatibility). */int main(void){ uint8_t uc_key; int16_t s_volt = 0; uint32_t ul_value = 0; volatile uint32_t ul_status = 0x0; int32_t l_volt_dac0 = 0; /* Initialize the system */ sysclk_init(); board_init(); /* Initialize debug console */ configure_console(); /* Output example information */ puts(STRING_HEADER); /* Initialize DACC */ /* Enable clock for DACC */ pmc_enable_periph_clk(ID_DACC); /* Reset DACC registers */ dacc_reset(DACC); /* External trigger mode disabled. DACC in free running mode. */ dacc_disable_trigger(DACC); /* Half word transfer mode */ dacc_set_transfer_mode(DACC, 0); /* Power save: * sleep mode - 0 (disabled) * fast wake-up - 0 (disabled) */ dacc_set_power_save(DACC, 0, 0); /* Timing: * refresh - 0x08 (1024*8 dacc clocks) * max speed mode - 0 (disabled) * startup time - 0xf (960 dacc clocks) */ dacc_set_timing(DACC, 0x08, 0, 0xf); /* Disable TAG and select output channel DACC_CHANNEL */ dacc_set_channel_selection(DACC, DACC_CHANNEL_0); /* Enable output channel DACC_CHANNEL */ dacc_enable_channel(DACC, DACC_CHANNEL_0); /* Setup analog current */ dacc_set_analog_control(DACC, DACC_ANALOG_CONTROL); /* Set DAC0 output at ADVREF/2. The DAC formula is: * * (5/6 * VOLT_REF) - (1/6 * VOLT_REF) volt - (1/6 * VOLT_REF) * ----------------------------------- = -------------------------- * MAX_DIGITAL digit * * Here, digit = MAX_DIGITAL/2 */ dacc_write_conversion_data(DACC, MAX_DIGITAL / 2); l_volt_dac0 = (MAX_DIGITAL / 2) * (2 * VOLT_REF / 3) / MAX_DIGITAL + VOLT_REF / 6; /* Initialize ADC */ /* Enable clock for ADC */ pmc_enable_periph_clk(ID_ADC); /* * Formula: ADCClock = MCK / ( (PRESCAL+1) * 2 ) * For example, MCK = 64MHZ, PRESCAL = 4, then: * ADCClock = 64 / ((4+1) * 2) = 6.4MHz; */ adc_init(ADC, sysclk_get_cpu_hz(), ADC_CLOCK, ADC_STARTUP_TIME_SETTING); /* Formula: * Startup Time = startup value / ADCClock * Transfer Time = (TRANSFER * 2 + 3) / ADCClock * Tracking Time = (TRACKTIM + 1) / ADCClock * Settling Time = settling value / ADCClock * For example, ADC clock = 6MHz (166.7 ns) * Startup time = 512 / 6MHz = 85.3 us * Transfer Time = (1 * 2 + 3) / 6MHz = 833.3 ns * Tracking Time = (0 + 1) / 6MHz = 166.7 ns * Settling Time = 3 / 6MHz = 500 ns */ /* Set ADC timing */ adc_configure_timing(ADC, ADC_TRACK_SETTING, ADC_SETTLING_TIME_3, ADC_TRANSFER_SETTING); /* Channel 5 has to be compared */ adc_enable_channel(ADC, ADC_CHANNEL_5); //! [acc_enable_clock] /** Enable clock for ACC */ pmc_enable_periph_clk(ID_ACC); //! [acc_enable_clock] //! [acc_init] /** Initialize ACC */ acc_init(ACC, ACC_MR_SELPLUS_AD5, ACC_MR_SELMINUS_DAC0, ACC_MR_EDGETYP_ANY, ACC_MR_INV_DIS); //! [acc_init]//.........这里部分代码省略.........
开发者ID:InSoonPark,项目名称:asf,代码行数:101,
示例3: main/** * /brief Application entry point for PARC example. * * /return Unused (ANSI-C compatibility). */int main(void){ uint32_t uc_key; /* Initialize the SAM system. */ sysclk_init(); board_init(); /* Configure UART for debug message output. */ configure_console(); parc_port_source_simulation_config(); //! [parc_variables] struct parc_module module_inst; struct parc_config config; //! [parc_variables] /* Output example information. */ puts(STRING_HEADER); /* Configure TC. */ configure_tc(); /* Start timer. */ tc_start(TC0, 0); //! [parc_get_defaults] // Get default configuration parc_get_config_defaults(&config); //! [parc_get_defaults] printf("Press y to sample the data when both data enable pins are enabled./r/n"); printf("Press n to sample the data, don't care the status of the data enable pins./r/n"); uc_key = 0; while ((uc_key != 'y') && (uc_key != 'n')) { usart_read(CONF_UART, &uc_key); } if (uc_key == 'y') { /* Sample the data when both data enable pins are enabled. */ config.smode = PARC_SMODE_PCEN1_AND_PCEN2_H; ioport_set_pin_level(PIN_PCEN1_INPUT, IOPORT_PIN_LEVEL_HIGH); ioport_set_pin_level(PIN_PCEN2_INPUT, IOPORT_PIN_LEVEL_HIGH); printf("Receive data when both data enable pins are enabled./r/n"); } else { /* Sample the data, don't care the status of the data enable pins. */ config.smode = PARC_SMODE_ALWAYS; printf("Receive data, don't care the status of the data enable pins./r/n"); } printf("Press y to sample all the data./r/n"); printf("Press n to sample the data only one out of two./r/n"); uc_key = 0; while ((uc_key != 'y') && (uc_key != 'n')) { usart_read(CONF_UART, &uc_key); } if (uc_key == 'y') { /* Sample all the data. */ config.capture_mode = PARC_BOTH_CAPTURE; printf("All data are sampled./r/n"); } else { /* Sample the data only one out of two. */ config.capture_mode = PARC_EVEN_CAPTURE; printf("Only one out of two data is sampled, with an even index./r/n"); } //! [parc_init_enable_and_start] //! [parc_init_enable_and_start_1] // Initialize PARC. parc_init(&module_inst, PARC, &config); //! [parc_init_enable_and_start_1] //! [parc_init_enable_and_start_2] // Enable the PARC parc_enable(&module_inst); // Start capture. parc_start_capture(&module_inst); //! [parc_init_enable_and_start_2] //! [parc_init_enable_and_start] /* Enable PDCA module clock */ pdca_enable(PDCA); /* Init PDCA channel with the pdca_options.*/ pdca_channel_set_config(PDCA_PARC_CHANNEL, &PDCA_PARC_OPTIONS); /* Set callback for PDCA interrupt. */ pdca_channel_set_callback(PDCA_PARC_CHANNEL, pdca_parc_callback,PDCA_0_IRQn,1,PDCA_IER_RCZ); /* Enable PDCA channel, start receiving data. */ pdca_channel_enable(PDCA_PARC_CHANNEL); /* Start read PARC data capture via PDCA. */ pdca_channel_write_load(PDCA_PARC_CHANNEL, (void *)gs_puc_buffer, BUFFER_SIZE); /* Main loop. */ while(1) { }//.........这里部分代码省略.........
开发者ID:InSoonPark,项目名称:asf,代码行数:101,
示例4: main/** * /brief Run usb device cdc unit tests * * Initializes the clock system, board and serial output, then sets up the * usb unit test suite and runs it. */int main(void){ const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; sysclk_init(); irq_initialize_vectors(); cpu_irq_enable(); // Initialize the sleep manager sleepmgr_init(); board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); // Define all the timestamp to date test cases DEFINE_TEST_CASE(usb_cdc_test, NULL, run_usb_cdc_test, NULL, "USB Device cdc enumeration test"); DEFINE_TEST_CASE(usb_cdc_config_test, NULL, run_usb_cdc_config_test, NULL, "USB CDC configuration test"); DEFINE_TEST_CASE(usb_vbus_test, NULL, run_usb_vbus_test, NULL, "USB vbus event test"); DEFINE_TEST_CASE(usb_resume_test, NULL, run_usb_resume_test, NULL, "USB resume event test"); DEFINE_TEST_CASE(usb_suspend_test, NULL, run_usb_suspend_test, NULL, "USB suspend event test"); DEFINE_TEST_CASE(usb_sof_test, NULL, run_usb_sof_test, NULL, "USB sof event test"); // Put test case addresses in an array DEFINE_TEST_ARRAY(usb_cdc_tests) = { &usb_cdc_test, &usb_cdc_config_test, &usb_vbus_test, &usb_resume_test, &usb_suspend_test, &usb_sof_test, }; // Define the test suite DEFINE_TEST_SUITE(usb_cdc_suite, usb_cdc_tests, "Common usb CDC service with test suite"); // The unit test prints message via UART which does not support deep sleep mode.#if SAM sleepmgr_lock_mode(SLEEPMGR_ACTIVE);#else sleepmgr_lock_mode(SLEEPMGR_IDLE);#endif // Run all tests in the suite test_suite_run(&usb_cdc_suite); while (1) { // Intentionally left empty. }}
开发者ID:kerichsen,项目名称:asf,代码行数:73,
示例5: mainint main(void){ sysclk_init(); board_init(); /* Enable one wait state for flash access */ flashcalw_set_wait_state(1); /* * Configure systick for 200ms (CPU frequency / 5) at startup time. * * Note: CPU frequency will be changed with below clock switching. */ if (SysTick_Config(sysclk_get_cpu_hz() / 5)) { while (1) { /* Capture error */ } } while (1) { struct dfll_config dcfg; struct pll_config pcfg; /* avoid Cppcheck Warning */ UNUSED(pcfg); /* * Initial state: Running from RC80M with all * prescalers set to 2 (Divide frequency by 4). */ wait_for_switches(); /* * Divide CPU frequency by 8. This will make the LED * blink half as fast. */ sysclk_set_prescalers(3, 3, 3, 3, 3); wait_for_switches(); /* * Switch to the DFLL running at ~48 MHz in Open Loop * mode, with the CPU running at ~48 MHz. */ dfll_config_init_open_loop_mode(&dcfg); dfll_config_tune_for_target_hz(&dcfg, 48000000); dfll_enable_open_loop(&dcfg, 0); sysclk_set_prescalers(1, 1, 1, 1, 1); sysclk_set_source(SYSCLK_SRC_DFLL); osc_disable(OSC_ID_RC80M); wait_for_switches(); /* * Switch to the slow clock with all prescalers * disabled. */ sysclk_set_source(SYSCLK_SRC_RCSYS); sysclk_set_prescalers(0, 0, 0, 0, 0); dfll_disable_open_loop(0); wait_for_switches(); /* * Switch to the RCFAST clock with all prescalers * disabled. */ osc_enable(OSC_ID_RCFAST); sysclk_set_prescalers(0, 0, 0, 0, 0); osc_wait_ready(OSC_ID_RCFAST); sysclk_set_source(SYSCLK_SRC_RCFAST); wait_for_switches(); /* * Switch to the RC1M clock with all prescalers * disabled. */ osc_enable(OSC_ID_RC1M); sysclk_set_prescalers(0, 0, 0, 0, 0); osc_wait_ready(OSC_ID_RC1M); sysclk_set_source(SYSCLK_SRC_RC1M); osc_disable(OSC_ID_RCFAST); wait_for_switches(); /* * Switch to external OSC0, if available. */#ifdef BOARD_OSC0_HZ osc_enable(OSC_ID_OSC0); osc_wait_ready(OSC_ID_OSC0); sysclk_set_source(SYSCLK_SRC_OSC0); osc_disable(OSC_ID_RC1M); wait_for_switches(); /* * Switch to PLL0 running at 96 MHz. Use OSC0 as the * source */ pll_config_init(&pcfg, PLL_SRC_OSC0, 1, 96000000 / BOARD_OSC0_HZ); pll_enable(&pcfg, 0); sysclk_set_prescalers(2, 2, 2, 2, 2); pll_wait_for_lock(0); sysclk_set_source(SYSCLK_SRC_PLL0); wait_for_switches();//.........这里部分代码省略.........
开发者ID:Timvrakas,项目名称:samd21_gcc,代码行数:101,
示例6: mainint main(void){ enum sleepmgr_mode current_sleep_mode = SLEEPMGR_ACTIVE; uint32_t ast_counter = 0; /* * Initialize the synchronous clock system to the default configuration * set in conf_clock.h. * /note All non-essential peripheral clocks are initially disabled. */ sysclk_init(); /* * Initialize the resources used by this example to the default * configuration set in conf_board.h */ board_init(); /* * Turn the activity status LED on to inform the user that the device * is active. */ ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_ON); osc_priv_enable_osc32(); /* Enable the AST clock. */ sysclk_enable_pba_module(SYSCLK_AST); /* Initialize the AST in Counter mode. */ ast_init_counter(AST, AST_OSC_1KHZ, AST_PSEL_32KHZ_1HZ - 6, ast_counter); /* * Configure the AST to wake up the CPU when the counter reaches the * selected periodic0 value. */ ast_set_periodic0_value(AST,AST_PSEL_32KHZ_1HZ - 3); ast_enable_periodic_interrupt(AST,0); ast_enable_periodic_async_wakeup(AST,0); ast_enable_periodic0(AST); ast_clear_periodic_status_flag(AST,0); NVIC_ClearPendingIRQ(AST_PER_IRQn); NVIC_EnableIRQ(AST_PER_IRQn); /* Enable the AST. */ ast_enable(AST); /* AST can wakeup the device */ bpm_enable_wakeup_source(BPM, (1 << BPM_BKUPWEN_AST)); // Initialize the sleep manager, lock initial mode. sleepmgr_init(); sleepmgr_lock_mode(current_sleep_mode); while (1) { /* * Turn the activity status LED off to inform the user that the * device is in a sleep mode. */ ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_OFF); /* * Go to sleep in the deepest allowed sleep mode (i.e. no * deeper than the currently locked sleep mode). */ sleepmgr_enter_sleep(); /* * Turn the activity status LED on to inform the user that the * device is active. */ ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_ON); /* Unlock the current sleep mode. */ sleepmgr_unlock_mode(current_sleep_mode); /* Add a 3s delay. */ delay_s(3); /* Lock the next sleep mode. */ ++current_sleep_mode; if ((current_sleep_mode >= SLEEPMGR_NR_OF_MODES)) { current_sleep_mode = SLEEPMGR_ACTIVE; } sleepmgr_lock_mode(current_sleep_mode); }}
开发者ID:XingchangYang,项目名称:sam4l_android_accessory,代码行数:89,
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