自学教程：C++ to_mdp_kms函数代码示例

void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc){	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));	mdp4_enable(mdp4_kms);	mdp_update_vblank_mask(to_mdp_kms(kms),			mdp4_crtc_vblank(crtc), false);	mdp4_disable(mdp4_kms);}

int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc){	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	mdp5_enable(mdp5_kms);	mdp_update_vblank_mask(to_mdp_kms(kms),			mdp5_crtc_vblank(crtc), true);	mdp5_disable(mdp5_kms);	return 0;}

static inlinestruct mdp5_kms *get_kms(struct mdp5_ctl_manager *ctl_mgr){	struct msm_drm_private *priv = ctl_mgr->dev->dev_private;	return to_mdp5_kms(to_mdp_kms(priv->kms));}

void mdp5_irq_uninstall(struct msm_kms *kms){	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	mdp5_enable(mdp5_kms);	mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);	mdp5_disable(mdp5_kms);}

struct mdp5_state *mdp5_get_state(struct drm_atomic_state *s){	struct msm_drm_private *priv = s->dev->dev_private;	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(priv->kms));	struct msm_kms_state *state = to_kms_state(s);	struct mdp5_state *new_state;	int ret;	if (state->state)		return state->state;	ret = drm_modeset_lock(&mdp5_kms->state_lock, s->acquire_ctx);	if (ret)		return ERR_PTR(ret);	new_state = kmalloc(sizeof(*mdp5_kms->state), GFP_KERNEL);	if (!new_state)		return ERR_PTR(-ENOMEM);	/* Copy state: */	new_state->hwpipe = mdp5_kms->state->hwpipe;	new_state->hwmixer = mdp5_kms->state->hwmixer;	if (mdp5_kms->smp)		new_state->smp = mdp5_kms->state->smp;	state->state = new_state;	return new_state;}

void mdp4_irq_uninstall(struct msm_kms *kms){	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));	mdp4_enable(mdp4_kms);	mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);	mdp4_disable(mdp4_kms);}

void mdp5_irq_preinstall(struct msm_kms *kms){	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	mdp5_enable(mdp5_kms);	mdp5_write(mdp5_kms, REG_MDP5_MDP_INTR_CLEAR(0), 0xffffffff);	mdp5_write(mdp5_kms, REG_MDP5_MDP_INTR_EN(0), 0x00000000);	mdp5_disable(mdp5_kms);}

static void mdp5_preclose(struct msm_kms *kms, struct drm_file *file){	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	struct msm_drm_private *priv = mdp5_kms->dev->dev_private;	unsigned i;	for (i = 0; i < priv->num_crtcs; i++)		mdp5_crtc_cancel_pending_flip(priv->crtcs[i], file);}

static void mdp4_destroy(struct msm_kms *kms){	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));	if (mdp4_kms->blank_cursor_iova)		msm_gem_put_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id);	if (mdp4_kms->blank_cursor_bo)		drm_gem_object_unreference_unlocked(mdp4_kms->blank_cursor_bo);	kfree(mdp4_kms);}

static void mdp5_complete_commit(struct msm_kms *kms, struct drm_atomic_state *state){	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	struct device *dev = &mdp5_kms->pdev->dev;	if (mdp5_kms->smp)		mdp5_smp_complete_commit(mdp5_kms->smp, &mdp5_kms->state->smp);	pm_runtime_put_sync(dev);}

static void mdp5_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *state){	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	struct device *dev = &mdp5_kms->pdev->dev;	struct mdp5_global_state *global_state;	global_state = mdp5_get_existing_global_state(mdp5_kms);	pm_runtime_get_sync(dev);	if (mdp5_kms->smp)		mdp5_smp_prepare_commit(mdp5_kms->smp, &global_state->smp);}

static void mdp4_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *state){	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));	int i;	struct drm_crtc *crtc;	struct drm_crtc_state *crtc_state;	mdp4_enable(mdp4_kms);	/* see 119ecb7fd */	for_each_new_crtc_in_state(state, crtc, crtc_state, i)		drm_crtc_vblank_get(crtc);}

int mdp4_irq_postinstall(struct msm_kms *kms){	struct mdp_kms *mdp_kms = to_mdp_kms(kms);	struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);	struct mdp_irq *error_handler = &mdp4_kms->error_handler;	error_handler->irq = mdp4_irq_error_handler;	error_handler->irqmask = MDP4_IRQ_PRIMARY_INTF_UDERRUN |			MDP4_IRQ_EXTERNAL_INTF_UDERRUN;	mdp_irq_register(mdp_kms, error_handler);	return 0;}

static void mdp4_complete_commit(struct msm_kms *kms, struct drm_atomic_state *state){	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));	int i, ncrtcs = state->dev->mode_config.num_crtc;	/* see 119ecb7fd */	for (i = 0; i < ncrtcs; i++) {		struct drm_crtc *crtc = state->crtcs[i];		if (!crtc)			continue;		drm_crtc_vblank_put(crtc);	}	mdp4_disable(mdp4_kms);}

static void mdp4_complete_commit(struct msm_kms *kms, struct drm_atomic_state *state){	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));	int i;	struct drm_crtc *crtc;	struct drm_crtc_state *crtc_state;	drm_atomic_helper_wait_for_vblanks(mdp4_kms->dev, state);	/* see 119ecb7fd */	for_each_new_crtc_in_state(state, crtc, crtc_state, i)		drm_crtc_vblank_put(crtc);	mdp4_disable(mdp4_kms);}

static void mdp5_complete_commit(struct msm_kms *kms, struct drm_atomic_state *state){	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	struct device *dev = &mdp5_kms->pdev->dev;	struct mdp5_global_state *global_state;	drm_atomic_helper_wait_for_vblanks(mdp5_kms->dev, state);	global_state = mdp5_get_existing_global_state(mdp5_kms);	if (mdp5_kms->smp)		mdp5_smp_complete_commit(mdp5_kms->smp, &global_state->smp);	pm_runtime_put_sync(dev);}

static void mdp4_destroy(struct msm_kms *kms){	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));	struct msm_mmu *mmu = mdp4_kms->mmu;	if (mmu) {		mmu->funcs->detach(mmu, iommu_ports, ARRAY_SIZE(iommu_ports));		mmu->funcs->destroy(mmu);	}	if (mdp4_kms->blank_cursor_iova)		msm_gem_put_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id);	if (mdp4_kms->blank_cursor_bo)		drm_gem_object_unreference_unlocked(mdp4_kms->blank_cursor_bo);	kfree(mdp4_kms);}

int mdp5_irq_postinstall(struct msm_kms *kms){	struct mdp_kms *mdp_kms = to_mdp_kms(kms);	struct mdp5_kms *mdp5_kms = to_mdp5_kms(mdp_kms);	struct mdp_irq *error_handler = &mdp5_kms->error_handler;	error_handler->irq = mdp5_irq_error_handler;	error_handler->irqmask = MDP5_IRQ_INTF0_UNDER_RUN |			MDP5_IRQ_INTF1_UNDER_RUN |			MDP5_IRQ_INTF2_UNDER_RUN |			MDP5_IRQ_INTF3_UNDER_RUN;	mdp_irq_register(mdp_kms, error_handler);	return 0;}

static int smp_show(struct seq_file *m, void *arg){	struct drm_info_node *node = (struct drm_info_node *) m->private;	struct drm_device *dev = node->minor->dev;	struct msm_drm_private *priv = dev->dev_private;	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(priv->kms));	struct drm_printer p = drm_seq_file_printer(m);	if (!mdp5_kms->smp) {		drm_printf(&p, "no SMP pool/n");		return 0;	}	mdp5_smp_dump(mdp5_kms->smp, &p);	return 0;}

/* * This acquires the modeset lock set aside for global state, creates * a new duplicated private object state. */struct mdp5_global_state *mdp5_get_global_state(struct drm_atomic_state *s){	struct msm_drm_private *priv = s->dev->dev_private;	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(priv->kms));	struct drm_private_state *priv_state;	int ret;	ret = drm_modeset_lock(&mdp5_kms->glob_state_lock, s->acquire_ctx);	if (ret)		return ERR_PTR(ret);	priv_state = drm_atomic_get_private_obj_state(s, &mdp5_kms->glob_state);	if (IS_ERR(priv_state))		return ERR_CAST(priv_state);	return to_mdp5_global_state(priv_state);}

static void mdp5_complete_commit(struct msm_kms *kms, struct drm_atomic_state *state){	int i;	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	int nplanes = mdp5_kms->dev->mode_config.num_total_plane;	for (i = 0; i < nplanes; i++) {		struct drm_plane *plane = state->planes[i];		struct drm_plane_state *plane_state = state->plane_states[i];		if (!plane)			continue;		mdp5_plane_complete_commit(plane, plane_state);	}	mdp5_disable(mdp5_kms);}

static void mdp5_kms_destroy(struct msm_kms *kms){	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	struct msm_gem_address_space *aspace = kms->aspace;	int i;	for (i = 0; i < mdp5_kms->num_hwmixers; i++)		mdp5_mixer_destroy(mdp5_kms->hwmixers[i]);	for (i = 0; i < mdp5_kms->num_hwpipes; i++)		mdp5_pipe_destroy(mdp5_kms->hwpipes[i]);	if (aspace) {		aspace->mmu->funcs->detach(aspace->mmu,				iommu_ports, ARRAY_SIZE(iommu_ports));		msm_gem_address_space_put(aspace);	}}

static int mdp5_hw_init(struct msm_kms *kms){	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	struct device *dev = &mdp5_kms->pdev->dev;	unsigned long flags;	pm_runtime_get_sync(dev);	/* Magic unknown register writes:	 *	 *    W VBIF:0x004 00000001      (mdss_mdp.c:839)	 *    W MDP5:0x2e0 0xe9          (mdss_mdp.c:839)	 *    W MDP5:0x2e4 0x55          (mdss_mdp.c:839)	 *    W MDP5:0x3ac 0xc0000ccc    (mdss_mdp.c:839)	 *    W MDP5:0x3b4 0xc0000ccc    (mdss_mdp.c:839)	 *    W MDP5:0x3bc 0xcccccc      (mdss_mdp.c:839)	 *    W MDP5:0x4a8 0xcccc0c0     (mdss_mdp.c:839)	 *    W MDP5:0x4b0 0xccccc0c0    (mdss_mdp.c:839)	 *    W MDP5:0x4b8 0xccccc000    (mdss_mdp.c:839)	 *	 * Downstream fbdev driver gets these register offsets/values	 * from DT.. not really sure what these registers are or if	 * different values for different boards/SoC's, etc.  I guess	 * they are the golden registers.	 *	 * Not setting these does not seem to cause any problem.  But	 * we may be getting lucky with the bootloader initializing	 * them for us.  OTOH, if we can always count on the bootloader	 * setting the golden registers, then perhaps we don't need to	 * care.	 */	spin_lock_irqsave(&mdp5_kms->resource_lock, flags);	mdp5_write(mdp5_kms, REG_MDP5_DISP_INTF_SEL, 0);	spin_unlock_irqrestore(&mdp5_kms->resource_lock, flags);	mdp5_ctlm_hw_reset(mdp5_kms->ctlm);	pm_runtime_put_sync(dev);	return 0;}

static void mdp4_destroy(struct msm_kms *kms){	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));	struct device *dev = mdp4_kms->dev->dev;	struct msm_gem_address_space *aspace = kms->aspace;	if (mdp4_kms->blank_cursor_iova)		msm_gem_put_iova(mdp4_kms->blank_cursor_bo, kms->aspace);	drm_gem_object_put_unlocked(mdp4_kms->blank_cursor_bo);	if (aspace) {		aspace->mmu->funcs->detach(aspace->mmu,				iommu_ports, ARRAY_SIZE(iommu_ports));		msm_gem_address_space_put(aspace);	}	if (mdp4_kms->rpm_enabled)		pm_runtime_disable(dev);	kfree(mdp4_kms);}

static void mdp5_destroy(struct msm_kms *kms){	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	struct msm_mmu *mmu = mdp5_kms->mmu;	mdp5_irq_domain_fini(mdp5_kms);	if (mmu) {		mmu->funcs->detach(mmu, iommu_ports, ARRAY_SIZE(iommu_ports));		mmu->funcs->destroy(mmu);	}	if (mdp5_kms->ctlm)		mdp5_ctlm_destroy(mdp5_kms->ctlm);	if (mdp5_kms->smp)		mdp5_smp_destroy(mdp5_kms->smp);	if (mdp5_kms->cfg)		mdp5_cfg_destroy(mdp5_kms->cfg);	kfree(mdp5_kms);}

irqreturn_t mdp4_irq(struct msm_kms *kms){	struct mdp_kms *mdp_kms = to_mdp_kms(kms);	struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);	struct drm_device *dev = mdp4_kms->dev;	struct msm_drm_private *priv = dev->dev_private;	unsigned int id;	uint32_t status;	status = mdp4_read(mdp4_kms, REG_MDP4_INTR_STATUS);	mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, status);	VERB("status=%08x", status);	mdp_dispatch_irqs(mdp_kms, status);	for (id = 0; id < priv->num_crtcs; id++)		if (status & mdp4_crtc_vblank(priv->crtcs[id]))			drm_handle_vblank(dev, id);	return IRQ_HANDLED;}

irqreturn_t mdp5_irq(struct msm_kms *kms){	struct mdp_kms *mdp_kms = to_mdp_kms(kms);	struct mdp5_kms *mdp5_kms = to_mdp5_kms(mdp_kms);	uint32_t intr;	intr = mdp5_read(mdp5_kms, REG_MDSS_HW_INTR_STATUS);	VERB("intr=%08x", intr);	if (intr & MDSS_HW_INTR_STATUS_INTR_MDP) {		mdp5_irq_mdp(mdp_kms);		intr &= ~MDSS_HW_INTR_STATUS_INTR_MDP;	}	while (intr) {		irq_hw_number_t hwirq = fls(intr) - 1;		generic_handle_irq(irq_find_mapping(				mdp5_kms->irqcontroller.domain, hwirq));		intr &= ~(1 << hwirq);	}	return IRQ_HANDLED;}

static int mdp4_hw_init(struct msm_kms *kms){	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));	struct drm_device *dev = mdp4_kms->dev;	uint32_t version, major, minor, dmap_cfg, vg_cfg;	unsigned long clk;	int ret = 0;	pm_runtime_get_sync(dev->dev);	mdp4_enable(mdp4_kms);	version = mdp4_read(mdp4_kms, REG_MDP4_VERSION);	mdp4_disable(mdp4_kms);	major = FIELD(version, MDP4_VERSION_MAJOR);	minor = FIELD(version, MDP4_VERSION_MINOR);	DBG("found MDP4 version v%d.%d", major, minor);	if (major != 4) {		dev_err(dev->dev, "unexpected MDP version: v%d.%d/n",				major, minor);		ret = -ENXIO;		goto out;	}	mdp4_kms->rev = minor;	if (mdp4_kms->rev > 1) {		mdp4_write(mdp4_kms, REG_MDP4_CS_CONTROLLER0, 0x0707ffff);		mdp4_write(mdp4_kms, REG_MDP4_CS_CONTROLLER1, 0x03073f3f);	}	mdp4_write(mdp4_kms, REG_MDP4_PORTMAP_MODE, 0x3);	/* max read pending cmd config, 3 pending requests: */	mdp4_write(mdp4_kms, REG_MDP4_READ_CNFG, 0x02222);	clk = clk_get_rate(mdp4_kms->clk);	if ((mdp4_kms->rev >= 1) || (clk >= 90000000)) {		dmap_cfg = 0x47;     /* 16 bytes-burst x 8 req */		vg_cfg = 0x47;       /* 16 bytes-burs x 8 req */	} else {		dmap_cfg = 0x27;     /* 8 bytes-burst x 8 req */		vg_cfg = 0x43;       /* 16 bytes-burst x 4 req */	}	DBG("fetch config: dmap=%02x, vg=%02x", dmap_cfg, vg_cfg);	mdp4_write(mdp4_kms, REG_MDP4_DMA_FETCH_CONFIG(DMA_P), dmap_cfg);	mdp4_write(mdp4_kms, REG_MDP4_DMA_FETCH_CONFIG(DMA_E), dmap_cfg);	mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(VG1), vg_cfg);	mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(VG2), vg_cfg);	mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(RGB1), vg_cfg);	mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(RGB2), vg_cfg);	if (mdp4_kms->rev >= 2)		mdp4_write(mdp4_kms, REG_MDP4_LAYERMIXER_IN_CFG_UPDATE_METHOD, 1);	mdp4_write(mdp4_kms, REG_MDP4_LAYERMIXER_IN_CFG, 0);	/* disable CSC matrix / YUV by default: */	mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(VG1), 0);	mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(VG2), 0);	mdp4_write(mdp4_kms, REG_MDP4_DMA_P_OP_MODE, 0);	mdp4_write(mdp4_kms, REG_MDP4_DMA_S_OP_MODE, 0);	mdp4_write(mdp4_kms, REG_MDP4_OVLP_CSC_CONFIG(1), 0);	mdp4_write(mdp4_kms, REG_MDP4_OVLP_CSC_CONFIG(2), 0);	if (mdp4_kms->rev > 1)		mdp4_write(mdp4_kms, REG_MDP4_RESET_STATUS, 1);	dev->mode_config.allow_fb_modifiers = true;out:	pm_runtime_put_sync(dev->dev);	return ret;}

void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc){	mdp_update_vblank_mask(to_mdp_kms(kms),			mdp4_crtc_vblank(crtc), false);}

static struct mdp5_kms *get_kms(struct drm_encoder *encoder){	struct msm_drm_private *priv = encoder->dev->dev_private;	return to_mdp5_kms(to_mdp_kms(priv->kms));}