自学教程：C++ to_s3c函数代码示例

/* sdhci_cmu_set_clock - callback on clock change.*/static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock){	struct sdhci_s3c *ourhost = to_s3c(host);	/* don't bother if the clock is going off */	if (clock == 0)		return;	sdhci_s3c_set_clock(host, clock);	clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);	host->clock = clock;}

/** * sdhci_s3c_get_min_clock - callback to get minimal supported clock value * @host: The SDHCI host being queried * * To init mmc host properly a minimal clock value is needed. For high system * bus clock's values the standard formula gives values out of allowed range. * The clock still can be set to lower values, if clock source other then * system bus is selected.*/static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host){	struct sdhci_s3c *ourhost = to_s3c(host);	unsigned int delta, min = UINT_MAX;	int src;	for (src = 0; src < MAX_BUS_CLK; src++) {		delta = sdhci_s3c_consider_clock(ourhost, src, 0);		if (delta == UINT_MAX)			continue;		/* delta is a negative value in this case */		if (-delta < min)			min = -delta;	}	return min;}

/** * sdhci_s3c_set_clock - callback on clock change * @host: The SDHCI host being changed * @clock: The clock rate being requested. * * When the card's clock is going to be changed, look at the new frequency * and find the best clock source to go with it.*/static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock){	struct sdhci_s3c *ourhost = to_s3c(host);	unsigned int best = UINT_MAX;	unsigned int delta;	int best_src = 0;	int src;	u32 ctrl;	/* don't bother if the clock is going off. */	if (clock == 0)		return;	for (src = 0; src < MAX_BUS_CLK; src++) {		delta = sdhci_s3c_consider_clock(ourhost, src, clock);		if (delta < best) {			best = delta;			best_src = src;		}	}	dev_dbg(&ourhost->pdev->dev,		"selected source %d, clock %d, delta %d/n",		 best_src, clock, best);//printk("%s selected source %d, clock %d, delta %d/n", mmc_hostname(host->mmc), best_src, clock, best);	/* select the new clock source */	if (ourhost->cur_clk != best_src) {		struct clk *clk = ourhost->clk_bus[best_src];		/* turn clock off to card before changing clock source */		writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);		ourhost->cur_clk = best_src;		host->max_clk = clk_get_rate(clk);		host->timeout_clk = sdhci_s3c_get_timeout_clk(host);		ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);		ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;		ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;		writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);	}}

static void sdhci_s3c_set_ios(struct sdhci_host *host,			      struct mmc_ios *ios){	struct sdhci_s3c *ourhost = to_s3c(host);	struct s3c_sdhci_platdata *pdata = ourhost->pdata;	int width;	u8 tmp;	sdhci_s3c_check_sclk(host);	if (ios->power_mode != MMC_POWER_OFF) {		switch (ios->bus_width) {		case MMC_BUS_WIDTH_8:			width = 8;			tmp = readb(host->ioaddr + SDHCI_HOST_CONTROL);			writeb(tmp | SDHCI_S3C_CTRL_8BITBUS,				host->ioaddr + SDHCI_HOST_CONTROL);			break;		case MMC_BUS_WIDTH_4:			width = 4;			break;		case MMC_BUS_WIDTH_1:			width = 1;			break;		default:			BUG();		}		if (pdata->cfg_gpio)			pdata->cfg_gpio(ourhost->pdev, width);	}#ifdef CONFIG_S5PC110_DEMPSEY_BOARD	if (pdata->translate_vdd)		pdata->translate_vdd(ourhost->pdev, ios->vdd);#endif /* CONFIG_MACH_S5PC110_ARIES */	if (pdata->cfg_card) {		pdata->cfg_card(ourhost->pdev, host->ioaddr,				ios, host->mmc->card);		pdata->rx_cfg = 0;		pdata->tx_cfg = 0;	}}

/** * sdhci_s3c_get_min_clock - callback to get minimal supported clock value * @host: The SDHCI host being queried * * To init mmc host properly a minimal clock value is needed. For high system * bus clock's values the standard formula gives values out of allowed range. * The clock still can be set to lower values, if clock source other then * system bus is selected.*/static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host){	struct sdhci_s3c *ourhost = to_s3c(host);	unsigned int delta, min = UINT_MAX;	int src;	if(host->quirks & SDHCI_QUIRK_BROKEN_CLOCK_DIVIDER)		return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk],			400000);	for (src = 0; src < MAX_BUS_CLK; src++) {		delta = sdhci_s3c_consider_clock(ourhost, src, 0);		if (delta == UINT_MAX)			continue;		/* delta is a negative value in this case */		if (-delta < min)			min = -delta;	}	return min;}

static int sdhci_s3c_parse_dt(struct device *dev,		struct sdhci_host *host, struct s3c_sdhci_platdata *pdata){	struct device_node *node = dev->of_node;	struct sdhci_s3c *ourhost = to_s3c(host);	u32 max_width;	int gpio;	/* if the bus-width property is not specified, assume width as 1 */	if (of_property_read_u32(node, "bus-width", &max_width))		max_width = 1;	pdata->max_width = max_width;	/* get the card detection method */	if (of_get_property(node, "broken-cd", NULL)) {		pdata->cd_type = S3C_SDHCI_CD_NONE;		return 0;	}	if (of_get_property(node, "non-removable", NULL)) {		pdata->cd_type = S3C_SDHCI_CD_PERMANENT;		return 0;	}	gpio = of_get_named_gpio(node, "cd-gpios", 0);	if (gpio_is_valid(gpio)) {		pdata->cd_type = S3C_SDHCI_CD_GPIO;		pdata->ext_cd_gpio = gpio;		ourhost->ext_cd_gpio = -1;		if (of_get_property(node, "cd-inverted", NULL))			pdata->ext_cd_gpio_invert = 1;		return 0;	} else if (gpio != -ENOENT) {		dev_err(dev, "invalid card detect gpio specified/n");		return -EINVAL;	}	/* assuming internal card detect that will be configured by pinctrl */	pdata->cd_type = S3C_SDHCI_CD_INTERNAL;	return 0;}

static void sdhci_s3c_set_ios(struct sdhci_host *host,			      struct mmc_ios *ios){	struct sdhci_s3c *ourhost = to_s3c(host);	struct s3c_sdhci_platdata *pdata = ourhost->pdata;	int width;	u8 tmp;	sdhci_s3c_check_sclk(host);	if (ios->power_mode != MMC_POWER_OFF) {		switch (ios->bus_width) {		case MMC_BUS_WIDTH_8:			width = 8;			tmp = readb(host->ioaddr + SDHCI_HOST_CONTROL);			writeb(tmp | SDHCI_CTRL_8BITBUS,				host->ioaddr + SDHCI_HOST_CONTROL);			printk("%s: Enable 8Bit Data bus. ## ", mmc_hostname(host->mmc));			break;		case MMC_BUS_WIDTH_4:			width = 4;			break;		case MMC_BUS_WIDTH_1:			width = 1;			break;		default:			BUG();		}		if (pdata->cfg_gpio)			pdata->cfg_gpio(ourhost->pdev, width);	}	if (pdata->cfg_card)		pdata->cfg_card(ourhost->pdev, host->ioaddr,				ios, host->mmc->card);	mdelay(1);}

/* sdhci_cmu_set_clock - callback on clock change.*/static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock){	struct sdhci_s3c *ourhost = to_s3c(host);	struct device *dev = &ourhost->pdev->dev;	unsigned long timeout;	u16 clk = 0;	/* don't bother if the clock is going off */	if (clock == 0)		return;	sdhci_s3c_set_clock(host, clock);	clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);	host->clock = clock;	clk = SDHCI_CLOCK_INT_EN;	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);	/* Wait max 20 ms */	timeout = 20;	while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))		& SDHCI_CLOCK_INT_STABLE)) {		if (timeout == 0) {			dev_err(dev, "%s: Internal clock never stabilised./n",				mmc_hostname(host->mmc));			return;		}		timeout--;		mdelay(1);	}	clk |= SDHCI_CLOCK_CARD_EN;	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);}

/* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host){	struct sdhci_s3c *ourhost = to_s3c(host);	return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], UINT_MAX);}

/* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host){	struct sdhci_s3c *ourhost = to_s3c(host);	host->max_clk = clk_get_rate(to_clksrc(ourhost->clk_bus[0]->parent)->sources->sources[ourhost->cur_clk]);	return host->max_clk;//clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], UINT_MAX);}

/** * sdhci_s3c_set_clock - callback on clock change * @host: The SDHCI host being changed * @clock: The clock rate being requested. * * When the card's clock is going to be changed, look at the new frequency * and find the best clock source to go with it.*/static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock){	struct sdhci_s3c *ourhost = to_s3c(host);	unsigned int best = UINT_MAX;	unsigned int delta;	int best_src = 0;	int src;	u32 ctrl;	unsigned int timeout;	/* don't bother if the clock is going off. */	if (clock == 0) {		writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);		host->clock = clock;		return;	}	for (src = 0; src < MAX_BUS_CLK; src++) {		delta = sdhci_s3c_consider_clock(ourhost, src, clock);		if (delta < best) {			best = delta;			best_src = src;		}	}	dev_dbg(&ourhost->pdev->dev,		"selected source %d, clock %d, delta %d/n",		 best_src, clock, best);	/* select the new clock source */	if (ourhost->cur_clk != best_src) {		struct clk *clk = ourhost->clk_bus[best_src];		/* turn clock off to card before changing clock source */		writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);		ourhost->cur_clk = best_src;		host->max_clk = clk_get_rate(clk);		ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);		ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;		ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;		writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);	}	/* reconfigure the hardware for new clock rate */	{		struct mmc_ios ios;		ios.clock = clock;		if (ourhost->pdata->cfg_card)			(ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr,						   &ios, NULL);	}	if(host->quirks & SDHCI_QUIRK_BROKEN_CLOCK_DIVIDER) {		writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);		clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);		writew(SDHCI_CLOCK_INT_EN, host->ioaddr + SDHCI_CLOCK_CONTROL);		/* Wait max 20 ms */		timeout = 20;		while (!((sdhci_readw(host, SDHCI_CLOCK_CONTROL))			& SDHCI_CLOCK_INT_STABLE)) {			if (timeout == 0) {				printk(KERN_ERR "%s: Internal clock never "					"stabilised./n", mmc_hostname(host->mmc));				return;			}			timeout--;			mdelay(1);		}		writew(SDHCI_CLOCK_INT_EN | SDHCI_CLOCK_CARD_EN,				host->ioaddr + SDHCI_CLOCK_CONTROL);		host->clock = clock;	}}

static int __devinit sdhci_s3c_parse_dt(struct device *dev,		struct sdhci_host *host, struct s3c_sdhci_platdata *pdata){	struct device_node *node = dev->of_node;	struct sdhci_s3c *ourhost = to_s3c(host);	u32 max_width;	int gpio, cnt, ret;	/* if the bus-width property is not specified, assume width as 1 */	if (of_property_read_u32(node, "bus-width", &max_width))		max_width = 1;	pdata->max_width = max_width;	ourhost->gpios = devm_kzalloc(dev, NUM_GPIOS(pdata->max_width) *				sizeof(int), GFP_KERNEL);	if (!ourhost->gpios)		return -ENOMEM;	/* get the card detection method */	if (of_get_property(node, "broken-cd", 0)) {		pdata->cd_type = S3C_SDHCI_CD_NONE;		goto setup_bus;	}	if (of_get_property(node, "non-removable", 0)) {		pdata->cd_type = S3C_SDHCI_CD_PERMANENT;		goto setup_bus;	}	gpio = of_get_named_gpio(node, "cd-gpios", 0);	if (gpio_is_valid(gpio)) {		pdata->cd_type = S3C_SDHCI_CD_GPIO;		goto found_cd;	} else if (gpio != -ENOENT) {		dev_err(dev, "invalid card detect gpio specified/n");		return -EINVAL;	}	gpio = of_get_named_gpio(node, "samsung,cd-pinmux-gpio", 0);	if (gpio_is_valid(gpio)) {		pdata->cd_type = S3C_SDHCI_CD_INTERNAL;		goto found_cd;	} else if (gpio != -ENOENT) {		dev_err(dev, "invalid card detect gpio specified/n");		return -EINVAL;	}	dev_info(dev, "assuming no card detect line available/n");	pdata->cd_type = S3C_SDHCI_CD_NONE; found_cd:	if (pdata->cd_type == S3C_SDHCI_CD_GPIO) {		pdata->ext_cd_gpio = gpio;		ourhost->ext_cd_gpio = -1;		if (of_get_property(node, "cd-inverted", NULL))			pdata->ext_cd_gpio_invert = 1;	} else if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {		ret = gpio_request(gpio, "sdhci-cd");		if (ret) {			dev_err(dev, "card detect gpio request failed/n");			return -EINVAL;		}		ourhost->ext_cd_gpio = gpio;	} setup_bus:	/* get the gpios for command, clock and data lines */	for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) {		gpio = of_get_gpio(node, cnt);		if (!gpio_is_valid(gpio)) {			dev_err(dev, "invalid gpio[%d]/n", cnt);			goto err_free_dt_cd_gpio;		}		ourhost->gpios[cnt] = gpio;	}	for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) {		ret = gpio_request(ourhost->gpios[cnt], "sdhci-gpio");		if (ret) {			dev_err(dev, "gpio[%d] request failed/n", cnt);			goto err_free_dt_gpios;		}	}	return 0; err_free_dt_gpios:	while (--cnt >= 0)		gpio_free(ourhost->gpios[cnt]); err_free_dt_cd_gpio:	if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL)		gpio_free(ourhost->ext_cd_gpio);	return -EINVAL;}

/** * sdhci_s3c_set_clock - callback on clock change * @host: The SDHCI host being changed * @clock: The clock rate being requested. * * When the card's clock is going to be changed, look at the new frequency * and find the best clock source to go with it.*/static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock){	struct sdhci_s3c *ourhost = to_s3c(host);	unsigned int best = UINT_MAX;	unsigned int delta;	int best_src = 0;	int src;	u32 ctrl;	/* don't bother if the clock is going off. */	if (clock == 0)		return;	for (src = 0; src < MAX_BUS_CLK; src++) {		delta = sdhci_s3c_consider_clock(ourhost, src, clock);		if (delta < best) {			best = delta;			best_src = src;		}	}	dev_dbg(&ourhost->pdev->dev,		"selected source %d, clock %d, delta %d/n",		 best_src, clock, best);	/* select the new clock source */	if (ourhost->cur_clk != best_src) {		struct clk *clk = ourhost->clk_bus[best_src];		clk_prepare_enable(clk);		clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);		/* turn clock off to card before changing clock source */		writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);		ourhost->cur_clk = best_src;		host->max_clk = clk_get_rate(clk);		ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);		ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;		ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;		writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);	}	/* reprogram default hardware configuration */	writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,		host->ioaddr + S3C64XX_SDHCI_CONTROL4);	ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);	ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |		  S3C_SDHCI_CTRL2_ENFBCLKRX |		  S3C_SDHCI_CTRL2_DFCNT_NONE |		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);	/* reconfigure the controller for new clock rate */	ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);	if (clock < 25 * 1000000)		ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);}

static void sdhci_s3c_set_clock_src(struct sdhci_host *host, unsigned int clock){	struct sdhci_s3c *ourhost = to_s3c(host);	struct clk *clk_sclk_mmc = ourhost->clk_bus[0];//lisw sd : for different clk source structure	struct clksrc_clk *clksrc_parent = to_clksrc(clk_sclk_mmc->parent);	unsigned int best = UINT_MAX;	unsigned int delta;	int best_src = 0;	int src;	u32 ctrl;	/* don't bother if the clock is going off. */	if (clock == 0)		return;	if(MAX_BUS_CLK==1){				for (src = 6; src < clksrc_parent->sources->nr_sources; src++) {//lisw ms : set 6 as firsrt selection because XXTI 24Mhz is not stable		delta = sdhci_s3c_consider_clock(ourhost, src, clock);		if (delta < best) {			best = delta;			best_src = src;		}	}	}	else		return;		//printk("selected source %d, clock %d, delta %d/n",	//	 best_src, clock, best);	/* select the new clock source */	if (ourhost->cur_clk != best_src) {		struct clk *clk = clksrc_parent->sources->sources[best_src];		/* turn clock off to card before changing clock source */		writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);		ourhost->cur_clk = best_src;		host->max_clk = clk_get_rate(clk);	//	ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);	//	ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;	//	ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;	//	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);			//***use base clock select funtion in CMU instread in SD host controller***//		if (clk_set_parent(clk_sclk_mmc->parent, clk))		printk("Unable to set parent %s of clock %s./n",				 clk->name, clksrc_parent->clk.name);		clk_sclk_mmc->parent->parent = clk;					}//	s3c_setrate_clksrc_two_div(clk_sclk_mmc,clock);	/* reconfigure the hardware for new clock rate */	{		struct mmc_ios ios;		ios.clock = clock;		if (ourhost->pdata->cfg_card)			(ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr,						   &ios, NULL);	}}