自学教程：C++ to_uart_omap_port函数代码示例

static void serial_omap_unthrottle(struct uart_port *port){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned long flags;	pm_runtime_get_sync(up->dev);	spin_lock_irqsave(&up->port.lock, flags);	up->ier |= UART_IER_RLSI | UART_IER_RDI;	serial_out(up, UART_IER, up->ier);	spin_unlock_irqrestore(&up->port.lock, flags);	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);}

static void serial_omap_stop_tx(struct uart_port *port){	struct uart_omap_port *up = to_uart_omap_port(port);	pm_runtime_get_sync(up->dev);	if (up->ier & UART_IER_THRI) {		up->ier &= ~UART_IER_THRI;		serial_out(up, UART_IER, up->ier);	}	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);}

/* Enable or disable the rs485 support */static voidserial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned long flags;	unsigned int mode;	int val;	pm_runtime_get_sync(up->dev);	spin_lock_irqsave(&up->port.lock, flags);	/* Disable interrupts from this port */	mode = up->ier;	up->ier = 0;	serial_out(up, UART_IER, 0);	/* store new config */	up->rs485 = *rs485conf;	/*	 * Just as a precaution, only allow rs485	 * to be enabled if the gpio pin is valid	 */	if (gpio_is_valid(up->rts_gpio)) {		/* enable / disable rts */		val = (up->rs485.flags & SER_RS485_ENABLED) ?			SER_RS485_RTS_AFTER_SEND : SER_RS485_RTS_ON_SEND;		val = (up->rs485.flags & val) ? 1 : 0;		gpio_set_value(up->rts_gpio, val);	} else		up->rs485.flags &= ~SER_RS485_ENABLED;	/* Enable interrupts */	up->ier = mode;	serial_out(up, UART_IER, up->ier);	/* If RS-485 is disabled, make sure the THR interrupt is fired when	 * TX FIFO is below the trigger level.	 */	if (!(up->rs485.flags & SER_RS485_ENABLED) &&	    (up->scr & OMAP_UART_SCR_TX_EMPTY)) {		up->scr &= ~OMAP_UART_SCR_TX_EMPTY;		serial_out(up, UART_OMAP_SCR, up->scr);	}	spin_unlock_irqrestore(&up->port.lock, flags);	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);}

static unsigned int serial_omap_tx_empty(struct uart_port *port){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned long flags = 0;	unsigned int ret = 0;	pm_runtime_get_sync(up->dev);	dev_dbg(up->port.dev, "serial_omap_tx_empty+%d/n", up->port.line);	spin_lock_irqsave(&up->port.lock, flags);	ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;	spin_unlock_irqrestore(&up->port.lock, flags);	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);	return ret;}

static void serial_omap_break_ctl(struct uart_port *port, int break_state){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned long flags = 0;	dev_dbg(up->port.dev, "serial_omap_break_ctl+%d/n", up->port.line);	pm_runtime_get_sync(up->dev);	spin_lock_irqsave(&up->port.lock, flags);	if (break_state == -1)		up->lcr |= UART_LCR_SBC;	else		up->lcr &= ~UART_LCR_SBC;	serial_out(up, UART_LCR, up->lcr);	spin_unlock_irqrestore(&up->port.lock, flags);	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);}

static int serial_omap_poll_get_char(struct uart_port *port){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned int status;	pm_runtime_get_sync(up->dev);	status = serial_in(up, UART_LSR);	if (!(status & UART_LSR_DR)) {		status = NO_POLL_CHAR;		goto out;	}	status = serial_in(up, UART_RX);out:	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);	return status;}

static unsigned int serial_omap_get_mctrl(struct uart_port *port){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned int status;	unsigned int ret = 0;	pm_runtime_get_sync(up->dev);	status = check_modem_status(up);	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);	dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d/n", up->port.line);	if (status & UART_MSR_DCD)		ret |= TIOCM_CAR;	if (status & UART_MSR_RI)		ret |= TIOCM_RNG;	if (status & UART_MSR_DSR)		ret |= TIOCM_DSR;	if (status & UART_MSR_CTS)		ret |= TIOCM_CTS;	return ret;}

static voidserial_omap_pm(struct uart_port *port, unsigned int state,	       unsigned int oldstate){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned char efr;	dev_dbg(up->port.dev, "serial_omap_pm+%d/n", up->port.line);	pm_runtime_get_sync(up->dev);	serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);	efr = serial_in(up, UART_EFR);	serial_out(up, UART_EFR, efr | UART_EFR_ECB);	serial_out(up, UART_LCR, 0);	serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);	serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);	serial_out(up, UART_EFR, efr);	serial_out(up, UART_LCR, 0);	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);}

static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned char mcr = 0, old_mcr, lcr;	dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d/n", up->port.line);	if (mctrl & TIOCM_RTS)		mcr |= UART_MCR_RTS;	if (mctrl & TIOCM_DTR)		mcr |= UART_MCR_DTR;	if (mctrl & TIOCM_OUT1)		mcr |= UART_MCR_OUT1;	if (mctrl & TIOCM_OUT2)		mcr |= UART_MCR_OUT2;	if (mctrl & TIOCM_LOOP)		mcr |= UART_MCR_LOOP;	pm_runtime_get_sync(up->dev);	old_mcr = serial_in(up, UART_MCR);	old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 |		     UART_MCR_DTR | UART_MCR_RTS);	up->mcr = old_mcr | mcr;	serial_out(up, UART_MCR, up->mcr);	/* Turn off autoRTS if RTS is lowered; restore autoRTS if RTS raised */	lcr = serial_in(up, UART_LCR);	serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);	if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS))		up->efr |= UART_EFR_RTS;	else		up->efr &= UART_EFR_RTS;	serial_out(up, UART_EFR, up->efr);	serial_out(up, UART_LCR, lcr);	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);}

static void serial_omap_shutdown(struct uart_port *port){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned long flags = 0;	dev_dbg(up->port.dev, "serial_omap_shutdown+%d/n", up->port.line);	pm_runtime_get_sync(up->dev);	/*	 * Disable interrupts from this port	 */	up->ier = 0;	serial_out(up, UART_IER, 0);	spin_lock_irqsave(&up->port.lock, flags);	up->port.mctrl &= ~TIOCM_OUT2;	serial_omap_set_mctrl(&up->port, up->port.mctrl);	spin_unlock_irqrestore(&up->port.lock, flags);	/*	 * Disable break condition and FIFOs	 */	serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);	serial_omap_clear_fifos(up);	/*	 * Read data port to reset things, and then free the irq	 */	if (serial_in(up, UART_LSR) & UART_LSR_DR)		(void) serial_in(up, UART_RX);	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);	free_irq(up->port.irq, up);	if (up->wakeirq)		free_irq(up->wakeirq, up);}

static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned char mcr = 0, old_mcr;	dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d/n", up->port.line);	if (mctrl & TIOCM_RTS)		mcr |= UART_MCR_RTS;	if (mctrl & TIOCM_DTR)		mcr |= UART_MCR_DTR;	if (mctrl & TIOCM_OUT1)		mcr |= UART_MCR_OUT1;	if (mctrl & TIOCM_OUT2)		mcr |= UART_MCR_OUT2;	if (mctrl & TIOCM_LOOP)		mcr |= UART_MCR_LOOP;	pm_runtime_get_sync(up->dev);	old_mcr = serial_in(up, UART_MCR);	old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 |		     UART_MCR_DTR | UART_MCR_RTS);	up->mcr = old_mcr | mcr;	serial_out(up, UART_MCR, up->mcr);	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);	if (gpio_is_valid(up->DTR_gpio) &&	    !!(mctrl & TIOCM_DTR) != up->DTR_active) {		up->DTR_active = !up->DTR_active;		if (gpio_cansleep(up->DTR_gpio))			schedule_work(&up->qos_work);		else			gpio_set_value(up->DTR_gpio,				       up->DTR_active != up->DTR_inverted);	}}

static voidserial_omap_set_termios(struct uart_port *port, struct ktermios *termios,			struct ktermios *old){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned char cval = 0;	unsigned long flags = 0;	unsigned int baud, quot;	switch (termios->c_cflag & CSIZE) {	case CS5:		cval = UART_LCR_WLEN5;		break;	case CS6:		cval = UART_LCR_WLEN6;		break;	case CS7:		cval = UART_LCR_WLEN7;		break;	default:	case CS8:		cval = UART_LCR_WLEN8;		break;	}	if (termios->c_cflag & CSTOPB)		cval |= UART_LCR_STOP;	if (termios->c_cflag & PARENB)		cval |= UART_LCR_PARITY;	if (!(termios->c_cflag & PARODD))		cval |= UART_LCR_EPAR;	if (termios->c_cflag & CMSPAR)		cval |= UART_LCR_SPAR;	/*	 * Ask the core to calculate the divisor for us.	 */	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);	quot = serial_omap_get_divisor(port, baud);	/* calculate wakeup latency constraint */	up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8);	up->latency = up->calc_latency;	schedule_work(&up->qos_work);	up->dll = quot & 0xff;	up->dlh = quot >> 8;	up->mdr1 = UART_OMAP_MDR1_DISABLE;	up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |			UART_FCR_ENABLE_FIFO;	/*	 * Ok, we're now changing the port state. Do it with	 * interrupts disabled.	 */	pm_runtime_get_sync(up->dev);	spin_lock_irqsave(&up->port.lock, flags);	/*	 * Update the per-port timeout.	 */	uart_update_timeout(port, termios->c_cflag, baud);	up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;	if (termios->c_iflag & INPCK)		up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;	if (termios->c_iflag & (BRKINT | PARMRK))		up->port.read_status_mask |= UART_LSR_BI;	/*	 * Characters to ignore	 */	up->port.ignore_status_mask = 0;	if (termios->c_iflag & IGNPAR)		up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;	if (termios->c_iflag & IGNBRK) {		up->port.ignore_status_mask |= UART_LSR_BI;		/*		 * If we're ignoring parity and break indicators,		 * ignore overruns too (for real raw support).		 */		if (termios->c_iflag & IGNPAR)			up->port.ignore_status_mask |= UART_LSR_OE;	}	/*	 * ignore all characters if CREAD is not set	 */	if ((termios->c_cflag & CREAD) == 0)		up->port.ignore_status_mask |= UART_LSR_DR;	/*	 * Modem status interrupts	 */	up->ier &= ~UART_IER_MSI;	if (UART_ENABLE_MS(&up->port, termios->c_cflag))		up->ier |= UART_IER_MSI;	serial_out(up, UART_IER, up->ier);//.........这里部分代码省略.........

static int serial_omap_startup(struct uart_port *port){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned long flags = 0;	int retval;	/*	 * Allocate the IRQ	 */	retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags,				up->name, up);	if (retval)		return retval;	/* Optional wake-up IRQ */	if (up->wakeirq) {		retval = dev_pm_set_dedicated_wake_irq(up->dev, up->wakeirq);		if (retval) {			free_irq(up->port.irq, up);			return retval;		}	}	dev_dbg(up->port.dev, "serial_omap_startup+%d/n", up->port.line);	pm_runtime_get_sync(up->dev);	/*	 * Clear the FIFO buffers and disable them.	 * (they will be reenabled in set_termios())	 */	serial_omap_clear_fifos(up);	/*	 * Clear the interrupt registers.	 */	(void) serial_in(up, UART_LSR);	if (serial_in(up, UART_LSR) & UART_LSR_DR)		(void) serial_in(up, UART_RX);	(void) serial_in(up, UART_IIR);	(void) serial_in(up, UART_MSR);	/*	 * Now, initialize the UART	 */	serial_out(up, UART_LCR, UART_LCR_WLEN8);	spin_lock_irqsave(&up->port.lock, flags);	/*	 * Most PC uarts need OUT2 raised to enable interrupts.	 */	up->port.mctrl |= TIOCM_OUT2;	serial_omap_set_mctrl(&up->port, up->port.mctrl);	spin_unlock_irqrestore(&up->port.lock, flags);	up->msr_saved_flags = 0;	/*	 * Finally, enable interrupts. Note: Modem status interrupts	 * are set via set_termios(), which will be occurring imminently	 * anyway, so we don't enable them here.	 */	up->ier = UART_IER_RLSI | UART_IER_RDI;	serial_out(up, UART_IER, up->ier);	/* Enable module level wake up */	up->wer = OMAP_UART_WER_MOD_WKUP;	if (up->features & OMAP_UART_WER_HAS_TX_WAKEUP)		up->wer |= OMAP_UART_TX_WAKEUP_EN;	serial_out(up, UART_OMAP_WER, up->wer);	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);	up->port_activity = jiffies;	return 0;}

static void serial_omap_stop_tx(struct uart_port *port){	struct uart_omap_port *up = to_uart_omap_port(port);	int res;	pm_runtime_get_sync(up->dev);	/* Handle RS-485 */	if (port->rs485.flags & SER_RS485_ENABLED) {		if (up->scr & OMAP_UART_SCR_TX_EMPTY) {			/* THR interrupt is fired when both TX FIFO and TX			 * shift register are empty. This means there's nothing			 * left to transmit now, so make sure the THR interrupt			 * is fired when TX FIFO is below the trigger level,			 * disable THR interrupts and toggle the RS-485 GPIO			 * data direction pin if needed.			 */			up->scr &= ~OMAP_UART_SCR_TX_EMPTY;			serial_out(up, UART_OMAP_SCR, up->scr);			res = (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) ?				1 : 0;			if (gpio_get_value(up->rts_gpio) != res) {				if (port->rs485.delay_rts_after_send > 0)					mdelay(					port->rs485.delay_rts_after_send);				gpio_set_value(up->rts_gpio, res);			}		} else {			/* We're asked to stop, but there's still stuff in the			 * UART FIFO, so make sure the THR interrupt is fired			 * when both TX FIFO and TX shift register are empty.			 * The next THR interrupt (if no transmission is started			 * in the meantime) will indicate the end of a			 * transmission. Therefore we _don't_ disable THR			 * interrupts in this situation.			 */			up->scr |= OMAP_UART_SCR_TX_EMPTY;			serial_out(up, UART_OMAP_SCR, up->scr);			return;		}	}	if (up->ier & UART_IER_THRI) {		up->ier &= ~UART_IER_THRI;		serial_out(up, UART_IER, up->ier);	}	if ((port->rs485.flags & SER_RS485_ENABLED) &&	    !(port->rs485.flags & SER_RS485_RX_DURING_TX)) {		/*		 * Empty the RX FIFO, we are not interested in anything		 * received during the half-duplex transmission.		 */		serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_RCVR);		/* Re-enable RX interrupts */		up->ier |= UART_IER_RLSI | UART_IER_RDI;		up->port.read_status_mask |= UART_LSR_DR;		serial_out(up, UART_IER, up->ier);	}	pm_runtime_mark_last_busy(up->dev);	pm_runtime_put_autosuspend(up->dev);}

static voidserial_omap_set_termios(struct uart_port *port, struct ktermios *termios,			struct ktermios *old){	struct uart_omap_port *up = to_uart_omap_port(port);	unsigned char cval = 0;	unsigned char efr = 0;	unsigned long flags = 0;	unsigned int baud, quot;	switch (termios->c_cflag & CSIZE) {	case CS5:		cval = UART_LCR_WLEN5;		break;	case CS6:		cval = UART_LCR_WLEN6;		break;	case CS7:		cval = UART_LCR_WLEN7;		break;	default:	case CS8:		cval = UART_LCR_WLEN8;		break;	}	if (termios->c_cflag & CSTOPB)		cval |= UART_LCR_STOP;	if (termios->c_cflag & PARENB)		cval |= UART_LCR_PARITY;	if (!(termios->c_cflag & PARODD))		cval |= UART_LCR_EPAR;	/*	 * Ask the core to calculate the divisor for us.	 */	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);	quot = serial_omap_get_divisor(port, baud);	/* calculate wakeup latency constraint */	up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8);	up->latency = up->calc_latency;	schedule_work(&up->qos_work);	up->dll = quot & 0xff;	up->dlh = quot >> 8;	up->mdr1 = UART_OMAP_MDR1_DISABLE;	up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |			UART_FCR_ENABLE_FIFO;	/*	 * Ok, we're now changing the port state. Do it with	 * interrupts disabled.	 */	pm_runtime_get_sync(up->dev);	spin_lock_irqsave(&up->port.lock, flags);	/*	 * Update the per-port timeout.	 */	uart_update_timeout(port, termios->c_cflag, baud);	up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;	if (termios->c_iflag & INPCK)		up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;	if (termios->c_iflag & (BRKINT | PARMRK))		up->port.read_status_mask |= UART_LSR_BI;	/*	 * Characters to ignore	 */	up->port.ignore_status_mask = 0;	if (termios->c_iflag & IGNPAR)		up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;	if (termios->c_iflag & IGNBRK) {		up->port.ignore_status_mask |= UART_LSR_BI;		/*		 * If we're ignoring parity and break indicators,		 * ignore overruns too (for real raw support).		 */		if (termios->c_iflag & IGNPAR)			up->port.ignore_status_mask |= UART_LSR_OE;	}	/*	 * ignore all characters if CREAD is not set	 */	if ((termios->c_cflag & CREAD) == 0)		up->port.ignore_status_mask |= UART_LSR_DR;	/*	 * Modem status interrupts	 */	up->ier &= ~UART_IER_MSI;	if (UART_ENABLE_MS(&up->port, termios->c_cflag))		up->ier |= UART_IER_MSI;	serial_out(up, UART_IER, up->ier);	serial_out(up, UART_LCR, cval);		/* reset DLAB *///.........这里部分代码省略.........