自学教程：C++ uart_console_write函数代码示例

static void mvebu_uart_console_write(struct console *co, const char *s,				     unsigned int count){	struct uart_port *port = &mvebu_uart_ports[co->index];	unsigned long flags;	unsigned int ier;	int locked = 1;	if (oops_in_progress)		locked = spin_trylock_irqsave(&port->lock, flags);	else		spin_lock_irqsave(&port->lock, flags);	ier = readl(port->membase + UART_CTRL) &		(CTRL_RX_INT | CTRL_TX_RDY_INT);	writel(0, port->membase + UART_CTRL);	uart_console_write(port, s, count, mvebu_uart_console_putchar);	wait_for_xmitr(port);	if (ier)		writel(ier, port->membase + UART_CTRL);	if (locked)		spin_unlock_irqrestore(&port->lock, flags);}

/** * xuartps_console_write - perform write operation * @port: Handle to the uart port structure * @s: Pointer to character array * @count: No of characters **/static void xuartps_console_write(struct console *co, const char *s,                                  unsigned int count){    struct uart_port *port = &xuartps_port[co->index];    unsigned long flags;    unsigned int imr;    int locked = 1;    if (oops_in_progress)        locked = spin_trylock_irqsave(&port->lock, flags);    else        spin_lock_irqsave(&port->lock, flags);    /* save and disable interrupt */    imr = xuartps_readl(XUARTPS_IMR_OFFSET);    xuartps_writel(imr, XUARTPS_IDR_OFFSET);    uart_console_write(port, s, count, xuartps_console_putchar);    xuartps_console_wait_tx(port);    /* restore interrupt state, it seems like there may be a h/w bug     * in that the interrupt enable register should not need to be     * written based on the data sheet     */    xuartps_writel(~imr, XUARTPS_IDR_OFFSET);    xuartps_writel(imr, XUARTPS_IER_OFFSET);    if (locked)        spin_unlock_irqrestore(&port->lock, flags);}

static voidserial_omap_console_write(struct console *co, const char *s,		unsigned int count){	struct uart_omap_port *up = serial_omap_console_ports[co->index];	unsigned long flags;	unsigned int ier;	int locked = 1;	pm_runtime_get_sync(&up->pdev->dev);	local_irq_save(flags);	if (up->port.sysrq)		locked = 0;	else if (oops_in_progress)		locked = spin_trylock(&up->port.lock);	else		spin_lock(&up->port.lock);	ier = serial_in(up, UART_IER);	serial_out(up, UART_IER, 0);	uart_console_write(&up->port, s, count, serial_omap_console_putchar);	wait_for_xmitr(up);	serial_out(up, UART_IER, ier);	if (up->msr_saved_flags)		check_modem_status(up);	pm_runtime_mark_last_busy(&up->pdev->dev);	pm_runtime_put_autosuspend(&up->pdev->dev);	if (locked)		spin_unlock(&up->port.lock);	local_irq_restore(flags);}

static voidpl011_console_write(struct console *co, const char *s, unsigned int count){	struct uart_amba_port *uap = amba_ports[co->index];	unsigned int status, old_cr, new_cr;	clk_enable(uap->clk);	/*	 *	First save the CR then disable the interrupts	 */	old_cr = readw(uap->port.membase + UART011_CR);	new_cr = old_cr & ~UART011_CR_CTSEN;	new_cr |= UART01x_CR_UARTEN | UART011_CR_TXE;	writew(new_cr, uap->port.membase + UART011_CR);	uart_console_write(&uap->port, s, count, pl011_console_putchar);	/*	 *	Finally, wait for transmitter to become empty	 *	and restore the TCR	 */	do {		status = readw(uap->port.membase + UART01x_FR);	} while (status & UART01x_FR_BUSY);	writew(old_cr, uap->port.membase + UART011_CR);	clk_disable(uap->clk);}

static void asc_console_write(struct console *co, const char *s, unsigned count){	struct uart_port *port = &asc_ports[co->index].port;	unsigned long flags;	unsigned long timeout = 1000000;	int locked = 1;	u32 intenable;	if (port->sysrq)		locked = 0; /* asc_interrupt has already claimed the lock */	else if (oops_in_progress)		locked = spin_trylock_irqsave(&port->lock, flags);	else		spin_lock_irqsave(&port->lock, flags);	/*	 * Disable interrupts so we don't get the IRQ line bouncing	 * up and down while interrupts are disabled.	 */	intenable = asc_in(port, ASC_INTEN);	asc_out(port, ASC_INTEN, 0);	(void)asc_in(port, ASC_INTEN);	/* Defeat bus write posting */	uart_console_write(port, s, count, asc_console_putchar);	while (--timeout && !asc_txfifo_is_empty(port))		udelay(1);	asc_out(port, ASC_INTEN, intenable);	if (locked)		spin_unlock_irqrestore(&port->lock, flags);}

static void msm_hsl_console_write(struct console *co, const char *s,				  unsigned int count){	struct uart_port *port;	struct msm_hsl_port *msm_hsl_port;	unsigned int vid;	int locked;	BUG_ON(co->index < 0 || co->index >= UART_NR);	port = get_port_from_line(co->index);	msm_hsl_port = UART_TO_MSM(port);	vid = msm_hsl_port->ver_id;		if (port->sysrq || oops_in_progress)		locked = spin_trylock(&port->lock);	else {		locked = 1;		spin_lock(&port->lock);	}	msm_hsl_write(port, 0, regmap[vid][UARTDM_IMR]);	uart_console_write(port, s, count, msm_hsl_console_putchar);	msm_hsl_write(port, msm_hsl_port->imr, regmap[vid][UARTDM_IMR]);	if (locked == 1)		spin_unlock(&port->lock);	D("%s ():port->line %d, ir/n", __func__, port->line);}

/* * Print a string to the serial port trying not to disturb * any possible real use of the port... * *	The console_lock must be held when we get here. */static voidserial_omap_console_write(struct console *co, const char *s,		unsigned int count){	/* TBD: In 8250 interrupts were disabled in the beginning of this	 * function and enabled in the end. We might need to do the same*/	struct uart_omap_port *up = serial_omap_console_ports[co->index];	unsigned int ier;	/*	 *	First save the IER then disable the interrupts	 */	ier = serial_in(up, UART_IER);	serial_out(up, UART_IER, 0);	uart_console_write(&up->port, s, count, serial_omap_console_putchar);	/*	 *	Finally, wait for transmitter to become empty	 *	and restore the IER	 */	wait_for_xmitr(up);	serial_out(up, UART_IER, ier);	/*	 *	The receive handling will happen properly because the	 *	receive ready bit will still be set; it is not cleared	 *	on read.  However, modem control will not, we must	 *	call it if we have saved something in the saved flags	 *	while processing with interrupts off.	 */	if (up->msr_saved_flags)		check_modem_status(up);}

/* * Interrupts are disabled on entering */static voidimx_console_write(struct console *co, const char *s, unsigned int count){	struct imx_port *sport = &imx_ports[co->index];	unsigned int old_ucr1, old_ucr2;	/*	 *	First, save UCR1/2 and then disable interrupts	 */	old_ucr1 = UCR1((u32)sport->port.membase);	old_ucr2 = UCR2((u32)sport->port.membase);	UCR1((u32)sport->port.membase) =	                   (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)	                   & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);	UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;	uart_console_write(&sport->port, s, count, imx_console_putchar);	/*	 *	Finally, wait for transmitter to become empty	 *	and restore UCR1/2	 */	while (!(USR2((u32)sport->port.membase) & USR2_TXDC));	UCR1((u32)sport->port.membase) = old_ucr1;	UCR2((u32)sport->port.membase) = old_ucr2;}

static void altera_uart_earlycon_write(struct console *co, const char *s,				       unsigned int count){	struct earlycon_device *dev = co->data;	uart_console_write(&dev->port, s, count, altera_uart_console_putc);}

static void __init cdns_early_write(struct console *con, const char *s,				    unsigned n){	struct earlycon_device *dev = con->data;	uart_console_write(&dev->port, s, n, cdns_uart_console_putchar);}

static void meson_serial_console_write(struct console *co, const char *s,                                       u_int count){    struct uart_port *port;    unsigned long flags;    int locked;    u32 val, tmp;    port = meson_ports[co->index];    if (!port)        return;    local_irq_save(flags);    if (port->sysrq) {        locked = 0;    } else if (oops_in_progress) {        locked = spin_trylock(&port->lock);    } else {        spin_lock(&port->lock);        locked = 1;    }    val = readl(port->membase + AML_UART_CONTROL);    val |= AML_UART_TX_EN;    tmp = val & ~(AML_UART_TX_INT_EN | AML_UART_RX_INT_EN);    writel(tmp, port->membase + AML_UART_CONTROL);    uart_console_write(port, s, count, meson_console_putchar);    writel(val, port->membase + AML_UART_CONTROL);    if (locked)        spin_unlock(&port->lock);    local_irq_restore(flags);}

static void meson_serial_console_write(struct console *co, const char *s,				       u_int count){	struct uart_port *port;	unsigned long flags;	int locked;	port = meson_ports[co->index];	if (!port)		return;	local_irq_save(flags);	if (port->sysrq) {		locked = 0;	} else if (oops_in_progress) {		locked = spin_trylock(&port->lock);	} else {		spin_lock(&port->lock);		locked = 1;	}	uart_console_write(port, s, count, meson_console_putchar);	if (locked)		spin_unlock(&port->lock);	local_irq_restore(flags);}

static voidnwpserial_console_write(struct console *co, const char *s, unsigned int count){	struct nwpserial_port *up = &nwpserial_ports[co->index];	unsigned long flags;	int locked = 1;	if (oops_in_progress)		locked = spin_trylock_irqsave(&up->port.lock, flags);	else		spin_lock_irqsave(&up->port.lock, flags);	/* save and disable interrupt */	up->ier = dcr_read(up->dcr_host, UART_IER);	dcr_write(up->dcr_host, UART_IER, up->ier & ~UART_IER_RDI);	uart_console_write(&up->port, s, count, nwpserial_console_putchar);	/* wait for transmitter to become emtpy */	while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0)		cpu_relax();	/* restore interrupt state */	dcr_write(up->dcr_host, UART_IER, up->ier);	if (locked)		spin_unlock_irqrestore(&up->port.lock, flags);}

static void stm32_console_write(struct console *co, const char *s, unsigned cnt){	struct uart_port *port = &stm32_ports[co->index].port;	struct stm32_port *stm32_port = to_stm32_port(port);	struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;	struct stm32_usart_config *cfg = &stm32_port->info->cfg;	unsigned long flags;	u32 old_cr1, new_cr1;	int locked = 1;	local_irq_save(flags);	if (port->sysrq)		locked = 0;	else if (oops_in_progress)		locked = spin_trylock(&port->lock);	else		spin_lock(&port->lock);	/* Save and disable interrupts, enable the transmitter */	old_cr1 = readl_relaxed(port->membase + ofs->cr1);	new_cr1 = old_cr1 & ~USART_CR1_IE_MASK;	new_cr1 |=  USART_CR1_TE | BIT(cfg->uart_enable_bit);	writel_relaxed(new_cr1, port->membase + ofs->cr1);	uart_console_write(port, s, cnt, stm32_console_putchar);	/* Restore interrupt state */	writel_relaxed(old_cr1, port->membase + ofs->cr1);	if (locked)		spin_unlock(&port->lock);	local_irq_restore(flags);}

static void altera_uart_console_write(struct console *co, const char *s,				      unsigned int count){	struct uart_port *port = &(altera_uart_ports + co->index)->port;	uart_console_write(port, s, count, altera_uart_console_putc);}

/* * Print a string to the serial port trying not to disturb * any possible real use of the port... * *	The console_lock must be held when we get here. */static voidserial_pxa_console_write(struct console *co, const char *s, unsigned int count){	struct uart_pxa_port *up = serial_pxa_ports[co->index];	unsigned int ier;	clk_enable(up->clk);	/*	 *	First save the IER then disable the interrupts	 */	ier = serial_in(up, UART_IER);	serial_out(up, UART_IER, UART_IER_UUE);	uart_console_write(&up->port, s, count, serial_pxa_console_putchar);	/*	 *	Finally, wait for transmitter to become empty	 *	and restore the IER	 */	wait_for_xmitr(up);	serial_out(up, UART_IER, ier);	clk_disable(up->clk);}

static void sw_console_write(struct console *co, const char *s,			      unsigned int count){	struct uart_port *port = NULL;	struct sw_uart_port *sw_uport;	unsigned long flags;	unsigned int ier;	int locked = 1;	BUG_ON(co->index < 0 || co->index >= SUNXI_UART_NUM);	port = sw_console_get_port(co);	if (port == NULL)		return;	sw_uport = UART_TO_SPORT(port);	local_irq_save(flags);	if (port->sysrq)		locked = 0;	else if (oops_in_progress)		locked = spin_trylock(&port->lock);	else		spin_lock(&port->lock);	ier = serial_in(port, SW_UART_IER);	serial_out(port, 0, SW_UART_IER);	uart_console_write(port, s, count, sw_console_putchar);	wait_for_xmitr(sw_uport);	serial_out(port, ier, SW_UART_IER);	if (locked)		spin_unlock(&port->lock);	local_irq_restore(flags);}

/* * Print a string to the serial port trying not to disturb * any possible real use of the port... * *	The console_lock must be held when we get here. */static voidserial_hsu_console_write(struct console *co, const char *s, unsigned int count){	struct uart_hsu_port *up = serial_hsu_ports[co->index];	unsigned long flags;	unsigned int ier;	int locked = 1;	local_irq_save(flags);	if (up->port.sysrq)		locked = 0;	else if (oops_in_progress) {		locked = spin_trylock(&up->port.lock);	} else		spin_lock(&up->port.lock);	/* First save the IER then disable the interrupts */	ier = serial_in(up, UART_IER);	serial_out(up, UART_IER, 0);	uart_console_write(&up->port, s, count, serial_hsu_console_putchar);	/*	 * Finally, wait for transmitter to become empty	 * and restore the IER	 */	wait_for_xmitr(up);	serial_out(up, UART_IER, ier);	if (locked)		spin_unlock(&up->port.lock);	local_irq_restore(flags);}

static void sprd_early_write(struct console *con, const char *s,				    unsigned n){	struct earlycon_device *dev = con->data;	uart_console_write(&dev->port, s, n, sprd_putc);}

/* * Interrupts are disabled on entering */static voidimx_console_write(struct console *co, const char *s, unsigned int count){	struct imx_port *sport = imx_ports[co->index];	unsigned int old_ucr1, old_ucr2, ucr1;	/*	 *	First, save UCR1/2 and then disable interrupts	 */	ucr1 = old_ucr1 = readl(sport->port.membase + UCR1);	old_ucr2 = readl(sport->port.membase + UCR2);	if (cpu_is_mx1())		ucr1 |= MX1_UCR1_UARTCLKEN;	ucr1 |= UCR1_UARTEN;	ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);	writel(ucr1, sport->port.membase + UCR1);	writel(old_ucr2 | UCR2_TXEN, sport->port.membase + UCR2);	uart_console_write(&sport->port, s, count, imx_console_putchar);	/*	 *	Finally, wait for transmitter to become empty	 *	and restore UCR1/2	 */	while (!(readl(sport->port.membase + USR2) & USR2_TXDC));	writel(old_ucr1, sport->port.membase + UCR1);	writel(old_ucr2, sport->port.membase + UCR2);}

static void milkymist_uart_console_write(struct console *co, const char *s,		unsigned int count){	struct uart_port *port = &milkymist_uart_ports[co->index];	u32 ctrl;	unsigned long flags;	int locked = 1;	if (oops_in_progress)		locked = spin_trylock_irqsave(&port->lock, flags);	else		spin_lock_irqsave(&port->lock, flags);	/* wait until current transmission is finished */	milkymist_uart_console_wait_tx(port);	/* save ctrl and stat */	ctrl = ioread32be(port->membase + UART_CTRL);	/* disable irqs */	iowrite32be(ctrl & ~(UART_CTRL_RX_INT | UART_CTRL_TX_INT),			port->membase + UART_CTRL);	uart_console_write(port, s, count, milkymist_uart_console_putchar);	milkymist_uart_console_wait_tx(port);	/* ack write event */	iowrite32be(UART_STAT_TX_EVT, port->membase + UART_STAT);	/* restore control register */	iowrite32be(ctrl, port->membase + UART_CTRL);	if (locked)		spin_unlock_irqrestore(&port->lock, flags);}

static void sbd_console_write(struct console *co, const char *s,			      unsigned int count){	int chip = co->index / DUART_MAX_SIDE;	int side = co->index % DUART_MAX_SIDE;	struct sbd_port *sport = &sbd_duarts[chip].sport[side];	struct uart_port *uport = &sport->port;	unsigned long flags;	unsigned int mask;	/* Disable transmit interrupts and enable the transmitter. */	spin_lock_irqsave(&uport->lock, flags);	mask = read_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2));	write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2),		     mask & ~M_DUART_IMR_TX);	write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_EN);	spin_unlock_irqrestore(&uport->lock, flags);	uart_console_write(&sport->port, s, count, sbd_console_putchar);	/* Restore transmit interrupts and the transmitter enable. */	spin_lock_irqsave(&uport->lock, flags);	sbd_line_drain(sport);	if (sport->tx_stopped)		write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS);	write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2), mask);	spin_unlock_irqrestore(&uport->lock, flags);}

 */static voidpnx8xxx_console_write(struct console *co, const char *s, unsigned int count){	struct pnx8xxx_port *sport = &pnx8xxx_ports[co->index];	unsigned int old_ien, status;	/*	 *	First, save IEN and then disable interrupts	 */	old_ien = serial_in(sport, PNX8XXX_IEN);	serial_out(sport, PNX8XXX_IEN, old_ien & ~(PNX8XXX_UART_INT_ALLTX |					PNX8XXX_UART_INT_ALLRX));	uart_console_write(&sport->port, s, count, pnx8xxx_console_putchar);	/*	 *	Finally, wait for transmitter to become empty	 *	and restore IEN	 */	do {		/* Wait for UART_TX register to empty */		status = serial_in(sport, PNX8XXX_FIFO);	} while (status & PNX8XXX_UART_FIFO_TXFIFO);	/* Clear TX and EMPTY interrupt */	serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_TX |			     PNX8XXX_UART_INT_EMPTY);	serial_out(sport, PNX8XXX_IEN, old_ien);}

static void ulite_console_write(struct console *co, const char *s,                                unsigned int count){    struct uart_port *port = &ulite_ports[co->index];    unsigned long flags;    unsigned int ier;    int locked = 1;    if (oops_in_progress) {        locked = spin_trylock_irqsave(&port->lock, flags);    } else        spin_lock_irqsave(&port->lock, flags);    /* save and disable interrupt */    ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;    uart_out32(0, ULITE_CONTROL, port);    uart_console_write(port, s, count, ulite_console_putchar);    ulite_console_wait_tx(port);    /* restore interrupt state */    if (ier)        uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);    if (locked)        spin_unlock_irqrestore(&port->lock, flags);}

static voidparrot5_serial_console_write(struct console *co, const char *s,			     unsigned int count){	struct uart_port *port = (struct uart_port *)&p5_ports[co->index];	uart_console_write(port, s, count, parrot5_serial_console_putchar);}