自学教程：C++ util_format_description函数代码示例

/** * Query format support for creating a texture, drawing surface, etc. * /param format  the format to test * /param type  one of PIPE_TEXTURE, PIPE_SURFACE */static booleanvirgl_is_format_supported( struct pipe_screen *screen,                                 enum pipe_format format,                                 enum pipe_texture_target target,                                 unsigned sample_count,                                 unsigned bind){   struct virgl_screen *vscreen = virgl_screen(screen);   const struct util_format_description *format_desc;   int i;   assert(target == PIPE_BUFFER ||          target == PIPE_TEXTURE_1D ||          target == PIPE_TEXTURE_1D_ARRAY ||          target == PIPE_TEXTURE_2D ||          target == PIPE_TEXTURE_2D_ARRAY ||          target == PIPE_TEXTURE_RECT ||          target == PIPE_TEXTURE_3D ||          target == PIPE_TEXTURE_CUBE ||          target == PIPE_TEXTURE_CUBE_ARRAY);   format_desc = util_format_description(format);   if (!format_desc)      return FALSE;   if (util_format_is_intensity(format))      return FALSE;   if (sample_count > 1) {      if (!vscreen->caps.caps.v1.bset.texture_multisample)         return FALSE;      if (sample_count > vscreen->caps.caps.v1.max_samples)         return FALSE;   }   if (bind & PIPE_BIND_VERTEX_BUFFER) {      return virgl_is_vertex_format_supported(screen, format);   }   if (bind & PIPE_BIND_RENDER_TARGET) {      if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)         return FALSE;      /*       * Although possible, it is unnatural to render into compressed or YUV       * surfaces. So disable these here to avoid going into weird paths       * inside the state trackers.       */      if (format_desc->block.width != 1 ||          format_desc->block.height != 1)         return FALSE;      {         int big = format / 32;         int small = format % 32;         if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))            return FALSE;      }   }   if (bind & PIPE_BIND_DEPTH_STENCIL) {      if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)         return FALSE;   }   /*    * All other operations (sampling, transfer, etc).    */   if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {      if (util_format_s3tc_enabled)         goto out_lookup;      return FALSE;   }   if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {      goto out_lookup;   }   if (format == PIPE_FORMAT_R11G11B10_FLOAT) {      goto out_lookup;   } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {      goto out_lookup;   }   /* Find the first non-VOID channel. */   for (i = 0; i < 4; i++) {      if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {         break;      }   }   if (i == 4)      return FALSE;   /* no L4A4 *///.........这里部分代码省略.........

/* Common processing for r600_texture_create and r600_texture_from_handle */static struct r600_texture *r600_texture_create_object(struct pipe_screen *screen,			   const struct pipe_resource *base,			   unsigned pitch_in_bytes_override,			   struct pb_buffer *buf,			   struct radeon_surf *surface){	struct r600_texture *rtex;	struct r600_resource *resource;	struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;	rtex = CALLOC_STRUCT(r600_texture);	if (rtex == NULL)		return NULL;	resource = &rtex->resource;	resource->b.b = *base;	resource->b.vtbl = &r600_texture_vtbl;	pipe_reference_init(&resource->b.b.reference, 1);	resource->b.b.screen = screen;	rtex->pitch_override = pitch_in_bytes_override;	/* don't include stencil-only formats which we don't support for rendering */	rtex->is_depth = util_format_has_depth(util_format_description(rtex->resource.b.b.format));	rtex->surface = *surface;	if (r600_setup_surface(screen, rtex, pitch_in_bytes_override)) {		FREE(rtex);		return NULL;	}	/* Tiled depth textures utilize the non-displayable tile order.	 * This must be done after r600_setup_surface.	 * Applies to R600-Cayman. */	rtex->non_disp_tiling = rtex->is_depth && rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D;	if (rtex->is_depth) {		if (!(base->flags & (R600_RESOURCE_FLAG_TRANSFER |				     R600_RESOURCE_FLAG_FLUSHED_DEPTH)) &&		    !(rscreen->debug_flags & DBG_NO_HYPERZ)) {			r600_texture_allocate_htile(rscreen, rtex);		}	} else {		if (base->nr_samples > 1) {			if (!buf) {				r600_texture_allocate_fmask(rscreen, rtex);				r600_texture_allocate_cmask(rscreen, rtex);				rtex->cmask_buffer = &rtex->resource;			}			if (!rtex->fmask.size || !rtex->cmask.size) {				FREE(rtex);				return NULL;			}		}		if (rtex->surface.dcc_size)			vi_texture_alloc_dcc_separate(rscreen, rtex);	}	/* Now create the backing buffer. */	if (!buf) {		if (!r600_init_resource(rscreen, resource, rtex->size,					rtex->surface.bo_alignment, TRUE)) {			FREE(rtex);			return NULL;		}	} else {		resource->buf = buf;		resource->cs_buf = rscreen->ws->buffer_get_cs_handle(buf);		resource->gpu_address = rscreen->ws->buffer_get_virtual_address(resource->cs_buf);		resource->domains = rscreen->ws->buffer_get_initial_domain(resource->cs_buf);	}	if (rtex->cmask.size) {		/* Initialize the cmask to 0xCC (= compressed state). */		r600_screen_clear_buffer(rscreen, &rtex->cmask_buffer->b.b,					 rtex->cmask.offset, rtex->cmask.size,					 0xCCCCCCCC, true);	}	/* Initialize the CMASK base register value. */	rtex->cmask.base_address_reg =		(rtex->resource.gpu_address + rtex->cmask.offset) >> 8;	if (rscreen->debug_flags & DBG_VM) {		fprintf(stderr, "VM start=0x%"PRIX64"  end=0x%"PRIX64" | Texture %ix%ix%i, %i levels, %i samples, %s/n",			rtex->resource.gpu_address,			rtex->resource.gpu_address + rtex->resource.buf->size,			base->width0, base->height0, util_max_layer(base, 0)+1, base->last_level+1,			base->nr_samples ? base->nr_samples : 1, util_format_short_name(base->format));	}	if (rscreen->debug_flags & DBG_TEX ||	    (rtex->resource.b.b.last_level > 0 && rscreen->debug_flags & DBG_TEXMIP)) {		printf("Texture: npix_x=%u, npix_y=%u, npix_z=%u, blk_w=%u, "		       "blk_h=%u, blk_d=%u, array_size=%u, last_level=%u, "		       "bpe=%u, nsamples=%u, flags=0x%x, %s/n",		       rtex->surface.npix_x, rtex->surface.npix_y,		       rtex->surface.npix_z, rtex->surface.blk_w,//.........这里部分代码省略.........

/* Translate a pipe_format into a useful texture format for sampling. * * Some special formats are translated directly using R300_EASY_TX_FORMAT, * but the majority of them is translated in a generic way, automatically * supporting all the formats hw can support. * * R300_EASY_TX_FORMAT swizzles the texture. * Note the signature of R300_EASY_TX_FORMAT: *   R300_EASY_TX_FORMAT(B, G, R, A, FORMAT); * * The FORMAT specifies how the texture sampler will treat the texture, and * makes available X, Y, Z, W, ZERO, and ONE for swizzling. */uint32_t r300_translate_texformat(enum pipe_format format,                                  const unsigned char *swizzle_view,                                  boolean is_r500,                                  boolean dxtc_swizzle){    uint32_t result = 0;    const struct util_format_description *desc;    unsigned i;    boolean uniform = TRUE;    const uint32_t sign_bit[4] = {        R300_TX_FORMAT_SIGNED_W,        R300_TX_FORMAT_SIGNED_Z,        R300_TX_FORMAT_SIGNED_Y,        R300_TX_FORMAT_SIGNED_X,    };    desc = util_format_description(format);    /* Colorspace (return non-RGB formats directly). */    switch (desc->colorspace) {        /* Depth stencil formats.         * Swizzles are added in r300_merge_textures_and_samplers. */        case UTIL_FORMAT_COLORSPACE_ZS:            switch (format) {                case PIPE_FORMAT_Z16_UNORM:                    return R300_TX_FORMAT_X16;                case PIPE_FORMAT_X8Z24_UNORM:                case PIPE_FORMAT_S8_UINT_Z24_UNORM:                    if (is_r500)                        return R500_TX_FORMAT_Y8X24;                    else                        return R300_TX_FORMAT_Y16X16;                default:                    return ~0; /* Unsupported. */            }        /* YUV formats. */        case UTIL_FORMAT_COLORSPACE_YUV:            result |= R300_TX_FORMAT_YUV_TO_RGB;            switch (format) {                case PIPE_FORMAT_UYVY:                    return R300_EASY_TX_FORMAT(X, Y, Z, ONE, YVYU422) | result;                case PIPE_FORMAT_YUYV:                    return R300_EASY_TX_FORMAT(X, Y, Z, ONE, VYUY422) | result;                default:                    return ~0; /* Unsupported/unknown. */            }        /* Add gamma correction. */        case UTIL_FORMAT_COLORSPACE_SRGB:            result |= R300_TX_FORMAT_GAMMA;            break;        default:            switch (format) {                /* Same as YUV but without the YUR->RGB conversion. */                case PIPE_FORMAT_R8G8_B8G8_UNORM:                    return R300_EASY_TX_FORMAT(X, Y, Z, ONE, YVYU422) | result;                case PIPE_FORMAT_G8R8_G8B8_UNORM:                    return R300_EASY_TX_FORMAT(X, Y, Z, ONE, VYUY422) | result;                default:;            }    }    /* Add swizzling. */    /* The RGTC1_SNORM and LATC1_SNORM swizzle is done in the shader. */    if (format != PIPE_FORMAT_RGTC1_SNORM &&        format != PIPE_FORMAT_LATC1_SNORM) {        if (util_format_is_compressed(format) &&            dxtc_swizzle &&            format != PIPE_FORMAT_RGTC2_UNORM &&            format != PIPE_FORMAT_RGTC2_SNORM &&            format != PIPE_FORMAT_LATC2_UNORM &&            format != PIPE_FORMAT_LATC2_SNORM) {            result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,                                                TRUE);        } else {            result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,                                                FALSE);        }    }    /* S3TC formats. */    if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {        if (!util_format_s3tc_enabled) {            return ~0; /* Unsupported. */        }//.........这里部分代码省略.........

/** * Query format support for creating a texture, drawing surface, etc. * /param format  the format to test * /param type  one of PIPE_TEXTURE, PIPE_SURFACE */static booleanllvmpipe_is_format_supported( struct pipe_screen *_screen,                              enum pipe_format format,                              enum pipe_texture_target target,                              unsigned sample_count,                              unsigned bind){   struct llvmpipe_screen *screen = llvmpipe_screen(_screen);   struct sw_winsys *winsys = screen->winsys;   const struct util_format_description *format_desc;   format_desc = util_format_description(format);   if (!format_desc)      return FALSE;   /* Z16 support is missing, which breaks the blit */   if (format == PIPE_FORMAT_Z16_UNORM)      return FALSE;   assert(target == PIPE_BUFFER ||          target == PIPE_TEXTURE_1D ||          target == PIPE_TEXTURE_1D_ARRAY ||          target == PIPE_TEXTURE_2D ||          target == PIPE_TEXTURE_2D_ARRAY ||          target == PIPE_TEXTURE_RECT ||          target == PIPE_TEXTURE_3D ||          target == PIPE_TEXTURE_CUBE);   if (sample_count > 1)      return FALSE;   if (bind & PIPE_BIND_RENDER_TARGET) {      if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_RGB)         return FALSE;      if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)         return FALSE;      assert(format_desc->block.width == 1);      assert(format_desc->block.height == 1);      if (format_desc->is_mixed)         return FALSE;      if (!format_desc->is_array && !format_desc->is_bitmask)         return FALSE;      /*       * XXX refuse formats known to crash in generate_unswizzled_blend().       * These include all 3-channel 24bit RGB8 variants, plus 48bit       * (except those using floats) 3-channel RGB16 variants (the latter       * seems to be more of a llvm bug though).       * The mesa state tracker only seems to use these for SINT/UINT formats.       */      if (format_desc->is_array && format_desc->nr_channels == 3) {         if (format_desc->block.bits == 24 || (format_desc->block.bits == 48 &&               !util_format_is_float(format))) {            return FALSE;         }      }   }   if (bind & PIPE_BIND_DISPLAY_TARGET) {      if(!winsys->is_displaytarget_format_supported(winsys, bind, format))         return FALSE;   }   if (bind & PIPE_BIND_DEPTH_STENCIL) {      if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)         return FALSE;      if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)         return FALSE;      /* FIXME: Temporary restriction. See lp_state_fs.c. */      if (format_desc->block.bits != 32)         return FALSE;   }   if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {      return util_format_s3tc_enabled;   }   /*    * Everything can be supported by u_format    * (those without fetch_rgba_float might be not but shouldn't hit that)    */   return TRUE;}

static int r600_init_surface(struct r600_common_screen *rscreen,			     struct radeon_surf *surface,			     const struct pipe_resource *ptex,			     unsigned array_mode,			     bool is_flushed_depth){	const struct util_format_description *desc =		util_format_description(ptex->format);	bool is_depth, is_stencil;	is_depth = util_format_has_depth(desc);	is_stencil = util_format_has_stencil(desc);	surface->npix_x = ptex->width0;	surface->npix_y = ptex->height0;	surface->npix_z = ptex->depth0;	surface->blk_w = util_format_get_blockwidth(ptex->format);	surface->blk_h = util_format_get_blockheight(ptex->format);	surface->blk_d = 1;	surface->array_size = 1;	surface->last_level = ptex->last_level;	if (rscreen->chip_class >= EVERGREEN && !is_flushed_depth &&	    ptex->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {		surface->bpe = 4; /* stencil is allocated separately on evergreen */	} else {		surface->bpe = util_format_get_blocksize(ptex->format);		/* align byte per element on dword */		if (surface->bpe == 3) {			surface->bpe = 4;		}	}	surface->nsamples = ptex->nr_samples ? ptex->nr_samples : 1;	surface->flags = RADEON_SURF_SET(array_mode, MODE);	switch (ptex->target) {	case PIPE_TEXTURE_1D:		surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_1D, TYPE);		break;	case PIPE_TEXTURE_RECT:	case PIPE_TEXTURE_2D:		surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);		break;	case PIPE_TEXTURE_3D:		surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_3D, TYPE);		break;	case PIPE_TEXTURE_1D_ARRAY:		surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_1D_ARRAY, TYPE);		surface->array_size = ptex->array_size;		break;	case PIPE_TEXTURE_2D_ARRAY:	case PIPE_TEXTURE_CUBE_ARRAY: /* cube array layout like 2d array */		surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D_ARRAY, TYPE);		surface->array_size = ptex->array_size;		break;	case PIPE_TEXTURE_CUBE:		surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_CUBEMAP, TYPE);		break;	case PIPE_BUFFER:	default:		return -EINVAL;	}	if (ptex->bind & PIPE_BIND_SCANOUT) {		surface->flags |= RADEON_SURF_SCANOUT;	}	if (!is_flushed_depth && is_depth) {		surface->flags |= RADEON_SURF_ZBUFFER;		if (is_stencil) {			surface->flags |= RADEON_SURF_SBUFFER |					  RADEON_SURF_HAS_SBUFFER_MIPTREE;		}	}	if (rscreen->chip_class >= SI) {		surface->flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;	}	return 0;}

/* Common processing for r600_texture_create and r600_texture_from_handle */static struct r600_texture *r600_texture_create_object(struct pipe_screen *screen,			   const struct pipe_resource *base,			   unsigned pitch_in_bytes_override,			   struct pb_buffer *buf,			   struct radeon_surf *surface){	struct r600_texture *rtex;	struct r600_resource *resource;	struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;	rtex = CALLOC_STRUCT(r600_texture);	if (!rtex)		return NULL;	resource = &rtex->resource;	resource->b.b = *base;	resource->b.vtbl = &r600_texture_vtbl;	pipe_reference_init(&resource->b.b.reference, 1);	resource->b.b.screen = screen;	/* don't include stencil-only formats which we don't support for rendering */	rtex->is_depth = util_format_has_depth(util_format_description(rtex->resource.b.b.format));	rtex->surface = *surface;	if (r600_setup_surface(screen, rtex, pitch_in_bytes_override)) {		FREE(rtex);		return NULL;	}	/* Tiled depth textures utilize the non-displayable tile order.	 * This must be done after r600_setup_surface.	 * Applies to R600-Cayman. */	rtex->non_disp_tiling = rtex->is_depth && rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D;	if (rtex->is_depth) {		if (!(base->flags & (R600_RESOURCE_FLAG_TRANSFER |				     R600_RESOURCE_FLAG_FLUSHED_DEPTH)) &&		    !(rscreen->debug_flags & DBG_NO_HYPERZ)) {			r600_texture_allocate_htile(rscreen, rtex);		}	} else {		if (base->nr_samples > 1) {			if (!buf) {				r600_texture_allocate_fmask(rscreen, rtex);				r600_texture_allocate_cmask(rscreen, rtex);				rtex->cmask_buffer = &rtex->resource;			}			if (!rtex->fmask.size || !rtex->cmask.size) {				FREE(rtex);				return NULL;			}		}		if (rtex->surface.dcc_size)			vi_texture_alloc_dcc_separate(rscreen, rtex);	}	/* Now create the backing buffer. */	if (!buf) {		if (!r600_init_resource(rscreen, resource, rtex->size,					rtex->surface.bo_alignment, TRUE)) {			FREE(rtex);			return NULL;		}	} else {		resource->buf = buf;		resource->gpu_address = rscreen->ws->buffer_get_virtual_address(resource->buf);		resource->domains = rscreen->ws->buffer_get_initial_domain(resource->buf);	}	if (rtex->cmask.size) {		/* Initialize the cmask to 0xCC (= compressed state). */		r600_screen_clear_buffer(rscreen, &rtex->cmask_buffer->b.b,					 rtex->cmask.offset, rtex->cmask.size,					 0xCCCCCCCC, true);	}	/* Initialize the CMASK base register value. */	rtex->cmask.base_address_reg =		(rtex->resource.gpu_address + rtex->cmask.offset) >> 8;	if (rscreen->debug_flags & DBG_VM) {		fprintf(stderr, "VM start=0x%"PRIX64"  end=0x%"PRIX64" | Texture %ix%ix%i, %i levels, %i samples, %s/n",			rtex->resource.gpu_address,			rtex->resource.gpu_address + rtex->resource.buf->size,			base->width0, base->height0, util_max_layer(base, 0)+1, base->last_level+1,			base->nr_samples ? base->nr_samples : 1, util_format_short_name(base->format));	}	if (rscreen->debug_flags & DBG_TEX) {		puts("Texture:");		r600_print_texture_info(rtex, stdout);	}	return rtex;}

/** * Query format support for creating a texture, drawing surface, etc. * /param format  the format to test * /param type  one of PIPE_TEXTURE, PIPE_SURFACE */static booleanllvmpipe_is_format_supported( struct pipe_screen *_screen,                              enum pipe_format format,                              enum pipe_texture_target target,                              unsigned sample_count,                              unsigned bind){   struct llvmpipe_screen *screen = llvmpipe_screen(_screen);   struct sw_winsys *winsys = screen->winsys;   const struct util_format_description *format_desc;   format_desc = util_format_description(format);   if (!format_desc)      return FALSE;   assert(target == PIPE_BUFFER ||          target == PIPE_TEXTURE_1D ||          target == PIPE_TEXTURE_1D_ARRAY ||          target == PIPE_TEXTURE_2D ||          target == PIPE_TEXTURE_2D_ARRAY ||          target == PIPE_TEXTURE_RECT ||          target == PIPE_TEXTURE_3D ||          target == PIPE_TEXTURE_CUBE ||          target == PIPE_TEXTURE_CUBE_ARRAY);   if (sample_count > 1)      return FALSE;   if (bind & PIPE_BIND_RENDER_TARGET) {      if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) {         /* this is a lie actually other formats COULD exist where we would fail */         if (format_desc->nr_channels < 3)            return FALSE;      }      else if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_RGB)         return FALSE;      if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN &&          format != PIPE_FORMAT_R11G11B10_FLOAT)         return FALSE;      assert(format_desc->block.width == 1);      assert(format_desc->block.height == 1);      if (format_desc->is_mixed)         return FALSE;      if (!format_desc->is_array && !format_desc->is_bitmask &&          format != PIPE_FORMAT_R11G11B10_FLOAT)         return FALSE;      /*       * XXX refuse formats known to crash in generate_unswizzled_blend().       * These include all 3-channel 24bit RGB8 variants, plus 48bit       * (except those using floats) 3-channel RGB16 variants (the latter       * seems to be more of a llvm bug though).       * The mesa state tracker only seems to use these for SINT/UINT formats.       */      if (format_desc->is_array && format_desc->nr_channels == 3) {         if (format_desc->block.bits == 24 || (format_desc->block.bits == 48 &&               !util_format_is_float(format))) {            return FALSE;         }      }   }   if (bind & PIPE_BIND_DISPLAY_TARGET) {      if(!winsys->is_displaytarget_format_supported(winsys, bind, format))         return FALSE;   }   if (bind & PIPE_BIND_DEPTH_STENCIL) {      if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)         return FALSE;      if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)         return FALSE;      /* TODO: Support stencil-only formats */      if (format_desc->swizzle[0] == UTIL_FORMAT_SWIZZLE_NONE) {         return FALSE;      }   }   if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {      /* Software decoding is not hooked up. */      return FALSE;   }   if (format_desc->layout == UTIL_FORMAT_LAYOUT_ETC &&       format != PIPE_FORMAT_ETC1_RGB8)      return FALSE;   if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {      return util_format_s3tc_enabled;//.........这里部分代码省略.........

/** * Returns the largest legal index value plus one for the current set * of bound vertex buffers.  Regardless of any other consideration, * all vertex lookups need to be clamped to 0..max_index-1 to prevent * an out-of-bound access. * * Note that if zero is returned it means that one or more buffers is * too small to contain any valid vertex data. */unsignedutil_draw_max_index(      const struct pipe_vertex_buffer *vertex_buffers,      const struct pipe_vertex_element *vertex_elements,      unsigned nr_vertex_elements,      const struct pipe_draw_info *info){   unsigned max_index;   unsigned i;   max_index = ~0U - 1;   for (i = 0; i < nr_vertex_elements; i++) {      const struct pipe_vertex_element *element =         &vertex_elements[i];      const struct pipe_vertex_buffer *buffer =         &vertex_buffers[element->vertex_buffer_index];      unsigned buffer_size;      const struct util_format_description *format_desc;      unsigned format_size;      if (!buffer->buffer) {         continue;      }      assert(buffer->buffer->height0 == 1);      assert(buffer->buffer->depth0 == 1);      buffer_size = buffer->buffer->width0;      format_desc = util_format_description(element->src_format);      assert(format_desc->block.width == 1);      assert(format_desc->block.height == 1);      assert(format_desc->block.bits % 8 == 0);      format_size = format_desc->block.bits/8;      if (buffer->buffer_offset >= buffer_size) {         /* buffer is too small */         return 0;      }      buffer_size -= buffer->buffer_offset;      if (element->src_offset >= buffer_size) {         /* buffer is too small */         return 0;      }      buffer_size -= element->src_offset;      if (format_size > buffer_size) {         /* buffer is too small */         return 0;      }      buffer_size -= format_size;      if (buffer->stride != 0) {         unsigned buffer_max_index;         buffer_max_index = buffer_size / buffer->stride;         if (element->instance_divisor == 0) {            /* Per-vertex data */            max_index = MIN2(max_index, buffer_max_index);         }         else {            /* Per-instance data. Simply make sure the state tracker didn't             * request more instances than those that fit in the buffer */            if ((info->start_instance + info->instance_count)/element->instance_divisor                > (buffer_max_index + 1)) {               /* FIXME: We really should stop thinking in terms of maximum                * indices/instances and simply start clamping against buffer                * size. */               debug_printf("%s: too many instances for vertex buffer/n",                            __FUNCTION__);               return 0;            }         }      }   }   return max_index + 1;}

/** * Called via glFlush/glFinish.  This is where we copy the contents * of the driver's color buffer into the user-specified buffer. */static booleanosmesa_st_framebuffer_flush_front(struct st_context_iface *stctx,                                  struct st_framebuffer_iface *stfbi,                                  enum st_attachment_type statt){    OSMesaContext osmesa = OSMesaGetCurrentContext();    struct osmesa_buffer *osbuffer = stfbi_to_osbuffer(stfbi);    struct pipe_context *pipe = stctx->pipe;    struct pipe_resource *res = osbuffer->textures[statt];    struct pipe_transfer *transfer = NULL;    struct pipe_box box;    void *map;    ubyte *src, *dst;    unsigned y, bytes, bpp;    int dst_stride;    if (osmesa->pp) {        struct pipe_resource *zsbuf = NULL;        unsigned i;        /* Find the z/stencil buffer if there is one */        for (i = 0; i < Elements(osbuffer->textures); i++) {            struct pipe_resource *res = osbuffer->textures[i];            if (res) {                const struct util_format_description *desc =                    util_format_description(res->format);                if (util_format_has_depth(desc)) {                    zsbuf = res;                    break;                }            }        }        /* run the postprocess stage(s) */        pp_run(osmesa->pp, res, res, zsbuf);    }    u_box_2d(0, 0, res->width0, res->height0, &box);    map = pipe->transfer_map(pipe, res, 0, PIPE_TRANSFER_READ, &box,                             &transfer);    /*     * Copy the color buffer from the resource to the user's buffer.     */    bpp = util_format_get_blocksize(osbuffer->visual.color_format);    src = map;    dst = osbuffer->map;    if (osmesa->user_row_length)        dst_stride = bpp * osmesa->user_row_length;    else        dst_stride = bpp * osbuffer->width;    bytes = bpp * res->width0;    if (osmesa->y_up) {        /* need to flip image upside down */        dst = dst + (res->height0 - 1) * dst_stride;        dst_stride = -dst_stride;    }    for (y = 0; y < res->height0; y++) {        memcpy(dst, src, bytes);        dst += dst_stride;        src += transfer->stride;    }    pipe->transfer_unmap(pipe, transfer);    return TRUE;}

//.........这里部分代码省略.........   float_buffer = align_malloc(buffer_size, 4096);   double_buffer = align_malloc(buffer_size, 4096);   half_buffer = align_malloc(buffer_size, 4096);   elts = align_malloc(count * sizeof *elts, 4096);   key.nr_elements = 1;   key.element[0].input_buffer = 0;   key.element[0].input_offset = 0;   key.element[0].output_offset = 0;   key.element[0].type = TRANSLATE_ELEMENT_NORMAL;   key.element[0].instance_divisor = 0;   srand(4359025);   /* avoid negative values that work badly when converted to unsigned format*/   for (i = 0; i < buffer_size; ++i)      byte_buffer[i] = rand() & 0x7f7f7f7f;   for (i = 0; i < buffer_size / sizeof(float); ++i)      float_buffer[i] = (float)rand_double();   for (i = 0; i < buffer_size / sizeof(double); ++i)      double_buffer[i] = rand_double();   for (i = 0; i < buffer_size / sizeof(double); ++i)      half_buffer[i] = util_float_to_half((float) rand_double());   for (i = 0; i < count; ++i)      elts[i] = i;   for (output_format = 1; output_format < PIPE_FORMAT_COUNT; ++output_format)   {      const struct util_format_description* output_format_desc = util_format_description(output_format);      unsigned output_format_size;      unsigned output_normalized = 0;      if (!output_format_desc            || !output_format_desc->fetch_rgba_float            || !output_format_desc->pack_rgba_float            || output_format_desc->colorspace != UTIL_FORMAT_COLORSPACE_RGB            || output_format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN            || !translate_is_output_format_supported(output_format))         continue;      for(i = 0; i < output_format_desc->nr_channels; ++i)      {         if(output_format_desc->channel[i].type != UTIL_FORMAT_TYPE_FLOAT)            output_normalized |= (1 << output_format_desc->channel[i].normalized);      }      output_format_size = util_format_get_stride(output_format, 1);      for (input_format = 1; input_format < PIPE_FORMAT_COUNT; ++input_format)      {         const struct util_format_description* input_format_desc = util_format_description(input_format);         unsigned input_format_size;         struct translate* translate[2];         unsigned fail = 0;         unsigned used_generic = 0;         unsigned input_normalized = 0;         boolean input_is_float = FALSE;         if (!input_format_desc               || !input_format_desc->fetch_rgba_float               || !input_format_desc->pack_rgba_float

void si_blit_uncompress_depth(struct pipe_context *ctx,		struct r600_resource_texture *texture,		struct r600_resource_texture *staging,		unsigned first_level, unsigned last_level,		unsigned first_layer, unsigned last_layer){	struct r600_context *rctx = (struct r600_context *)ctx;	unsigned layer, level, checked_last_layer, max_layer;	float depth = 1.0f;	const struct util_format_description *desc;	void *custom_dsa;	struct r600_resource_texture *flushed_depth_texture = staging ?			staging : texture->flushed_depth_texture;	if (!staging && !texture->dirty_db_mask)		return;	desc = util_format_description(flushed_depth_texture->resource.b.b.format);	switch (util_format_has_depth(desc) | util_format_has_stencil(desc) << 1) {	default:		assert(!"No depth or stencil to uncompress");	case 3:		custom_dsa = rctx->custom_dsa_flush_depth_stencil;		break;	case 2:		custom_dsa = rctx->custom_dsa_flush_stencil;		break;	case 1:		custom_dsa = rctx->custom_dsa_flush_depth;		break;	}	for (level = first_level; level <= last_level; level++) {		if (!staging && !(texture->dirty_db_mask & (1 << level)))			continue;		/* The smaller the mipmap level, the less layers there are		 * as far as 3D textures are concerned. */		max_layer = util_max_layer(&texture->resource.b.b, level);		checked_last_layer = last_layer < max_layer ? last_layer : max_layer;		for (layer = first_layer; layer <= checked_last_layer; layer++) {			struct pipe_surface *zsurf, *cbsurf, surf_tmpl;			surf_tmpl.format = texture->real_format;			surf_tmpl.u.tex.level = level;			surf_tmpl.u.tex.first_layer = layer;			surf_tmpl.u.tex.last_layer = layer;			zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);			surf_tmpl.format = flushed_depth_texture->real_format;			cbsurf = ctx->create_surface(ctx,					(struct pipe_resource*)flushed_depth_texture, &surf_tmpl);			r600_blitter_begin(ctx, R600_DECOMPRESS);			util_blitter_custom_depth_stencil(rctx->blitter, zsurf, cbsurf, ~0, custom_dsa, depth);			r600_blitter_end(ctx);			pipe_surface_reference(&zsurf, NULL);			pipe_surface_reference(&cbsurf, NULL);		}		/* The texture will always be dirty if some layers aren't flushed.		 * I don't think this case can occur though. */		if (!staging && first_layer == 0 && last_layer == max_layer) {			texture->dirty_db_mask &= ~(1 << level);		}	}}

/** * Query format support for creating a texture, drawing surface, etc. * /param format  the format to test * /param type  one of PIPE_TEXTURE, PIPE_SURFACE */static booleanllvmpipe_is_format_supported( struct pipe_screen *_screen,                              enum pipe_format format,                              enum pipe_texture_target target,                              unsigned sample_count,                              unsigned bind,                              unsigned geom_flags ){   struct llvmpipe_screen *screen = llvmpipe_screen(_screen);   struct sw_winsys *winsys = screen->winsys;   const struct util_format_description *format_desc;   format_desc = util_format_description(format);   if (!format_desc)      return FALSE;   assert(target == PIPE_BUFFER ||          target == PIPE_TEXTURE_1D ||          target == PIPE_TEXTURE_2D ||          target == PIPE_TEXTURE_RECT ||          target == PIPE_TEXTURE_3D ||          target == PIPE_TEXTURE_CUBE);   if (sample_count > 1)      return FALSE;   if (bind & PIPE_BIND_RENDER_TARGET) {      if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)         return FALSE;      if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)         return FALSE;      if (format_desc->block.width != 1 ||          format_desc->block.height != 1)         return FALSE;   }   if (bind & PIPE_BIND_DISPLAY_TARGET) {      if(!winsys->is_displaytarget_format_supported(winsys, bind, format))         return FALSE;   }   if (bind & PIPE_BIND_DEPTH_STENCIL) {      if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)         return FALSE;      if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)         return FALSE;      /* FIXME: Temporary restriction. See lp_state_fs.c. */      if (format_desc->block.bits != 32)         return FALSE;   }   if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {      return util_format_s3tc_enabled;   }   /*    * Everything else should be supported by u_format.    */   return TRUE;}

//.........这里部分代码省略.........   ptrans->level = level;   ptrans->usage = usage;   ptrans->box   = *box;   ptrans->stride = util_format_get_stride(format, box->width);   ptrans->layer_stride = ptrans->stride * box->height;   trans->staging = malloc(ptrans->layer_stride);   if (!trans->staging)      goto fail;   trans->ptr = helper->vtbl->transfer_map(pctx, prsc, level, usage, box,                                           &trans->trans);   if (!trans->ptr)      goto fail;   if (prsc->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {      struct pipe_resource *stencil = helper->vtbl->get_stencil(prsc);      trans->ptr2 = helper->vtbl->transfer_map(pctx, stencil, level,                                               usage, box, &trans->trans2);      if (needs_pack(usage)) {         util_format_z32_float_s8x24_uint_pack_z_float(trans->staging,                                                       ptrans->stride,                                                       trans->ptr,                                                       trans->trans->stride,                                                       width, height);         util_format_z32_float_s8x24_uint_pack_s_8uint(trans->staging,                                                       ptrans->stride,                                                       trans->ptr2,                                                       trans->trans2->stride,                                                       width, height);      }   } else if (needs_pack(usage) &&              util_format_description(prsc->format)->layout == UTIL_FORMAT_LAYOUT_RGTC) {      switch (prsc->format) {      case PIPE_FORMAT_RGTC1_UNORM:      case PIPE_FORMAT_RGTC1_SNORM:      case PIPE_FORMAT_LATC1_UNORM:      case PIPE_FORMAT_LATC1_SNORM:         util_format_rgtc1_unorm_pack_rgba_8unorm(trans->staging,                                                  ptrans->stride,                                                  trans->ptr,                                                  trans->trans->stride,                                                  width, height);         break;      case PIPE_FORMAT_RGTC2_UNORM:      case PIPE_FORMAT_RGTC2_SNORM:      case PIPE_FORMAT_LATC2_UNORM:      case PIPE_FORMAT_LATC2_SNORM:         util_format_rgtc2_unorm_pack_rgba_8unorm(trans->staging,                                                  ptrans->stride,                                                  trans->ptr,                                                  trans->trans->stride,                                                  width, height);         break;      default:         assert(!"Unexpected format");         break;      }   } else {      unreachable("bleh");   }   *pptrans = ptrans;   return trans->staging;

static void r600_blit_decompress_depth(struct pipe_context *ctx,                                       struct r600_texture *texture,                                       struct r600_texture *staging,                                       unsigned first_level, unsigned last_level,                                       unsigned first_layer, unsigned last_layer,                                       unsigned first_sample, unsigned last_sample){    struct r600_context *rctx = (struct r600_context *)ctx;    unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;    struct r600_texture *flushed_depth_texture = staging ?                staging : texture->flushed_depth_texture;    const struct util_format_description *desc =        util_format_description(texture->resource.b.b.format);    float depth;    if (!staging && !texture->dirty_level_mask)        return;    max_sample = u_max_sample(&texture->resource.b.b);    /* XXX Decompressing MSAA depth textures is broken on R6xx.     * There is also a hardlock if CMASK and FMASK are not present.     * Just skip this until we find out how to fix it. */    if (rctx->b.chip_class == R600 && max_sample > 0) {        texture->dirty_level_mask = 0;        return;    }    if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 ||            rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635)        depth = 0.0f;    else        depth = 1.0f;    /* Enable decompression in DB_RENDER_CONTROL */    rctx->db_misc_state.flush_depthstencil_through_cb = true;    rctx->db_misc_state.copy_depth = util_format_has_depth(desc);    rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc);    rctx->db_misc_state.copy_sample = first_sample;    r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);    for (level = first_level; level <= last_level; level++) {        if (!staging && !(texture->dirty_level_mask & (1 << level)))            continue;        /* The smaller the mipmap level, the less layers there are         * as far as 3D textures are concerned. */        max_layer = util_max_layer(&texture->resource.b.b, level);        checked_last_layer = last_layer < max_layer ? last_layer : max_layer;        for (layer = first_layer; layer <= checked_last_layer; layer++) {            for (sample = first_sample; sample <= last_sample; sample++) {                struct pipe_surface *zsurf, *cbsurf, surf_tmpl;                if (sample != rctx->db_misc_state.copy_sample) {                    rctx->db_misc_state.copy_sample = sample;                    r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);                }                surf_tmpl.format = texture->resource.b.b.format;                surf_tmpl.u.tex.level = level;                surf_tmpl.u.tex.first_layer = layer;                surf_tmpl.u.tex.last_layer = layer;                zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);                surf_tmpl.format = flushed_depth_texture->resource.b.b.format;                cbsurf = ctx->create_surface(ctx,                                             &flushed_depth_texture->resource.b.b, &surf_tmpl);                r600_blitter_begin(ctx, R600_DECOMPRESS);                util_blitter_custom_depth_stencil(rctx->blitter, zsurf, cbsurf, 1 << sample,                                                  rctx->custom_dsa_flush, depth);                r600_blitter_end(ctx);                pipe_surface_reference(&zsurf, NULL);                pipe_surface_reference(&cbsurf, NULL);            }        }        /* The texture will always be dirty if some layers or samples aren't flushed.         * I don't think this case occurs often though. */        if (!staging &&                first_layer == 0 && last_layer == max_layer &&                first_sample == 0 && last_sample == max_sample) {            texture->dirty_level_mask &= ~(1 << level);        }    }    /* reenable compression in DB_RENDER_CONTROL */    rctx->db_misc_state.flush_depthstencil_through_cb = false;    r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);}

//.........这里部分代码省略.........	if (prsc->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT ||		prsc->format == PIPE_FORMAT_X32_S8X24_UINT) {		assert(trans->base.box.depth == 1);		trans->base.stride = trans->base.box.width * rsc->cpp * 2;		trans->staging = malloc(trans->base.stride * trans->base.box.height);		if (!trans->staging)			goto fail;		/* if we're not discarding the whole range (or resource), we must copy		 * the real data in.		 */		if (!(usage & (PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE |					   PIPE_TRANSFER_DISCARD_RANGE))) {			struct fd_resource_slice *sslice =				fd_resource_slice(rsc->stencil, level);			void *sbuf = fd_bo_map(rsc->stencil->bo);			if (!sbuf)				goto fail;			float *depth = (float *)(buf + slice->offset +				fd_resource_layer_offset(rsc, slice, box->z) +				box->y * slice->pitch * 4 + box->x * 4);			uint8_t *stencil = sbuf + sslice->offset +				fd_resource_layer_offset(rsc->stencil, sslice, box->z) +				box->y * sslice->pitch + box->x;			if (format != PIPE_FORMAT_X32_S8X24_UINT)				util_format_z32_float_s8x24_uint_pack_z_float(						trans->staging, trans->base.stride,						depth, slice->pitch * 4,						box->width, box->height);			util_format_z32_float_s8x24_uint_pack_s_8uint(					trans->staging, trans->base.stride,					stencil, sslice->pitch,					box->width, box->height);		}		buf = trans->staging;		offset = 0;	} else if (rsc->internal_format != format &&			   util_format_description(format)->layout == UTIL_FORMAT_LAYOUT_RGTC) {		assert(trans->base.box.depth == 1);		trans->base.stride = util_format_get_stride(				format, trans->base.box.width);		trans->staging = malloc(				util_format_get_2d_size(format, trans->base.stride,										trans->base.box.height));		if (!trans->staging)			goto fail;		/* if we're not discarding the whole range (or resource), we must copy		 * the real data in.		 */		if (!(usage & (PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE |					   PIPE_TRANSFER_DISCARD_RANGE))) {			uint8_t *rgba8 = (uint8_t *)buf + slice->offset +				fd_resource_layer_offset(rsc, slice, box->z) +				box->y * slice->pitch * rsc->cpp + box->x * rsc->cpp;			switch (format) {			case PIPE_FORMAT_RGTC1_UNORM:			case PIPE_FORMAT_RGTC1_SNORM:			case PIPE_FORMAT_LATC1_UNORM:			case PIPE_FORMAT_LATC1_SNORM:				util_format_rgtc1_unorm_pack_rgba_8unorm(					trans->staging, trans->base.stride,					rgba8, slice->pitch * rsc->cpp,					box->width, box->height);				break;			case PIPE_FORMAT_RGTC2_UNORM:			case PIPE_FORMAT_RGTC2_SNORM:			case PIPE_FORMAT_LATC2_UNORM:			case PIPE_FORMAT_LATC2_SNORM:				util_format_rgtc2_unorm_pack_rgba_8unorm(					trans->staging, trans->base.stride,					rgba8, slice->pitch * rsc->cpp,					box->width, box->height);				break;			default:				assert(!"Unexpected format");				break;			}		}		buf = trans->staging;		offset = 0;	}	*pptrans = ptrans;	return buf + offset;fail:	fd_resource_transfer_unmap(pctx, ptrans);	return NULL;}

static bool do_hardware_msaa_resolve(struct pipe_context *ctx,                                     const struct pipe_blit_info *info){    struct r600_context *rctx = (struct r600_context*)ctx;    struct r600_texture *dst = (struct r600_texture*)info->dst.resource;    unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);    unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);    enum pipe_format format = info->src.format;    unsigned sample_mask =        rctx->b.chip_class == CAYMAN ? ~0 :        ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1);    struct pipe_resource *tmp, templ;    struct pipe_blit_info blit;    /* Check basic requirements for hw resolve. */    if (!(info->src.resource->nr_samples > 1 &&            info->dst.resource->nr_samples <= 1 &&            !util_format_is_pure_integer(format) &&            !util_format_is_depth_or_stencil(format) &&            util_max_layer(info->src.resource, 0) == 0))        return false;    /* Check the remaining requirements for hw resolve. */    if (util_max_layer(info->dst.resource, info->dst.level) == 0 &&            util_is_format_compatible(util_format_description(info->src.format),                                      util_format_description(info->dst.format)) &&            !info->scissor_enable &&            (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&            dst_width == info->src.resource->width0 &&            dst_height == info->src.resource->height0 &&            info->dst.box.x == 0 &&            info->dst.box.y == 0 &&            info->dst.box.width == dst_width &&            info->dst.box.height == dst_height &&            info->dst.box.depth == 1 &&            info->src.box.x == 0 &&            info->src.box.y == 0 &&            info->src.box.width == dst_width &&            info->src.box.height == dst_height &&            info->src.box.depth == 1 &&            dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&            (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {        r600_blitter_begin(ctx, R600_COLOR_RESOLVE |                           (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));        util_blitter_custom_resolve_color(rctx->blitter,                                          info->dst.resource, info->dst.level,                                          info->dst.box.z,                                          info->src.resource, info->src.box.z,                                          sample_mask, rctx->custom_blend_resolve,                                          format);        r600_blitter_end(ctx);        return true;    }    /* Shader-based resolve is VERY SLOW. Instead, resolve into     * a temporary texture and blit.     */    memset(&templ, 0, sizeof(templ));    templ.target = PIPE_TEXTURE_2D;    templ.format = info->src.resource->format;    templ.width0 = info->src.resource->width0;    templ.height0 = info->src.resource->height0;    templ.depth0 = 1;    templ.array_size = 1;    templ.usage = PIPE_USAGE_DEFAULT;    templ.flags = R600_RESOURCE_FLAG_FORCE_TILING;    tmp = ctx->screen->resource_create(ctx->screen, &templ);    if (!tmp)        return false;    /* resolve */    r600_blitter_begin(ctx, R600_COLOR_RESOLVE |                       (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));    util_blitter_custom_resolve_color(rctx->blitter, tmp, 0, 0,                                      info->src.resource, info->src.box.z,                                      sample_mask, rctx->custom_blend_resolve,                                      format);    r600_blitter_end(ctx);    /* blit */    blit = *info;    blit.src.resource = tmp;    blit.src.box.z = 0;    r600_blitter_begin(ctx, R600_BLIT |                       (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));    util_blitter_blit(rctx->blitter, &blit);    r600_blitter_end(ctx);    pipe_resource_reference(&tmp, NULL);    return true;}

/** * Create a new texture object, using the given template info. */static struct pipe_resource *fd_resource_create(struct pipe_screen *pscreen,		const struct pipe_resource *tmpl){	struct fd_resource *rsc = CALLOC_STRUCT(fd_resource);	struct pipe_resource *prsc = &rsc->base.b;	enum pipe_format format = tmpl->format;	uint32_t size, alignment;	DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "			"nr_samples=%u, usage=%u, bind=%x, flags=%x",			tmpl->target, util_format_name(format),			tmpl->width0, tmpl->height0, tmpl->depth0,			tmpl->array_size, tmpl->last_level, tmpl->nr_samples,			tmpl->usage, tmpl->bind, tmpl->flags);	if (!rsc)		return NULL;	*prsc = *tmpl;	pipe_reference_init(&prsc->reference, 1);	list_inithead(&rsc->list);	prsc->screen = pscreen;	util_range_init(&rsc->valid_buffer_range);	rsc->base.vtbl = &fd_resource_vtbl;	if (format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)		format = PIPE_FORMAT_Z32_FLOAT;	else if (fd_screen(pscreen)->gpu_id < 400 &&			 util_format_description(format)->layout == UTIL_FORMAT_LAYOUT_RGTC)		format = PIPE_FORMAT_R8G8B8A8_UNORM;	rsc->internal_format = format;	rsc->cpp = util_format_get_blocksize(format);	assert(rsc->cpp);	alignment = slice_alignment(pscreen, tmpl);	if (is_a4xx(fd_screen(pscreen))) {		switch (tmpl->target) {		case PIPE_TEXTURE_3D:			rsc->layer_first = false;			break;		default:			rsc->layer_first = true;			alignment = 1;			break;		}	}	size = setup_slices(rsc, alignment, format);	if (rsc->layer_first) {		rsc->layer_size = align(size, 4096);		size = rsc->layer_size * prsc->array_size;	}	realloc_bo(rsc, size);	if (!rsc->bo)		goto fail;	/* There is no native Z32F_S8 sampling or rendering format, so this must	 * be emulated via two separate textures. The depth texture still keeps	 * its Z32F_S8 format though, and we also keep a reference to a separate	 * S8 texture.	 */	if (tmpl->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {		struct pipe_resource stencil = *tmpl;		stencil.format = PIPE_FORMAT_S8_UINT;		rsc->stencil = fd_resource(fd_resource_create(pscreen, &stencil));		if (!rsc->stencil)			goto fail;	}	return prsc;fail:	fd_resource_destroy(pscreen, prsc);	return NULL;}

static void *nvfx_vtxelts_state_create(struct pipe_context *pipe,			  unsigned num_elements,			  const struct pipe_vertex_element *elements){	struct nvfx_vtxelt_state *cso = CALLOC_STRUCT(nvfx_vtxelt_state);	struct translate_key transkey;	unsigned per_vertex_size[16];	unsigned vb_compacted_index[16];	if(num_elements > 16)	{		_debug_printf("Error: application attempted to use %u vertex elements, but only 16 are supported: ignoring the rest/n", num_elements);		num_elements = 16;	}	memset(per_vertex_size, 0, sizeof(per_vertex_size));	memcpy(cso->pipe, elements, num_elements * sizeof(elements[0]));	cso->num_elements = num_elements;	cso->needs_translate = FALSE;	transkey.nr_elements = 0;	transkey.output_stride = 0;	for(unsigned i = 0; i < num_elements; ++i)        {		const struct pipe_vertex_element* ve = &elements[i];		if(!ve->instance_divisor)                        per_vertex_size[ve->vertex_buffer_index] += util_format_get_stride(ve->src_format, 1);        }        for(unsigned i = 0; i < 16; ++i)        {                if(per_vertex_size[i])                {                        unsigned idx = cso->num_per_vertex_buffer_infos++;                        cso->per_vertex_buffer_info[idx].vertex_buffer_index = i;                        cso->per_vertex_buffer_info[idx].per_vertex_size = per_vertex_size[i];                        vb_compacted_index[i] = idx;                }        }	for(unsigned i = 0; i < num_elements; ++i)	{		const struct pipe_vertex_element* ve = &elements[i];		unsigned type = nvfx_vertex_formats[ve->src_format];		unsigned ncomp = util_format_get_nr_components(ve->src_format);		//if(ve->frequency != PIPE_ELEMENT_FREQUENCY_PER_VERTEX)		if(ve->instance_divisor)		{			struct nvfx_low_frequency_element* lfve;			cso->vtxfmt[i] = NV30_3D_VTXFMT_TYPE_V32_FLOAT;			//if(ve->frequency == PIPE_ELEMENT_FREQUENCY_CONSTANT)			if(0)				lfve = &cso->constant[cso->num_constant++];			else			{				lfve = &cso->per_instance[cso->num_per_instance++].base;				((struct nvfx_per_instance_element*)lfve)->instance_divisor = ve->instance_divisor;			}                        lfve->idx = i;                        lfve->vertex_buffer_index = ve->vertex_buffer_index;                        lfve->src_offset = ve->src_offset;                        lfve->fetch_rgba_float = util_format_description(ve->src_format)->fetch_rgba_float;                        lfve->ncomp = ncomp;		}		else		{			unsigned idx;			idx = cso->num_per_vertex++;			cso->per_vertex[idx].idx = i;			cso->per_vertex[idx].vertex_buffer_index = ve->vertex_buffer_index;			cso->per_vertex[idx].src_offset = ve->src_offset;			idx = transkey.nr_elements++;			transkey.element[idx].input_format = ve->src_format;			transkey.element[idx].input_buffer = vb_compacted_index[ve->vertex_buffer_index];			transkey.element[idx].input_offset = ve->src_offset;			transkey.element[idx].instance_divisor = 0;			transkey.element[idx].type = TRANSLATE_ELEMENT_NORMAL;			if(type)			{				transkey.element[idx].output_format = ve->src_format;				cso->vtxfmt[i] = (ncomp << NV30_3D_VTXFMT_SIZE__SHIFT) | type;			}			else			{				unsigned float32[4] = {PIPE_FORMAT_R32_FLOAT, PIPE_FORMAT_R32G32_FLOAT, PIPE_FORMAT_R32G32B32_FLOAT, PIPE_FORMAT_R32G32B32A32_FLOAT};				transkey.element[idx].output_format = float32[ncomp - 1];				cso->needs_translate = TRUE;				cso->vtxfmt[i] = (ncomp << NV30_3D_VTXFMT_SIZE__SHIFT) | NV30_3D_VTXFMT_TYPE_V32_FLOAT;			}			transkey.element[idx].output_offset = transkey.output_stride;			transkey.output_stride += (util_format_get_stride(transkey.element[idx].output_format, 1) + 3) & ~3;		}	}//.........这里部分代码省略.........

static boolean r300_is_format_supported(struct pipe_screen* screen,                                        enum pipe_format format,                                        enum pipe_texture_target target,                                        unsigned sample_count,                                        unsigned usage){    uint32_t retval = 0;    boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;    boolean is_r500 = r300_screen(screen)->caps.is_r500;    boolean is_r400 = r300_screen(screen)->caps.is_r400;    boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||                              format == PIPE_FORMAT_R10G10B10X2_SNORM ||                              format == PIPE_FORMAT_B10G10R10A2_UNORM ||                              format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;    boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||                       format == PIPE_FORMAT_RGTC1_SNORM ||                       format == PIPE_FORMAT_LATC1_UNORM ||                       format == PIPE_FORMAT_LATC1_SNORM;    boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||                       format == PIPE_FORMAT_RGTC2_SNORM ||                       format == PIPE_FORMAT_LATC2_UNORM ||                       format == PIPE_FORMAT_LATC2_SNORM;    boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||                            format == PIPE_FORMAT_R16G16_FLOAT ||                            format == PIPE_FORMAT_A16_FLOAT ||                            format == PIPE_FORMAT_L16_FLOAT ||                            format == PIPE_FORMAT_L16A16_FLOAT ||                            format == PIPE_FORMAT_I16_FLOAT;    boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||                            format == PIPE_FORMAT_R16G16_FLOAT ||                            format == PIPE_FORMAT_R16G16B16_FLOAT ||                            format == PIPE_FORMAT_R16G16B16A16_FLOAT;    const struct util_format_description *desc;    if (!util_format_is_supported(format, usage))       return FALSE;    /* Check multisampling support. */    switch (sample_count) {        case 0:        case 1:            break;        case 2:        case 4:        case 6:            /* We need DRM 2.8.0. */            if (!drm_2_8_0) {                return FALSE;            }            /* Only support R500, because I didn't test older chipsets,             * but MSAA should work there too. */            if (!is_r500 && !debug_get_bool_option("RADEON_MSAA", FALSE)) {                return FALSE;            }            /* No texturing and scanout. */            if (usage & (PIPE_BIND_SAMPLER_VIEW |                         PIPE_BIND_DISPLAY_TARGET |                         PIPE_BIND_SCANOUT)) {                return FALSE;            }            desc = util_format_description(format);            if (is_r500) {                /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */                if (!util_format_is_depth_or_stencil(format) &&                    !util_format_is_rgba8_variant(desc) &&                    !util_format_is_rgba1010102_variant(desc) &&                    format != PIPE_FORMAT_R16G16B16A16_FLOAT) {                    return FALSE;                }            } else {                /* Only allow depth/stencil, RGBA8. */                if (!util_format_is_depth_or_stencil(format) &&                    !util_format_is_rgba8_variant(desc)) {                    return FALSE;                }            }            break;        default:            return FALSE;    }    /* Check sampler format support. */    if ((usage & PIPE_BIND_SAMPLER_VIEW) &&        /* ATI1N is r5xx-only. */        (is_r500 || !is_ati1n) &&        /* ATI2N is supported on r4xx-r5xx. */        (is_r400 || is_r500 || !is_ati2n) &&        /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */        (drm_2_8_0 || !is_x16f_xy16f) &&        r300_is_sampler_format_supported(format)) {        retval |= PIPE_BIND_SAMPLER_VIEW;    }    /* Check colorbuffer format support. */    if ((usage & (PIPE_BIND_RENDER_TARGET |                  PIPE_BIND_DISPLAY_TARGET |                  PIPE_BIND_SCANOUT |                  PIPE_BIND_SHARED)) &&//.........这里部分代码省略.........

/** * Query format support for creating a texture, drawing surface, etc. * /param format  the format to test * /param type  one of PIPE_TEXTURE, PIPE_SURFACE */static booleanllvmpipe_is_format_supported( struct pipe_screen *_screen,                              enum pipe_format format,                              enum pipe_texture_target target,                              unsigned sample_count,                              unsigned bind){   struct llvmpipe_screen *screen = llvmpipe_screen(_screen);   struct sw_winsys *winsys = screen->winsys;   const struct util_format_description *format_desc;   format_desc = util_format_description(format);   if (!format_desc)      return FALSE;   assert(target == PIPE_BUFFER ||          target == PIPE_TEXTURE_1D ||          target == PIPE_TEXTURE_1D_ARRAY ||          target == PIPE_TEXTURE_2D ||          target == PIPE_TEXTURE_2D_ARRAY ||          target == PIPE_TEXTURE_RECT ||          target == PIPE_TEXTURE_3D ||          target == PIPE_TEXTURE_CUBE ||          target == PIPE_TEXTURE_CUBE_ARRAY);   if (sample_count > 1)      return FALSE;   if (bind & PIPE_BIND_RENDER_TARGET) {      if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) {         /* this is a lie actually other formats COULD exist where we would fail */         if (format_desc->nr_channels < 3)            return FALSE;      }      else if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_RGB)         return FALSE;      if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN &&          format != PIPE_FORMAT_R11G11B10_FLOAT)         return FALSE;      assert(format_desc->block.width == 1);      assert(format_desc->block.height == 1);      if (format_desc->is_mixed)         return FALSE;      if (!format_desc->is_array && !format_desc->is_bitmask &&          format != PIPE_FORMAT_R11G11B10_FLOAT)         return FALSE;   }   if ((bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW)) &&       ((bind & PIPE_BIND_DISPLAY_TARGET) == 0)) {      /* Disable all 3-channel formats, where channel size != 32 bits.       * In some cases we run into crashes (in generate_unswizzled_blend()),       * for 3-channel RGB16 variants, there was an apparent LLVM bug.       * In any case, disabling the shallower 3-channel formats avoids a       * number of issues with GL_ARB_copy_image support.       */      if (format_desc->is_array &&          format_desc->nr_channels == 3 &&          format_desc->block.bits != 96) {         return FALSE;      }   }   if (bind & PIPE_BIND_DISPLAY_TARGET) {      if(!winsys->is_displaytarget_format_supported(winsys, bind, format))         return FALSE;   }   if (bind & PIPE_BIND_DEPTH_STENCIL) {      if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)         return FALSE;      if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)         return FALSE;      /* TODO: Support stencil-only formats */      if (format_desc->swizzle[0] == PIPE_SWIZZLE_NONE) {         return FALSE;      }   }   if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC ||       format_desc->layout == UTIL_FORMAT_LAYOUT_ASTC) {      /* Software decoding is not hooked up. */      return FALSE;   }   if (format_desc->layout == UTIL_FORMAT_LAYOUT_ETC &&       format != PIPE_FORMAT_ETC1_RGB8)      return FALSE;//.........这里部分代码省略.........

static void si_blit_decompress_depth(struct pipe_context *ctx,				     struct r600_texture *texture,				     struct r600_texture *staging,				     unsigned first_level, unsigned last_level,				     unsigned first_layer, unsigned last_layer,				     unsigned first_sample, unsigned last_sample){	struct si_context *sctx = (struct si_context *)ctx;	unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;	float depth = 1.0f;	const struct util_format_description *desc;	struct r600_texture *flushed_depth_texture = staging ?			staging : texture->flushed_depth_texture;	if (!staging && !texture->dirty_level_mask)		return;	max_sample = u_max_sample(&texture->resource.b.b);	desc = util_format_description(flushed_depth_texture->resource.b.b.format);	if (util_format_has_depth(desc))		sctx->dbcb_depth_copy_enabled = true;	if (util_format_has_stencil(desc))		sctx->dbcb_stencil_copy_enabled = true;	assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);	for (level = first_level; level <= last_level; level++) {		if (!staging && !(texture->dirty_level_mask & (1 << level)))			continue;		/* The smaller the mipmap level, the less layers there are		 * as far as 3D textures are concerned. */		max_layer = util_max_layer(&texture->resource.b.b, level);		checked_last_layer = last_layer < max_layer ? last_layer : max_layer;		for (layer = first_layer; layer <= checked_last_layer; layer++) {			for (sample = first_sample; sample <= last_sample; sample++) {				struct pipe_surface *zsurf, *cbsurf, surf_tmpl;				sctx->dbcb_copy_sample = sample;				si_mark_atom_dirty(sctx, &sctx->db_render_state);				surf_tmpl.format = texture->resource.b.b.format;				surf_tmpl.u.tex.level = level;				surf_tmpl.u.tex.first_layer = layer;				surf_tmpl.u.tex.last_layer = layer;				zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);				surf_tmpl.format = flushed_depth_texture->resource.b.b.format;				cbsurf = ctx->create_surface(ctx,						(struct pipe_resource*)flushed_depth_texture, &surf_tmpl);				si_blitter_begin(ctx, SI_DECOMPRESS);				util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,								  sctx->custom_dsa_flush, depth);				si_blitter_end(ctx);				pipe_surface_reference(&zsurf, NULL);				pipe_surface_reference(&cbsurf, NULL);			}		}		/* The texture will always be dirty if some layers aren't flushed.		 * I don't think this case can occur though. */		if (!staging &&		    first_layer == 0 && last_layer == max_layer &&		    first_sample == 0 && last_sample == max_sample) {			texture->dirty_level_mask &= ~(1 << level);		}	}	sctx->dbcb_depth_copy_enabled = false;	sctx->dbcb_stencil_copy_enabled = false;	si_mark_atom_dirty(sctx, &sctx->db_render_state);}

/** * Query format support for creating a texture, drawing surface, etc. * /param format  the format to test * /param type  one of PIPE_TEXTURE, PIPE_SURFACE */static booleansoftpipe_is_format_supported( struct pipe_screen *screen,                              enum pipe_format format,                              enum pipe_texture_target target,                              unsigned sample_count,                              unsigned bind){   struct sw_winsys *winsys = softpipe_screen(screen)->winsys;   const struct util_format_description *format_desc;   assert(target == PIPE_BUFFER ||          target == PIPE_TEXTURE_1D ||          target == PIPE_TEXTURE_1D_ARRAY ||          target == PIPE_TEXTURE_2D ||          target == PIPE_TEXTURE_2D_ARRAY ||          target == PIPE_TEXTURE_RECT ||          target == PIPE_TEXTURE_3D ||          target == PIPE_TEXTURE_CUBE ||          target == PIPE_TEXTURE_CUBE_ARRAY);   format_desc = util_format_description(format);   if (!format_desc)      return FALSE;   if (sample_count > 1)      return FALSE;   if (bind & (PIPE_BIND_DISPLAY_TARGET |               PIPE_BIND_SCANOUT |               PIPE_BIND_SHARED)) {      if(!winsys->is_displaytarget_format_supported(winsys, bind, format))         return FALSE;   }   if (bind & PIPE_BIND_RENDER_TARGET) {      if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)         return FALSE;      /*       * Although possible, it is unnatural to render into compressed or YUV       * surfaces. So disable these here to avoid going into weird paths       * inside the state trackers.       */      if (format_desc->block.width != 1 ||          format_desc->block.height != 1)         return FALSE;   }   if (bind & PIPE_BIND_DEPTH_STENCIL) {      if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)         return FALSE;   }   if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {      /* Software decoding is not hooked up. */      return FALSE;   }   /*    * All other operations (sampling, transfer, etc).    */   if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {      return util_format_s3tc_enabled;   }   /*    * Everything else should be supported by u_format.    */   return TRUE;}

static struct r600_resource_texture *r600_texture_create_object(struct pipe_screen *screen,			   const struct pipe_resource *base,			   unsigned array_mode,			   unsigned pitch_in_bytes_override,			   unsigned max_buffer_size,			   struct pb_buffer *buf,			   boolean alloc_bo,			   struct radeon_surface *surface){	struct r600_resource_texture *rtex;	struct si_resource *resource;	struct r600_screen *rscreen = (struct r600_screen*)screen;	int r;	rtex = CALLOC_STRUCT(r600_resource_texture);	if (rtex == NULL)		return NULL;	resource = &rtex->resource;	resource->b.b = *base;	resource->b.vtbl = &r600_texture_vtbl;	pipe_reference_init(&resource->b.b.reference, 1);	resource->b.b.screen = screen;	rtex->pitch_override = pitch_in_bytes_override;	rtex->real_format = base->format;	/* don't include stencil-only formats which we don't support for rendering */	rtex->is_depth = util_format_has_depth(util_format_description(rtex->resource.b.b.format));	rtex->surface = *surface;	r = r600_setup_surface(screen, rtex, array_mode, pitch_in_bytes_override);	if (r) {		FREE(rtex);		return NULL;	}	/* Now create the backing buffer. */	if (!buf && alloc_bo) {		unsigned base_align = rtex->surface.bo_alignment;		unsigned size = rtex->surface.bo_size;		base_align = rtex->surface.bo_alignment;		if (!si_init_resource(rscreen, resource, size, base_align, FALSE, base->usage)) {			FREE(rtex);			return NULL;		}	} else if (buf) {		resource->buf = buf;		resource->cs_buf = rscreen->ws->buffer_get_cs_handle(buf);		resource->domains = RADEON_DOMAIN_GTT | RADEON_DOMAIN_VRAM;	}	if (debug_get_option_print_texdepth() && rtex->is_depth) {		printf("Texture: npix_x=%u, npix_y=%u, npix_z=%u, blk_w=%u, "		       "blk_h=%u, blk_d=%u, array_size=%u, last_level=%u, "		       "bpe=%u, nsamples=%u, flags=%u/n",		       rtex->surface.npix_x, rtex->surface.npix_y,		       rtex->surface.npix_z, rtex->surface.blk_w,		       rtex->surface.blk_h, rtex->surface.blk_d,		       rtex->surface.array_size, rtex->surface.last_level,		       rtex->surface.bpe, rtex->surface.nsamples,		       rtex->surface.flags);		if (rtex->surface.flags & RADEON_SURF_ZBUFFER) {			for (int i = 0; i <= rtex->surface.last_level; i++) {				printf("  Z %i: offset=%llu, slice_size=%llu, npix_x=%u, "				       "npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "				       "nblk_z=%u, pitch_bytes=%u, mode=%u/n",				       i, rtex->surface.level[i].offset,				       rtex->surface.level[i].slice_size,				       rtex->surface.level[i].npix_x,				       rtex->surface.level[i].npix_y,				       rtex->surface.level[i].npix_z,				       rtex->surface.level[i].nblk_x,				       rtex->surface.level[i].nblk_y,				       rtex->surface.level[i].nblk_z,				       rtex->surface.level[i].pitch_bytes,				       rtex->surface.level[i].mode);			}		}		if (rtex->surface.flags & RADEON_SURF_SBUFFER) {			for (int i = 0; i <= rtex->surface.last_level; i++) {				printf("  S %i: offset=%llu, slice_size=%llu, npix_x=%u, "				       "npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "				       "nblk_z=%u, pitch_bytes=%u, mode=%u/n",				       i, rtex->surface.stencil_level[i].offset,				       rtex->surface.stencil_level[i].slice_size,				       rtex->surface.stencil_level[i].npix_x,				       rtex->surface.stencil_level[i].npix_y,				       rtex->surface.stencil_level[i].npix_z,				       rtex->surface.stencil_level[i].nblk_x,				       rtex->surface.stencil_level[i].nblk_y,				       rtex->surface.stencil_level[i].nblk_z,				       rtex->surface.stencil_level[i].pitch_bytes,				       rtex->surface.stencil_level[i].mode);			}		}	}	return rtex;}

static void vi_get_fast_clear_parameters(enum pipe_format surface_format,					 const union pipe_color_union *color,					 uint32_t* reset_value,					 bool* clear_words_needed){	bool values[4] = {};	int i;	bool main_value = false;	bool extra_value = false;	int extra_channel;	const struct util_format_description *desc = util_format_description(surface_format);	*clear_words_needed = true;	*reset_value = 0x20202020U;	/* If we want to clear without needing a fast clear eliminate step, we	 * can set each channel to 0 or 1 (or 0/max for integer formats). We	 * have two sets of flags, one for the last or first channel(extra) and	 * one for the other channels(main).	 */	if (surface_format == PIPE_FORMAT_R11G11B10_FLOAT ||	    surface_format == PIPE_FORMAT_B5G6R5_UNORM ||	    surface_format == PIPE_FORMAT_B5G6R5_SRGB) {		extra_channel = -1;	} else if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN) {		if(r600_translate_colorswap(surface_format) <= 1)			extra_channel = desc->nr_channels - 1;		else			extra_channel = 0;	} else		return;	for (i = 0; i < 4; ++i) {		int index = desc->swizzle[i] - UTIL_FORMAT_SWIZZLE_X;		if (desc->swizzle[i] < UTIL_FORMAT_SWIZZLE_X ||		    desc->swizzle[i] > UTIL_FORMAT_SWIZZLE_W)			continue;		if (util_format_is_pure_sint(surface_format)) {			values[i] = color->i[i] != 0;			if (color->i[i] != 0 && color->i[i] != INT32_MAX)				return;		} else if (util_format_is_pure_uint(surface_format)) {			values[i] = color->ui[i] != 0U;			if (color->ui[i] != 0U && color->ui[i] != UINT32_MAX)				return;		} else {			values[i] = color->f[i] != 0.0F;			if (color->f[i] != 0.0F && color->f[i] != 1.0F)				return;		}		if (index == extra_channel)			extra_value = values[i];		else			main_value = values[i];	}	for (int i = 0; i < 4; ++i)		if (values[i] != main_value &&		    desc->swizzle[i] - UTIL_FORMAT_SWIZZLE_X != extra_channel &&		    desc->swizzle[i] >= UTIL_FORMAT_SWIZZLE_X &&		    desc->swizzle[i] <= UTIL_FORMAT_SWIZZLE_W)			return;	*clear_words_needed = false;	if (main_value)		*reset_value |= 0x80808080U;	if (extra_value)		*reset_value |= 0x40404040U;}

struct pipe_sampler_view *nvc0_create_texture_view(struct pipe_context *pipe,                         struct pipe_resource *texture,                         const struct pipe_sampler_view *templ,                         uint32_t flags,                         enum pipe_texture_target target){   const struct util_format_description *desc;   uint64_t address;   uint32_t *tic;   uint32_t swz[4];   uint32_t width, height;   uint32_t depth;   struct nv50_tic_entry *view;   struct nv50_miptree *mt;   boolean tex_int;   view = MALLOC_STRUCT(nv50_tic_entry);   if (!view)      return NULL;   mt = nv50_miptree(texture);   view->pipe = *templ;   view->pipe.reference.count = 1;   view->pipe.texture = NULL;   view->pipe.context = pipe;   view->id = -1;   pipe_resource_reference(&view->pipe.texture, texture);   tic = &view->tic[0];   desc = util_format_description(view->pipe.format);   tic[0] = nvc0_format_table[view->pipe.format].tic;   tex_int = util_format_is_pure_integer(view->pipe.format);   swz[0] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_r, tex_int);   swz[1] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_g, tex_int);   swz[2] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_b, tex_int);   swz[3] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_a, tex_int);   tic[0] = (tic[0] & ~NV50_TIC_0_SWIZZLE__MASK) |      (swz[0] << NV50_TIC_0_MAPR__SHIFT) |      (swz[1] << NV50_TIC_0_MAPG__SHIFT) |      (swz[2] << NV50_TIC_0_MAPB__SHIFT) |      (swz[3] << NV50_TIC_0_MAPA__SHIFT);   address = mt->base.address;   tic[2] = 0x10001000 | NV50_TIC_2_NO_BORDER;   if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB)      tic[2] |= NV50_TIC_2_COLORSPACE_SRGB;   if (!(flags & NV50_TEXVIEW_SCALED_COORDS))      tic[2] |= NV50_TIC_2_NORMALIZED_COORDS;   /* check for linear storage type */   if (unlikely(!nouveau_bo_memtype(nv04_resource(texture)->bo))) {      if (texture->target == PIPE_BUFFER) {         assert(!(tic[2] & NV50_TIC_2_NORMALIZED_COORDS));         address +=            view->pipe.u.buf.first_element * desc->block.bits / 8;         tic[2] |= NV50_TIC_2_LINEAR | NV50_TIC_2_TARGET_BUFFER;         tic[3] = 0;         tic[4] = /* width */            view->pipe.u.buf.last_element - view->pipe.u.buf.first_element + 1;         tic[5] = 0;      } else {         /* must be 2D texture without mip maps */         tic[2] |= NV50_TIC_2_LINEAR | NV50_TIC_2_TARGET_RECT;         tic[3] = mt->level[0].pitch;         tic[4] = mt->base.base.width0;         tic[5] = (1 << 16) | mt->base.base.height0;      }      tic[6] =      tic[7] = 0;      tic[1] = address;      tic[2] |= address >> 32;      return &view->pipe;   }   tic[2] |=      ((mt->level[0].tile_mode & 0x0f0) << (22 - 4)) |      ((mt->level[0].tile_mode & 0xf00) << (25 - 8));   depth = MAX2(mt->base.base.array_size, mt->base.base.depth0);   if (mt->base.base.array_size > 1) {      /* there doesn't seem to be a base layer field in TIC */      address += view->pipe.u.tex.first_layer * mt->layer_stride;      depth = view->pipe.u.tex.last_layer - view->pipe.u.tex.first_layer + 1;   }   tic[1] = address;   tic[2] |= address >> 32;   switch (target) {   case PIPE_TEXTURE_1D://.........这里部分代码省略.........

static unsigned r600_choose_tiling(struct r600_common_screen *rscreen,				   const struct pipe_resource *templ){	const struct util_format_description *desc = util_format_description(templ->format);	bool force_tiling = templ->flags & R600_RESOURCE_FLAG_FORCE_TILING;	/* MSAA resources must be 2D tiled. */	if (templ->nr_samples > 1)		return RADEON_SURF_MODE_2D;	/* Transfer resources should be linear. */	if (templ->flags & R600_RESOURCE_FLAG_TRANSFER)		return RADEON_SURF_MODE_LINEAR_ALIGNED;	/* r600g: force tiling on TEXTURE_2D and TEXTURE_3D compute resources. */	if (rscreen->chip_class >= R600 && rscreen->chip_class <= CAYMAN &&	    (templ->bind & PIPE_BIND_COMPUTE_RESOURCE) &&	    (templ->target == PIPE_TEXTURE_2D ||	     templ->target == PIPE_TEXTURE_3D))		force_tiling = true;	/* Handle common candidates for the linear mode.	 * Compressed textures must always be tiled. */	if (!force_tiling && !util_format_is_compressed(templ->format)) {		/* Not everything can be linear, so we cannot enforce it		 * for all textures. */		if ((rscreen->debug_flags & DBG_NO_TILING) &&		    (!util_format_is_depth_or_stencil(templ->format) ||		     !(templ->flags & R600_RESOURCE_FLAG_FLUSHED_DEPTH)))			return RADEON_SURF_MODE_LINEAR_ALIGNED;		/* Tiling doesn't work with the 422 (SUBSAMPLED) formats on R600+. */		if (desc->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED)			return RADEON_SURF_MODE_LINEAR_ALIGNED;		/* Cursors are linear on SI.		 * (XXX double-check, maybe also use RADEON_SURF_SCANOUT) */		if (rscreen->chip_class >= SI &&		    (templ->bind & PIPE_BIND_CURSOR))			return RADEON_SURF_MODE_LINEAR_ALIGNED;		if (templ->bind & PIPE_BIND_LINEAR)			return RADEON_SURF_MODE_LINEAR_ALIGNED;		/* Textures with a very small height are recommended to be linear. */		if (templ->target == PIPE_TEXTURE_1D ||		    templ->target == PIPE_TEXTURE_1D_ARRAY ||		    templ->height0 <= 4)			return RADEON_SURF_MODE_LINEAR_ALIGNED;		/* Textures likely to be mapped often. */		if (templ->usage == PIPE_USAGE_STAGING ||		    templ->usage == PIPE_USAGE_STREAM)			return RADEON_SURF_MODE_LINEAR_ALIGNED;	}	/* Make small textures 1D tiled. */	if (templ->width0 <= 16 || templ->height0 <= 16 ||	    (rscreen->debug_flags & DBG_NO_2D_TILING))		return RADEON_SURF_MODE_1D;	/* The allocator will switch to 1D if needed. */	return RADEON_SURF_MODE_2D;}

/** * Copy pixel block from src surface to dst surface. * Overlapping regions are acceptable. * Flipping and stretching are supported. * /param filter  one of PIPE_TEX_FILTER_NEAREST/LINEAR * /param writemask  bitmask of PIPE_MASK_[RGBAZS].  Controls which channels *                   in the dest surface are sourced from the src surface. *                   Disabled color channels are sourced from (0,0,0,1). */voidutil_blit_pixels(struct blit_state *ctx,                 struct pipe_resource *src_tex,                 unsigned src_level,                 int srcX0, int srcY0,                 int srcX1, int srcY1,                 int srcZ0,                 struct pipe_surface *dst,                 int dstX0, int dstY0,                 int dstX1, int dstY1,                 MAYBE_UNUSED float z,                 enum pipe_tex_filter filter,                 uint writemask){   struct pipe_context *pipe = ctx->pipe;   enum pipe_format src_format, dst_format;   const int srcW = abs(srcX1 - srcX0);   const int srcH = abs(srcY1 - srcY0);   boolean overlap;   boolean is_stencil, is_depth, blit_depth, blit_stencil;   const struct util_format_description *src_desc =         util_format_description(src_tex->format);   struct pipe_blit_info info;   assert(filter == PIPE_TEX_FILTER_NEAREST ||          filter == PIPE_TEX_FILTER_LINEAR);   assert(src_level <= src_tex->last_level);   /* do the regions overlap? */   overlap = src_tex == dst->texture &&             dst->u.tex.level == src_level &&             dst->u.tex.first_layer == srcZ0 &&      regions_overlap(srcX0, srcY0, srcX1, srcY1,                      dstX0, dstY0, dstX1, dstY1);   src_format = util_format_linear(src_tex->format);   dst_format = util_format_linear(dst->texture->format);   /* See whether we will blit depth or stencil. */   is_depth = util_format_has_depth(src_desc);   is_stencil = util_format_has_stencil(src_desc);   blit_depth = is_depth && (writemask & PIPE_MASK_Z);   blit_stencil = is_stencil && (writemask & PIPE_MASK_S);   if (is_depth || is_stencil) {      assert((writemask & PIPE_MASK_RGBA) == 0);      assert(blit_depth || blit_stencil);   }   else {      assert((writemask & PIPE_MASK_ZS) == 0);      assert(!blit_depth);      assert(!blit_stencil);   }   /*    * XXX: z parameter is deprecated. dst->u.tex.first_layer    * specificies the destination layer.    */   assert(z == 0.0f);   /*    * Check for simple case:  no format conversion, no flipping, no stretching,    * no overlapping, same number of samples.    * Filter mode should not matter since there's no stretching.    */   if (formats_compatible(src_format, dst_format) &&       src_tex->nr_samples == dst->texture->nr_samples &&       is_stencil == blit_stencil &&       is_depth == blit_depth &&       srcX0 < srcX1 &&       dstX0 < dstX1 &&       srcY0 < srcY1 &&       dstY0 < dstY1 &&       (dstX1 - dstX0) == (srcX1 - srcX0) &&       (dstY1 - dstY0) == (srcY1 - srcY0) &&       !overlap) {      struct pipe_box src_box;      src_box.x = srcX0;      src_box.y = srcY0;      src_box.z = srcZ0;      src_box.width = srcW;      src_box.height = srcH;      src_box.depth = 1;      pipe->resource_copy_region(pipe,                                 dst->texture, dst->u.tex.level,                                 dstX0, dstY0, dst->u.tex.first_layer,/* dest */                                 src_tex, src_level,                                 &src_box);      return;//.........这里部分代码省略.........

/* Shader output formats. This is essentially the swizzle from the shader * to the RB3D block. * * Note that formats are stored from C3 to C0. */static uint32_t r300_translate_out_fmt(enum pipe_format format){    uint32_t modifier = 0;    unsigned i;    const struct util_format_description *desc;    boolean uniform_sign;    desc = util_format_description(format);    /* Find the first non-VOID channel. */    for (i = 0; i < 4; i++) {        if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {            break;        }    }    if (i == 4)        return ~0; /* Unsupported/unknown. */    /* Specifies how the shader output is written to the fog unit. */    switch (desc->channel[i].type) {    case UTIL_FORMAT_TYPE_FLOAT:        switch (desc->channel[i].size) {        case 32:            switch (desc->nr_channels) {            case 1:                modifier |= R300_US_OUT_FMT_C_32_FP;                break;            case 2:                modifier |= R300_US_OUT_FMT_C2_32_FP;                break;            case 4:                modifier |= R300_US_OUT_FMT_C4_32_FP;                break;            }            break;        case 16:            switch (desc->nr_channels) {            case 1:                modifier |= R300_US_OUT_FMT_C_16_FP;                break;            case 2:                modifier |= R300_US_OUT_FMT_C2_16_FP;                break;            case 4:                modifier |= R300_US_OUT_FMT_C4_16_FP;                break;            }            break;        }        break;    default:        switch (desc->channel[i].size) {        case 16:            switch (desc->nr_channels) {            case 1:                modifier |= R300_US_OUT_FMT_C_16;                break;            case 2:                modifier |= R300_US_OUT_FMT_C2_16;                break;            case 4:                modifier |= R300_US_OUT_FMT_C4_16;                break;            }            break;        case 10:            modifier |= R300_US_OUT_FMT_C4_10;            break;        default:            /* C4_8 seems to be used for the formats whose pixel size             * is <= 32 bits. */            modifier |= R300_US_OUT_FMT_C4_8;            break;        }    }    /* Add sign. */    uniform_sign = TRUE;    for (i = 0; i < desc->nr_channels; i++)        if (desc->channel[i].type != UTIL_FORMAT_TYPE_SIGNED)            uniform_sign = FALSE;    if (uniform_sign)        modifier |= R300_OUT_SIGN(0xf);    /* Add swizzles and return. */    switch (format) {        /*** Special cases (non-standard channel mapping) ***/        /* X8         * COLORFORMAT_I8 stores the Z component (C2). *///.........这里部分代码省略.........

/** * Performs blending of src and dst pixels * * @param blend         the blend state of the shader variant * @param cbuf_format   format of the colour buffer * @param type          data type of the pixel vector * @param rt            render target index * @param src           blend src * @param src_alpha     blend src alpha (if not included in src) * @param src1          second blend src (for dual source blend) * @param src1_alpha    second blend src alpha (if not included in src1) * @param dst           blend dst * @param mask          optional mask to apply to the blending result * @param const_        const blend color * @param const_alpha   const blend color alpha (if not included in const_) * @param swizzle       swizzle values for RGBA * * @return the result of blending src and dst */LLVMValueReflp_build_blend_aos(struct gallivm_state *gallivm,                   const struct pipe_blend_state *blend,                   enum pipe_format cbuf_format,                   struct lp_type type,                   unsigned rt,                   LLVMValueRef src,                   LLVMValueRef src_alpha,                   LLVMValueRef src1,                   LLVMValueRef src1_alpha,                   LLVMValueRef dst,                   LLVMValueRef mask,                   LLVMValueRef const_,                   LLVMValueRef const_alpha,                   const unsigned char swizzle[4],                   int nr_channels){   const struct pipe_rt_blend_state * state = &blend->rt[rt];   const struct util_format_description * desc;   struct lp_build_blend_aos_context bld;   LLVMValueRef src_factor, dst_factor;   LLVMValueRef result;   unsigned alpha_swizzle = UTIL_FORMAT_SWIZZLE_NONE;   unsigned i;   desc = util_format_description(cbuf_format);   /* Setup build context */   memset(&bld, 0, sizeof bld);   lp_build_context_init(&bld.base, gallivm, type);   bld.src = src;   bld.src1 = src1;   bld.dst = dst;   bld.const_ = const_;   bld.src_alpha = src_alpha;   bld.src1_alpha = src1_alpha;   bld.const_alpha = const_alpha;   /* Find the alpha channel if not provided seperately */   if (!src_alpha) {      for (i = 0; i < 4; ++i) {         if (swizzle[i] == 3) {            alpha_swizzle = i;         }      }   }   if (blend->logicop_enable) {      if(!type.floating) {         result = lp_build_logicop(gallivm->builder, blend->logicop_func, src, dst);      }      else {         result = src;      }   } else if (!state->blend_enable) {      result = src;   } else {      boolean rgb_alpha_same = (state->rgb_src_factor == state->rgb_dst_factor && state->alpha_src_factor == state->alpha_dst_factor) || nr_channels == 1;      src_factor = lp_build_blend_factor(&bld, state->rgb_src_factor,                                         state->alpha_src_factor,                                         alpha_swizzle,                                         nr_channels);      dst_factor = lp_build_blend_factor(&bld, state->rgb_dst_factor,                                         state->alpha_dst_factor,                                         alpha_swizzle,                                         nr_channels);      result = lp_build_blend(&bld.base,                              state->rgb_func,                              state->rgb_src_factor,                              state->rgb_dst_factor,                              src,                              dst,                              src_factor,                              dst_factor,                              rgb_alpha_same,                              false);      if(state->rgb_func != state->alpha_func && nr_channels > 1 && alpha_swizzle != UTIL_FORMAT_SWIZZLE_NONE) {//.........这里部分代码省略.........