自学教程：C++ v4l2_get_subdev_hostdata函数代码示例

void msm_axi_subdev_release(struct v4l2_subdev *sd){	struct msm_cam_media_controller *pmctl =		(struct msm_cam_media_controller *)v4l2_get_subdev_hostdata(sd);	struct axi_ctrl_t *axi_ctrl = v4l2_get_subdevdata(sd);	if (!axi_ctrl->share_ctrl->vfebase) {		pr_err("%s: base address unmapped/n", __func__);		return;	}	CDBG("%s, free_irq/n", __func__);	disable_irq(axi_ctrl->vfeirq->start);	tasklet_kill(&axi_ctrl->vfe40_tasklet);	msm_cam_clk_enable(&axi_ctrl->pdev->dev, vfe40_clk_info,		axi_ctrl->vfe_clk, ARRAY_SIZE(vfe40_clk_info), 0);	if (axi_ctrl->fs_vfe) {		regulator_disable(axi_ctrl->fs_vfe);		regulator_put(axi_ctrl->fs_vfe);		axi_ctrl->fs_vfe = NULL;	}	iounmap(axi_ctrl->share_ctrl->vfebase);	axi_ctrl->share_ctrl->vfebase = NULL;	if (atomic_read(&axi_ctrl->share_ctrl->irq_cnt))		pr_warning("%s, Warning IRQ Count not ZERO/n", __func__);	msm_camio_bus_scale_cfg(		pmctl->sdata->pdata->cam_bus_scale_table, S_EXIT);}

/** * fimc_sensor_notify - v4l2_device notification from a sensor subdev * @sd: pointer to a subdev generating the notification * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY * @arg: pointer to an u32 type integer that stores the frame payload value * * The End Of Frame notification sent by sensor subdev in its still capture * mode. If there is only a single VSYNC generated by the sensor at the * beginning of a frame transmission, FIMC does not issue the LastIrq * (end of frame) interrupt. And this notification is used to complete the * frame capture and returning a buffer to user-space. Subdev drivers should * call this notification from their last 'End of frame capture' interrupt. */void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,			void *arg){	struct fimc_sensor_info	*sensor;	struct fimc_vid_buffer *buf;	struct fimc_md *fmd;	struct fimc_dev *fimc;	unsigned long flags;	if (sd == NULL)		return;	sensor = v4l2_get_subdev_hostdata(sd);	fmd = entity_to_fimc_mdev(&sd->entity);	spin_lock_irqsave(&fmd->slock, flags);	fimc = sensor ? sensor->host : NULL;	if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&	    test_bit(ST_CAPT_PEND, &fimc->state)) {		unsigned long irq_flags;		spin_lock_irqsave(&fimc->slock, irq_flags);		if (!list_empty(&fimc->vid_cap.active_buf_q)) {			buf = list_entry(fimc->vid_cap.active_buf_q.next,					 struct fimc_vid_buffer, list);			vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));		}

/** * fimc_md_set_camclk - peripheral sensor clock setup * @sd: sensor subdev to configure sclk_cam clock for * @on: 1 to enable or 0 to disable the clock * * There are 2 separate clock outputs available in the SoC for external * image processors. These clocks are shared between all registered FIMC * devices to which sensors can be attached, either directly or through * the MIPI CSI receiver. The clock is allowed here to be used by * multiple sensors concurrently if they use same frequency. * The per sensor subdev clk_on attribute helps to synchronize accesses * to the sclk_cam clocks from the video and media device nodes. * This function should only be called when the graph mutex is held. */int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on){	struct fimc_sensor_info *s_info = v4l2_get_subdev_hostdata(sd);	struct fimc_md *fmd = entity_to_fimc_mdev(&sd->entity);	return __fimc_md_set_camclk(fmd, s_info, on);}

void gsc_hw_set_input_path(struct gsc_ctx *ctx){	struct gsc_dev *dev = ctx->gsc_dev;	u32 cfg = readl(dev->regs + GSC_IN_CON);	cfg &= ~(GSC_IN_PATH_MASK | GSC_IN_LOCAL_SEL_MASK);	if (ctx->in_path == GSC_DMA) {		cfg |= GSC_IN_PATH_MEMORY;	} else {		cfg |= GSC_IN_PATH_LOCAL;		if (ctx->in_path == GSC_WRITEBACK) {			cfg |= GSC_IN_LOCAL_FIMD_WB;		} else {			struct v4l2_subdev *sd = dev->pipeline.sensor;			struct gsc_sensor_info *s_info =				v4l2_get_subdev_hostdata(sd);			if (s_info->pdata->cam_port == CAM_PORT_A)				cfg |= GSC_IN_LOCAL_CAM0;			else				cfg |= GSC_IN_LOCAL_CAM1;		}	}	writel(cfg, dev->regs + GSC_IN_CON);}

/* * Configure MIPI CSI physical parameters. * @port: ATOMISP_CAMERA_PORT_PRIMARY or ATOMISP_CAMERA_PORT_SECONDARY * @lanes: for ATOMISP_CAMERA_PORT_PRIMARY, there could be 2 or 4 lanes * for ATOMISP_CAMERA_PORT_SECONDARY, there is only one lane. * @format: MIPI CSI pixel format, see include/linux/atomisp_platform.h * @bayer_order: MIPI CSI bayer order, see include/linux/atomisp_platform.h */int camera_sensor_csi(struct v4l2_subdev *sd, u32 port,			u32 lanes, u32 format, u32 bayer_order, int flag){	struct i2c_client *client = v4l2_get_subdevdata(sd);	struct camera_mipi_info *csi = NULL;	if (flag) {		csi = kzalloc(sizeof(*csi), GFP_KERNEL);		if (!csi) {			dev_err(&client->dev, "out of memory/n");			return -ENOMEM;		}		csi->port = port;		csi->num_lanes = lanes;		csi->input_format = format;		csi->raw_bayer_order = bayer_order;		v4l2_set_subdev_hostdata(sd, (void *)csi);		csi->metadata_format = ATOMISP_INPUT_FORMAT_EMBEDDED;		csi->metadata_effective_width = NULL;		dev_info(&client->dev,			 "camera pdata: port: %d lanes: %d order: %8.8x/n",			 port, lanes, bayer_order);	} else {		csi = v4l2_get_subdev_hostdata(sd);		kfree(csi);	}	return 0;}

static int msm_vpe_subdev_close(struct v4l2_subdev *sd,	struct v4l2_subdev_fh *fh){	struct vpe_ctrl_type *vpe_ctrl = v4l2_get_subdevdata(sd);	struct msm_mctl_pp_frame_info *frame_info = vpe_ctrl->pp_frame_info;	struct msm_cam_media_controller *mctl;	mctl = v4l2_get_subdev_hostdata(sd);	if (atomic_read(&vpe_ctrl->active) == 0) {		pr_err("%s already closed/n", __func__);		return -EINVAL;	}	D("%s E ", __func__);	if (frame_info) {		D("%s Unmap the pending item from the queue ", __func__);		msm_mctl_unmap_user_frame(&frame_info->src_frame,			frame_info->p_mctl->client, mctl->domain_num);		msm_mctl_unmap_user_frame(&frame_info->dest_frame,			frame_info->p_mctl->client, mctl->domain_num);// LGE_CHANGE_S, [email
C++ v4l2_get_subdevdata函数代码示例
C++ v4l2_fh_init函数代码示例