自学教程：C++ wait_timeout函数代码示例

static void handlewrite(struct net_device *dev){	/* called *only* from idle, non-reentrant */	/* on entry, 0xfb and ltdmabuf holds data */	int dma = dev->dma;	int base = dev->base_addr;	unsigned long flags;		flags=claim_dma_lock();	disable_dma(dma);	clear_dma_ff(dma);	set_dma_mode(dma,DMA_MODE_WRITE);	set_dma_addr(dma,virt_to_bus(ltdmabuf));	set_dma_count(dma,800);	enable_dma(dma);	release_dma_lock(flags);		inb_p(base+3);	inb_p(base+2);	if ( wait_timeout(dev,0xfb) ) {		flags=claim_dma_lock();		printk("timed out in handlewrite, dma res %d/n",			get_dma_residue(dev->dma) );		release_dma_lock(flags);	}}

static int InitSONIC(struct net_device *dev){	ibmlana_priv *priv = netdev_priv(dev);	/* set up start & end of resource area */	outw(0, SONIC_URRA);	outw(priv->rrastart, dev->base_addr + SONIC_RSA);	outw(priv->rrastart + (priv->rxbufcnt * sizeof(rra_t)), dev->base_addr + SONIC_REA);	outw(priv->rrastart, dev->base_addr + SONIC_RRP);	outw(priv->rrastart, dev->base_addr + SONIC_RWP);	/* set EOBC so that only one packet goes into one buffer */	outw((PKTSIZE - 4) >> 1, dev->base_addr + SONIC_EOBC);	/* let SONIC read the first RRA descriptor */	outw(CMDREG_RRRA, dev->base_addr + SONIC_CMDREG);	if (!wait_timeout(dev, SONIC_CMDREG, CMDREG_RRRA, 0, 2)) {		printk(KERN_ERR "%s: SONIC did not respond on RRRA command - giving up.", dev->name);		return 0;	}	/* point SONIC to the first RDA */	outw(0, dev->base_addr + SONIC_URDA);	outw(priv->rdastart, dev->base_addr + SONIC_CRDA);	/* set upper half of TDA address */	outw(0, dev->base_addr + SONIC_UTDA);	return 1;}

/* First stage of disconnect processing: stop all commands and remove * the host */static void quiesce_and_remove_host(struct rtsx_dev *dev){	struct Scsi_Host *host = rtsx_to_host(dev);	struct rtsx_chip *chip = dev->chip;	/* Prevent new transfers, stop the current command, and	 * interrupt a SCSI-scan or device-reset delay */	mutex_lock(&dev->dev_mutex);	scsi_lock(host);	rtsx_set_stat(chip, RTSX_STAT_DISCONNECT);	scsi_unlock(host);	mutex_unlock(&dev->dev_mutex);	wake_up(&dev->delay_wait);	/* Wait some time to let other threads exist */	wait_timeout(100);	/* queuecommand won't accept any new commands and the control	 * thread won't execute a previously-queued command.  If there	 * is such a command pending, complete it with an error. */	mutex_lock(&dev->dev_mutex);	if (chip->srb) {		chip->srb->result = DID_NO_CONNECT << 16;		scsi_lock(host);		chip->srb->scsi_done(dev->chip->srb);		chip->srb = NULL;		scsi_unlock(host);	}	mutex_unlock(&dev->dev_mutex);	/* Now we own no commands so it's safe to remove the SCSI host */	scsi_remove_host(host);}

static int spi_set_init_para(struct rtsx_chip *chip){	struct spi_info *spi = &(chip->spi);	int retval;	RTSX_WRITE_REG(chip, SPI_CLK_DIVIDER1, 0xFF, (u8)(spi->clk_div >> 8));	RTSX_WRITE_REG(chip, SPI_CLK_DIVIDER0, 0xFF, (u8)(spi->clk_div));	retval = switch_clock(chip, spi->spi_clock);	if (retval != STATUS_SUCCESS)		TRACE_RET(chip, STATUS_FAIL);	retval = select_card(chip, SPI_CARD);	if (retval != STATUS_SUCCESS)		TRACE_RET(chip, STATUS_FAIL);	RTSX_WRITE_REG(chip, CARD_CLK_EN, SPI_CLK_EN, SPI_CLK_EN);	RTSX_WRITE_REG(chip, CARD_OE, SPI_OUTPUT_EN, SPI_OUTPUT_EN);	wait_timeout(10);	retval = spi_init(chip);	if (retval != STATUS_SUCCESS)		TRACE_RET(chip, STATUS_FAIL);	return STATUS_SUCCESS;}

static int rtsx_polling_thread(void *__dev){	struct rtsx_dev *dev = (struct rtsx_dev *)__dev;	struct rtsx_chip *chip = dev->chip;	struct Scsi_Host *host = rtsx_to_host(dev);	struct sd_info *sd_card = &(chip->sd_card);	struct xd_info *xd_card = &(chip->xd_card);	struct ms_info *ms_card = &(chip->ms_card);	sd_card->cleanup_counter = 0;	xd_card->cleanup_counter = 0;	ms_card->cleanup_counter = 0;	/* Wait until SCSI scan finished */	wait_timeout((delay_use + 5) * 1000);	for (;;) {		wait_timeout(POLLING_INTERVAL);		/* lock the device pointers */		mutex_lock(&(dev->dev_mutex));		/* if the device has disconnected, we are free to exit */		if (rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT)) {			printk(KERN_INFO "-- rtsx-polling exiting/n");			mutex_unlock(&dev->dev_mutex);			break;		}		mutex_unlock(&dev->dev_mutex);		mspro_polling_format_status(chip);		/* lock the device pointers */		mutex_lock(&(dev->dev_mutex));		rtsx_polling_func(chip);		/* unlock the device pointers */		mutex_unlock(&dev->dev_mutex);	}	scsi_host_put(host);	complete_and_exit(&threads_gone, 0);}

static void rtsx_calibration(struct rtsx_chip *chip){	rtsx_write_phy_register(chip, 0x1B, 0x135E);	wait_timeout(10);	rtsx_write_phy_register(chip, 0x00, 0x0280);	rtsx_write_phy_register(chip, 0x01, 0x7112);	rtsx_write_phy_register(chip, 0x01, 0x7110);	rtsx_write_phy_register(chip, 0x01, 0x7112);	rtsx_write_phy_register(chip, 0x01, 0x7113);	rtsx_write_phy_register(chip, 0x00, 0x0288);}

static int spi_set_init_para(struct rtsx_chip *chip){	struct spi_info *spi = &(chip->spi);	int retval;	retval = rtsx_write_register(chip, SPI_CLK_DIVIDER1, 0xFF,				     (u8)(spi->clk_div >> 8));	if (retval) {		rtsx_trace(chip);		return retval;	}	retval = rtsx_write_register(chip, SPI_CLK_DIVIDER0, 0xFF,				     (u8)(spi->clk_div));	if (retval) {		rtsx_trace(chip);		return retval;	}	retval = switch_clock(chip, spi->spi_clock);	if (retval != STATUS_SUCCESS) {		rtsx_trace(chip);		return STATUS_FAIL;	}	retval = select_card(chip, SPI_CARD);	if (retval != STATUS_SUCCESS) {		rtsx_trace(chip);		return STATUS_FAIL;	}	retval = rtsx_write_register(chip, CARD_CLK_EN, SPI_CLK_EN,				     SPI_CLK_EN);	if (retval) {		rtsx_trace(chip);		return retval;	}	retval = rtsx_write_register(chip, CARD_OE, SPI_OUTPUT_EN,				     SPI_OUTPUT_EN);	if (retval) {		rtsx_trace(chip);		return retval;	}	wait_timeout(10);	retval = spi_init(chip);	if (retval != STATUS_SUCCESS) {		rtsx_trace(chip);		return STATUS_FAIL;	}	return STATUS_SUCCESS;}

static int i2c_pnx_start(unsigned char slave_addr,	struct i2c_pnx_algo_data *alg_data){	dev_dbg(&alg_data->adapter.dev, "%s(): addr 0x%x mode %d/n", __func__,		slave_addr, alg_data->mif.mode);	/*                                      */	if (slave_addr & ~0x7f) {		dev_err(&alg_data->adapter.dev,			"%s: Invalid slave address %x. Only 7-bit addresses are supported/n",			alg_data->adapter.name, slave_addr);		return -EINVAL;	}	/*                              */	if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {		/*                                       */		dev_err(&alg_data->adapter.dev,			"%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x/n",			alg_data->adapter.name, slave_addr,			ioread32(I2C_REG_CTL(alg_data)),			ioread32(I2C_REG_STS(alg_data)));		return -EBUSY;	} else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {		/*                        */		dev_err(&alg_data->adapter.dev,		        "%s: Arbitration failure. Slave addr = %02x/n",			alg_data->adapter.name, slave_addr);		return -EIO;	}	/*                                                                                            */	iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,		  I2C_REG_STS(alg_data));	dev_dbg(&alg_data->adapter.dev, "%s(): sending %#x/n", __func__,		(slave_addr << 1) | start_bit | alg_data->mif.mode);	/*                                                */	iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,		  I2C_REG_TX(alg_data));	dev_dbg(&alg_data->adapter.dev, "%s(): exit/n", __func__);	return 0;}

/** * i2c_pnx_start - start a device * @slave_addr:		slave address * @adap:		pointer to adapter structure * * Generate a START signal in the desired mode. */static int i2c_pnx_start(unsigned char slave_addr,	struct i2c_pnx_algo_data *alg_data){	dev_dbg(&alg_data->adapter.dev, "%s(): addr 0x%x mode %d/n", __func__,		slave_addr, alg_data->mif.mode);	/* Check for 7 bit slave addresses only */	if (slave_addr & ~0x7f) {		dev_err(&alg_data->adapter.dev,			"%s: Invalid slave address %x. Only 7-bit addresses are supported/n",			alg_data->adapter.name, slave_addr);		return -EINVAL;	}	/* First, make sure bus is idle */	if (wait_timeout(alg_data)) {		/* Somebody else is monopolizing the bus */		dev_err(&alg_data->adapter.dev,			"%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x/n",			alg_data->adapter.name, slave_addr,			ioread32(I2C_REG_CTL(alg_data)),			ioread32(I2C_REG_STS(alg_data)));		return -EBUSY;	} else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {		/* Sorry, we lost the bus */		dev_err(&alg_data->adapter.dev,		        "%s: Arbitration failure. Slave addr = %02x/n",			alg_data->adapter.name, slave_addr);		return -EIO;	}	/*	 * OK, I2C is enabled and we have the bus.	 * Clear the current TDI and AFI status flags.	 */	iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,		  I2C_REG_STS(alg_data));	dev_dbg(&alg_data->adapter.dev, "%s(): sending %#x/n", __func__,		(slave_addr << 1) | start_bit | alg_data->mif.mode);	/* Write the slave address, START bit and R/W bit */	iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,		  I2C_REG_TX(alg_data));	dev_dbg(&alg_data->adapter.dev, "%s(): exit/n", __func__);	return 0;}

static int rtsx_polling_thread(void *__dev){	struct rtsx_dev *dev = __dev;	struct rtsx_chip *chip = dev->chip;	struct sd_info *sd_card = &(chip->sd_card);	struct xd_info *xd_card = &(chip->xd_card);	struct ms_info *ms_card = &(chip->ms_card);	sd_card->cleanup_counter = 0;	xd_card->cleanup_counter = 0;	ms_card->cleanup_counter = 0;	/* Wait until SCSI scan finished */	wait_timeout((delay_use + 5) * 1000);	for (;;) {		set_current_state(TASK_INTERRUPTIBLE);		schedule_timeout(msecs_to_jiffies(POLLING_INTERVAL));		/* lock the device pointers */		mutex_lock(&(dev->dev_mutex));		/* if the device has disconnected, we are free to exit */		if (rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT)) {			dev_info(&dev->pci->dev, "-- rtsx-polling exiting/n");			mutex_unlock(&dev->dev_mutex);			break;		}		mutex_unlock(&dev->dev_mutex);		mspro_polling_format_status(chip);		/* lock the device pointers */		mutex_lock(&(dev->dev_mutex));		rtsx_polling_func(chip);		/* unlock the device pointers */		mutex_unlock(&dev->dev_mutex);	}	complete_and_exit(&dev->polling_exit, 0);}

static void handlecommand(struct net_device *dev){	/* on entry, 0xfa and ltdmacbuf holds command */	int dma = dev->dma;	int base = dev->base_addr;	unsigned long flags;	flags=claim_dma_lock();	disable_dma(dma);	clear_dma_ff(dma);	set_dma_mode(dma,DMA_MODE_WRITE);	set_dma_addr(dma,virt_to_bus(ltdmacbuf));	set_dma_count(dma,50);	enable_dma(dma);	release_dma_lock(flags);	inb_p(base+3);	inb_p(base+2);	if ( wait_timeout(dev,0xfa) ) printk("timed out in handlecommand/n");} 

/* read data from the card */static void handlefd(struct net_device *dev){	int dma = dev->dma;	int base = dev->base_addr;	unsigned long flags;	flags=claim_dma_lock();	disable_dma(dma);	clear_dma_ff(dma);	set_dma_mode(dma,DMA_MODE_READ);	set_dma_addr(dma,virt_to_bus(ltdmabuf));	set_dma_count(dma,800);	enable_dma(dma);	release_dma_lock(flags);	inb_p(base+3);	inb_p(base+2);	if ( wait_timeout(dev,0xfd) ) printk("timed out in handlefd/n");	sendup_buffer(dev);} 

static void rts51x_release_resources(struct rts51x_chip *chip){	RTS51X_DEBUGP("-- %s/n", __func__);	RTS51X_DEBUGP("-- sending exit command to thread/n");	complete(&chip->usb->cmnd_ready);	if (chip->usb->ctl_thread)		wait_for_completion(&chip->usb->control_exit);			if (chip->usb->polling_thread)		wait_for_completion(&chip->usb->polling_exit);	wait_timeout(200);		rts51x_release_chip(chip);	usb_free_urb(chip->usb->current_urb);	usb_free_urb(chip->usb->intr_urb);}

/* read a command from the card */static void handlefc(struct net_device *dev){	/* called *only* from idle, non-reentrant */	int dma = dev->dma;	int base = dev->base_addr;	unsigned long flags;	flags=claim_dma_lock();	disable_dma(dma);	clear_dma_ff(dma);	set_dma_mode(dma,DMA_MODE_READ);	set_dma_addr(dma,virt_to_bus(ltdmacbuf));	set_dma_count(dma,50);	enable_dma(dma);	release_dma_lock(flags);	inb_p(base+3);	inb_p(base+2);	if ( wait_timeout(dev,0xfc) ) printk("timed out in handlefc/n");}

/* Release all our dynamic resources */static void rtsx_release_resources(struct rtsx_dev *dev){	dev_info(&dev->pci->dev, "-- %s/n", __func__);	/* Tell the control thread to exit.  The SCSI host must	 * already have been removed so it won't try to queue	 * any more commands.	 */	dev_info(&dev->pci->dev, "-- sending exit command to thread/n");	complete(&dev->cmnd_ready);	if (dev->ctl_thread)		wait_for_completion(&dev->control_exit);	if (dev->polling_thread)		wait_for_completion(&dev->polling_exit);	wait_timeout(200);	if (dev->rtsx_resv_buf) {		dma_free_coherent(&(dev->pci->dev), RTSX_RESV_BUF_LEN,				dev->rtsx_resv_buf, dev->rtsx_resv_buf_addr);		dev->chip->host_cmds_ptr = NULL;		dev->chip->host_sg_tbl_ptr = NULL;	}	if (dev->irq > 0)		free_irq(dev->irq, (void *)dev);	if (dev->chip->msi_en)		pci_disable_msi(dev->pci);	if (dev->remap_addr)		iounmap(dev->remap_addr);	pci_disable_device(dev->pci);	pci_release_regions(dev->pci);	rtsx_release_chip(dev->chip);	kfree(dev->chip);}

int process(proc_pt proc, shm_t *shm, void *arg, int timeout){	pid_t pid;	pid = fork();	switch(pid){		case -1:			return -1;		case 0:			/*			if(signal(SIGTERM,sig_term) == SIG_ERR){				printf("signal error/n");				exit(1);			}			*/			proc(shm, arg);			exit(0);			break;		default:			printf("children pid:%d/n", pid);			return wait_timeout(pid, timeout);	}	return 0;}

/** * i2c_pnx_master_xmit - transmit data to slave * @adap:		pointer to I2C adapter structure * * Sends one byte of data to the slave */static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data){	u32 val;	dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x./n",		__func__, ioread32(I2C_REG_STS(alg_data)));	if (alg_data->mif.len > 0) {		/* We still have something to talk about... */		val = *alg_data->mif.buf++;		if (alg_data->mif.len == 1)			val |= stop_bit;		alg_data->mif.len--;		iowrite32(val, I2C_REG_TX(alg_data));		dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]/n",			__func__, val, alg_data->mif.len + 1);		if (alg_data->mif.len == 0) {			if (alg_data->last) {				/* Wait until the STOP is seen. */				if (wait_timeout(alg_data))					dev_err(&alg_data->adapter.dev,						"The bus is still active after timeout/n");			}			/* Disable master interrupts */			iowrite32(ioread32(I2C_REG_CTL(alg_data)) &				~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),				  I2C_REG_CTL(alg_data));			del_timer_sync(&alg_data->mif.timer);			dev_dbg(&alg_data->adapter.dev,				"%s(): Waking up xfer routine./n",				__func__);			complete(&alg_data->mif.complete);		}	} else if (alg_data->mif.len == 0) {		/* zero-sized transfer */		i2c_pnx_stop(alg_data);		/* Disable master interrupts. */		iowrite32(ioread32(I2C_REG_CTL(alg_data)) &			~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),			  I2C_REG_CTL(alg_data));		/* Stop timer. */		del_timer_sync(&alg_data->mif.timer);		dev_dbg(&alg_data->adapter.dev,			"%s(): Waking up xfer routine after zero-xfer./n",			__func__);		complete(&alg_data->mif.complete);	}	dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x./n",		__func__, ioread32(I2C_REG_STS(alg_data)));	return 0;}

static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data){	u32 val;	dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x./n",		__func__, ioread32(I2C_REG_STS(alg_data)));	if (alg_data->mif.len > 0) {		/*                                          */		val = *alg_data->mif.buf++;		if (alg_data->mif.len == 1)			val |= stop_bit;		alg_data->mif.len--;		iowrite32(val, I2C_REG_TX(alg_data));		dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]/n",			__func__, val, alg_data->mif.len + 1);		if (alg_data->mif.len == 0) {			if (alg_data->last) {				/*                              */				if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))					dev_err(&alg_data->adapter.dev,						"The bus is still active after timeout/n");			}			/*                           */			iowrite32(ioread32(I2C_REG_CTL(alg_data)) &				~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),				  I2C_REG_CTL(alg_data));			del_timer_sync(&alg_data->mif.timer);			dev_dbg(&alg_data->adapter.dev,				"%s(): Waking up xfer routine./n",				__func__);			complete(&alg_data->mif.complete);		}	} else if (alg_data->mif.len == 0) {		/*                     */		i2c_pnx_stop(alg_data);		/*                            */		iowrite32(ioread32(I2C_REG_CTL(alg_data)) &			~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),			  I2C_REG_CTL(alg_data));		/*             */		del_timer_sync(&alg_data->mif.timer);		dev_dbg(&alg_data->adapter.dev,			"%s(): Waking up xfer routine after zero-xfer./n",			__func__);		complete(&alg_data->mif.complete);	}	dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x./n",		__func__, ioread32(I2C_REG_STS(alg_data)));	return 0;}

/** * i2c_pnx_master_rcv - receive data from slave * @adap:		pointer to I2C adapter structure * * Reads one byte data from the slave */static int i2c_pnx_master_rcv(struct i2c_adapter *adap){	struct i2c_pnx_algo_data *alg_data = adap->algo_data;	unsigned int val = 0;	u32 ctl = 0;	dev_dbg(&adap->dev, "%s(): entering: stat = %04x./n",		__func__, ioread32(I2C_REG_STS(alg_data)));	/* Check, whether there is already data,	 * or we didn't 'ask' for it yet.	 */	if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {		dev_dbg(&adap->dev, "%s(): Write dummy data to fill "			"Rx-fifo.../n", __func__);		if (alg_data->mif.len == 1) {			/* Last byte, do not acknowledge next rcv. */			val |= stop_bit;			if (!alg_data->last)				val |= start_bit;			/*			 * Enable interrupt RFDAIE (data in Rx fifo),			 * and disable DRMIE (need data for Tx)			 */			ctl = ioread32(I2C_REG_CTL(alg_data));			ctl |= mcntrl_rffie | mcntrl_daie;			ctl &= ~mcntrl_drmie;			iowrite32(ctl, I2C_REG_CTL(alg_data));		}		/*		 * Now we'll 'ask' for data:		 * For each byte we want to receive, we must		 * write a (dummy) byte to the Tx-FIFO.		 */		iowrite32(val, I2C_REG_TX(alg_data));		return 0;	}	/* Handle data. */	if (alg_data->mif.len > 0) {		val = ioread32(I2C_REG_RX(alg_data));		*alg_data->mif.buf++ = (u8) (val & 0xff);		dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]/n", __func__, val,			alg_data->mif.len);		alg_data->mif.len--;		if (alg_data->mif.len == 0) {			if (alg_data->last)				/* Wait until the STOP is seen. */				if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))					dev_err(&adap->dev, "The bus is still "						"active after timeout/n");			/* Disable master interrupts */			ctl = ioread32(I2C_REG_CTL(alg_data));			ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |				 mcntrl_drmie | mcntrl_daie);			iowrite32(ctl, I2C_REG_CTL(alg_data));			/* Kill timer. */			del_timer_sync(&alg_data->mif.timer);			complete(&alg_data->mif.complete);		}	}	dev_dbg(&adap->dev, "%s(): exiting: stat = %04x./n",		__func__, ioread32(I2C_REG_STS(alg_data)));	return 0;}

static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data){	unsigned int val = 0;	u32 ctl = 0;	dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x./n",		__func__, ioread32(I2C_REG_STS(alg_data)));	/*                                                                          */	if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {		dev_dbg(&alg_data->adapter.dev,			"%s(): Write dummy data to fill Rx-fifo.../n",			__func__);		if (alg_data->mif.len == 1) {			/*                                         */			val |= stop_bit;			/*                                                                                              */			ctl = ioread32(I2C_REG_CTL(alg_data));			ctl |= mcntrl_rffie | mcntrl_daie;			ctl &= ~mcntrl_drmie;			iowrite32(ctl, I2C_REG_CTL(alg_data));		}		/*                                                                                                                        */		iowrite32(val, I2C_REG_TX(alg_data));		return 0;	}	/*              */	if (alg_data->mif.len > 0) {		val = ioread32(I2C_REG_RX(alg_data));		*alg_data->mif.buf++ = (u8) (val & 0xff);		dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]/n",			__func__, val, alg_data->mif.len);		alg_data->mif.len--;		if (alg_data->mif.len == 0) {			if (alg_data->last)				/*                              */				if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))					dev_err(&alg_data->adapter.dev,						"The bus is still active after timeout/n");			/*                           */			ctl = ioread32(I2C_REG_CTL(alg_data));			ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |				 mcntrl_drmie | mcntrl_daie);			iowrite32(ctl, I2C_REG_CTL(alg_data));			/*             */			del_timer_sync(&alg_data->mif.timer);			complete(&alg_data->mif.complete);		}	}	dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x./n",		__func__, ioread32(I2C_REG_STS(alg_data)));	return 0;}

/* * interactively select a kernel image and options. * The kernel can be an actual filename or a label in the config file * Return: * 	-1: if unsucessful * 	 0: otherwise */static INTNselect_kernel(CHAR16 *buffer, INTN size){#define CHAR_CTRL_C	L'/003' /* Unicode CTRL-C */#define CHAR_CTRL_D	L'/004' /* Unicode CTRL-D */#define CHAR_CTRL_U	L'/025' /* Unicode CTRL-U *///#define CHAR_TAB	L'/t'	SIMPLE_INPUT_INTERFACE *ip = systab->ConIn;	EFI_INPUT_KEY key;	EFI_STATUS status;	INTN pos = 0, ret;	INT8 first_time = 1;	/* 	 * let's give some help first	 */	print_help(0);	print_infos(0);reprint:	buffer[pos] = CHAR_NULL;	Print(L"/nELILO boot: %s", buffer);	/*	 * autoboot with default choice after timeout expires	 */	if (first_time && (ret=wait_timeout(elilo_opt.timeout)) != 1) {		return ret == -1 ? -1: 0;	}	first_time = 0;	for (;;) {		while ((status = uefi_call_wrapper(ip->ReadKeyStroke, 2, ip, &key))				 == EFI_NOT_READY);		if (EFI_ERROR(status)) {			ERR_PRT((L"select_kernel readkey: %r", status));			return -1;		} 		switch (key.UnicodeChar) {			case CHAR_TAB:				Print(L"/n");				if (pos == 0) {					print_label_list();					Print(L"(or a kernel file name: [[dev_name:/]path/]kernel_image cmdline options)/n");				} else {					buffer[pos] = CHAR_NULL;					display_label_info(buffer);				}				goto reprint;			case L'%':				if (pos>0) goto normal_char;				Print(L"/n");				print_vars();				goto reprint;			case L'?':				if (pos>0) goto normal_char;				Print(L"/n");				print_help(1);				goto reprint;			case L'&':				if (pos>0) goto normal_char;				Print(L"/n");				print_infos(1);				goto reprint;			case L'=':				if (pos>0) goto normal_char;				Print(L"/n");				print_devices();				goto reprint;			case CHAR_BACKSPACE:				if (pos == 0) break;				pos--;				Print(L"/b /b");				break;			case CHAR_CTRL_U: /* clear line */				while (pos) {					Print(L"/b /b");					pos--;				}				break;			case CHAR_CTRL_C: /* kill line */				pos = 0;				goto reprint;			case CHAR_LINEFEED:			case CHAR_CARRIAGE_RETURN:				buffer[pos]   = CHAR_NULL;				Print(L"/n");				return 0;			default:normal_char:				if (key.UnicodeChar == CHAR_CTRL_D || key.ScanCode == 0x17 ) {					Print(L"/nGiving up then.../n");//.........这里部分代码省略.........

static void idle(struct net_device *dev){	unsigned long flags;	int state;	/* FIXME This is initialized to shut the warning up, but I need to	 * think this through again.	 */	struct xmitQel *q = NULL;	int oops;	int i;	int base = dev->base_addr;	spin_lock_irqsave(&txqueue_lock, flags);	if(QInIdle) {		spin_unlock_irqrestore(&txqueue_lock, flags);		return;	}	QInIdle = 1;	spin_unlock_irqrestore(&txqueue_lock, flags);	/* this tri-states the IRQ line */	(void) inb_p(base+6);	oops = 100;loop:	if (0>oops--) { 		printk("idle: looped too many times/n");		goto done;	}	state = inb_p(base+6);	if (state != inb_p(base+6)) goto loop;	switch(state) {		case 0xfc:			/* incoming command */			if (debug & DEBUG_LOWER) printk("idle: fc/n");			handlefc(dev); 			break;		case 0xfd:			/* incoming data */			if(debug & DEBUG_LOWER) printk("idle: fd/n");			handlefd(dev); 			break;		case 0xf9:			/* result ready */			if (debug & DEBUG_LOWER) printk("idle: f9/n");			if(!mboxinuse[0]) {				mboxinuse[0] = 1;				qels[0].cbuf = rescbuf;				qels[0].cbuflen = 2;				qels[0].dbuf = resdbuf;				qels[0].dbuflen = 2;				qels[0].QWrite = 0;				qels[0].mailbox = 0;				enQ(&qels[0]);			}			inb_p(dev->base_addr+1);			inb_p(dev->base_addr+0);			if( wait_timeout(dev,0xf9) )				printk("timed out idle f9/n");			break;		case 0xf8:			/* ?? */			if (xmQhd) {				inb_p(dev->base_addr+1);				inb_p(dev->base_addr+0);				if(wait_timeout(dev,0xf8) )					printk("timed out idle f8/n");			} else {				goto done;			}			break;		case 0xfa:			/* waiting for command */			if(debug & DEBUG_LOWER) printk("idle: fa/n");			if (xmQhd) {				q=deQ();				memcpy(ltdmacbuf,q->cbuf,q->cbuflen);				ltdmacbuf[1] = q->mailbox;				if (debug>1) { 					int n;					printk("ltpc: sent command     ");					n = q->cbuflen;					if (n>100) n=100;					for(i=0;i<n;i++)						printk("%02x ",ltdmacbuf[i]);					printk("/n");				}				handlecommand(dev);					if(0xfa==inb_p(base+6)) {						/* we timed out, so return */						goto done;					} 			} else {				/* we don't seem to have a command */				if (!mboxinuse[0]) {					mboxinuse[0] = 1;					qels[0].cbuf = rescbuf;//.........这里部分代码省略.........

/** * i2c_pnx_master_rcv - receive data from slave * @adap:		pointer to I2C adapter structure * * Reads one byte data from the slave */static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data){	unsigned int val = 0;	u32 ctl = 0;	dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x./n",		__func__, ioread32(I2C_REG_STS(alg_data)));	/* Check, whether there is already data,	 * or we didn't 'ask' for it yet.	 */	if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {		/* 'Asking' is done asynchronously, e.g. dummy TX of several		 * bytes is done before the first actual RX arrives in FIFO.		 * Therefore, ordered bytes (via TX) are counted separately.		 */		if (alg_data->mif.order) {			dev_dbg(&alg_data->adapter.dev,				"%s(): Write dummy data to fill Rx-fifo.../n",				__func__);			if (alg_data->mif.order == 1) {				/* Last byte, do not acknowledge next rcv. */				val |= stop_bit;				/*				 * Enable interrupt RFDAIE (data in Rx fifo),				 * and disable DRMIE (need data for Tx)				 */				ctl = ioread32(I2C_REG_CTL(alg_data));				ctl |= mcntrl_rffie | mcntrl_daie;				ctl &= ~mcntrl_drmie;				iowrite32(ctl, I2C_REG_CTL(alg_data));			}			/*			 * Now we'll 'ask' for data:			 * For each byte we want to receive, we must			 * write a (dummy) byte to the Tx-FIFO.			 */			iowrite32(val, I2C_REG_TX(alg_data));			alg_data->mif.order--;		}		return 0;	}	/* Handle data. */	if (alg_data->mif.len > 0) {		val = ioread32(I2C_REG_RX(alg_data));		*alg_data->mif.buf++ = (u8) (val & 0xff);		dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]/n",			__func__, val, alg_data->mif.len);		alg_data->mif.len--;		if (alg_data->mif.len == 0) {			if (alg_data->last)				/* Wait until the STOP is seen. */				if (wait_timeout(alg_data))					dev_err(&alg_data->adapter.dev,						"The bus is still active after timeout/n");			/* Disable master interrupts */			ctl = ioread32(I2C_REG_CTL(alg_data));			ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |				 mcntrl_drmie | mcntrl_daie);			iowrite32(ctl, I2C_REG_CTL(alg_data));			/* Kill timer. */			del_timer_sync(&alg_data->mif.timer);			complete(&alg_data->mif.complete);		}	}	dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x./n",		__func__, ioread32(I2C_REG_STS(alg_data)));	return 0;}

static void InitBoard(struct net_device *dev){	int camcnt;	camentry_t cams[16];	u32 cammask;	struct dev_mc_list *mcptr;	u16 rcrval;	/* reset the SONIC */	outw(CMDREG_RST, dev->base_addr + SONIC_CMDREG);	udelay(10);	/* clear all spurious interrupts */	outw(inw(dev->base_addr + SONIC_ISREG), dev->base_addr + SONIC_ISREG);	/* set up the SONIC's bus interface - constant for this adapter -	   must be done while the SONIC is in reset */	outw(DCREG_USR1 | DCREG_USR0 | DCREG_WC1 | DCREG_DW32, dev->base_addr + SONIC_DCREG);	outw(0, dev->base_addr + SONIC_DCREG2);	/* remove reset form the SONIC */	outw(0, dev->base_addr + SONIC_CMDREG);	udelay(10);	/* data sheet requires URRA to be programmed before setting up the CAM contents */	outw(0, dev->base_addr + SONIC_URRA);	/* program the CAM entry 0 to the device address */	camcnt = 0;	putcam(cams, &camcnt, dev->dev_addr);	/* start putting the multicast addresses into the CAM list.  Stop if	   it is full. */	for (mcptr = dev->mc_list; mcptr != NULL; mcptr = mcptr->next) {		putcam(cams, &camcnt, mcptr->dmi_addr);		if (camcnt == 16)			break;	}	/* calculate CAM mask */	cammask = (1 << camcnt) - 1;	/* feed CDA into SONIC, initialize RCR value (always get broadcasts) */	isa_memcpy_toio(dev->mem_start, cams, sizeof(camentry_t) * camcnt);	isa_memcpy_toio(dev->mem_start + (sizeof(camentry_t) * camcnt), &cammask, sizeof(cammask));#ifdef DEBUG	printk("CAM setup:/n");	dumpmem(dev, 0, sizeof(camentry_t) * camcnt + sizeof(cammask));#endif	outw(0, dev->base_addr + SONIC_CAMPTR);	outw(camcnt, dev->base_addr + SONIC_CAMCNT);	outw(CMDREG_LCAM, dev->base_addr + SONIC_CMDREG);	if (!wait_timeout(dev, SONIC_CMDREG, CMDREG_LCAM, 0, 2)) {		printk(KERN_ERR "%s:SONIC did not respond on LCAM command - giving up.", dev->name);		return;	} else {		/* clear interrupt condition */		outw(ISREG_LCD, dev->base_addr + SONIC_ISREG);#ifdef DEBUG		printk("Loading CAM done, address pointers %04x:%04x/n",		       inw(dev->base_addr + SONIC_URRA),		       inw(dev->base_addr + SONIC_CAMPTR));		{			int z;			printk("/n-->CAM: PTR %04x CNT %04x/n",			       inw(dev->base_addr + SONIC_CAMPTR),			       inw(dev->base_addr + SONIC_CAMCNT));			outw(CMDREG_RST, dev->base_addr + SONIC_CMDREG);			for (z = 0; z < camcnt; z++) {				outw(z, dev->base_addr + SONIC_CAMEPTR);				printk("Entry %d: %04x %04x %04x/n", z,				       inw(dev->base_addr + SONIC_CAMADDR0),				       inw(dev->base_addr + SONIC_CAMADDR1),				       inw(dev->base_addr + SONIC_CAMADDR2));			}			outw(0, dev->base_addr + SONIC_CMDREG);		}#endif	}	rcrval = RCREG_BRD | RCREG_LB_NONE;	/* if still multicast addresses left or ALLMULTI is set, set the multicast	   enable bit */	if ((dev->flags & IFF_ALLMULTI) || (mcptr != NULL))//.........这里部分代码省略.........

//.........这里部分代码省略.........				retval = rtsx_write_phy_register(chip, 0x1C,								reg);				if (retval != STATUS_SUCCESS)					TRACE_RET(chip, STATUS_FAIL);			}			if (chip->driver_first_load &&				(chip->ic_version < IC_VER_C))				rtsx_calibration(chip);		} else {			rtsx_enable_bus_int(chip);		}	} else {		rtsx_enable_bus_int(chip);	}	chip->need_reset = 0;	chip->int_reg = rtsx_readl(chip, RTSX_BIPR);	if (chip->hw_bypass_sd)		goto NextCard;	RTSX_DEBUGP("In rtsx_reset_chip, chip->int_reg = 0x%x/n",		chip->int_reg);	if (chip->int_reg & SD_EXIST) {#ifdef HW_AUTO_SWITCH_SD_BUS		if (CHECK_PID(chip, 0x5208) && (chip->ic_version < IC_VER_C))			retval = rtsx_pre_handle_sdio_old(chip);		else			retval = rtsx_pre_handle_sdio_new(chip);		RTSX_DEBUGP("chip->need_reset = 0x%x (rtsx_reset_chip)/n",			(unsigned int)(chip->need_reset));#else  /* HW_AUTO_SWITCH_SD_BUS */		retval = rtsx_pre_handle_sdio_old(chip);#endif  /* HW_AUTO_SWITCH_SD_BUS */		if (retval != STATUS_SUCCESS)			TRACE_RET(chip, STATUS_FAIL);	} else {		chip->sd_io = 0;		RTSX_WRITE_REG(chip, SDIO_CTRL, SDIO_BUS_CTRL | SDIO_CD_CTRL,			0);	}NextCard:	if (chip->int_reg & XD_EXIST)		chip->need_reset |= XD_CARD;	if (chip->int_reg & MS_EXIST)		chip->need_reset |= MS_CARD;	if (chip->int_reg & CARD_EXIST)		RTSX_WRITE_REG(chip, SSC_CTL1, SSC_RSTB, SSC_RSTB);	RTSX_DEBUGP("In rtsx_init_chip, chip->need_reset = 0x%x/n",		(unsigned int)(chip->need_reset));	RTSX_WRITE_REG(chip, RCCTL, 0x01, 0x00);	if (CHECK_PID(chip, 0x5208) || CHECK_PID(chip, 0x5288)) {		/* Turn off main power when entering S3/S4 state */		RTSX_WRITE_REG(chip, MAIN_PWR_OFF_CTL, 0x03, 0x03);	}	if (chip->remote_wakeup_en && !chip->auto_delink_en) {		RTSX_WRITE_REG(chip, WAKE_SEL_CTL, 0x07, 0x07);		if (chip->aux_pwr_exist)			RTSX_WRITE_REG(chip, PME_FORCE_CTL, 0xFF, 0x33);	} else {		RTSX_WRITE_REG(chip, WAKE_SEL_CTL, 0x07, 0x04);		RTSX_WRITE_REG(chip, PME_FORCE_CTL, 0xFF, 0x30);	}	if (CHECK_PID(chip, 0x5208) && (chip->ic_version >= IC_VER_D))		RTSX_WRITE_REG(chip, PETXCFG, 0x1C, 0x14);	if (chip->asic_code && CHECK_PID(chip, 0x5208)) {		retval = rtsx_clr_phy_reg_bit(chip, 0x1C, 2);		if (retval != STATUS_SUCCESS)			TRACE_RET(chip, STATUS_FAIL);	}	if (chip->ft2_fast_mode) {		RTSX_WRITE_REG(chip, CARD_PWR_CTL, 0xFF,			MS_PARTIAL_POWER_ON | SD_PARTIAL_POWER_ON);		udelay(chip->pmos_pwr_on_interval);		RTSX_WRITE_REG(chip, CARD_PWR_CTL, 0xFF,			MS_POWER_ON | SD_POWER_ON);		wait_timeout(200);	}	/* Reset card */	rtsx_reset_detected_cards(chip, 0);	chip->driver_first_load = 0;	return STATUS_SUCCESS;}

uint8_t wait_timeout_simple(volatile uint8_t *port, uint8_t mask){	return wait_timeout(port,mask,255,1);}

//.........这里部分代码省略.........       /**------------------------------------------     *      18.Checkpoint remote server     * ------------------------------------------*/	    if(test_matrix[test_index++].execute)    {        printf("Beggining of test 18: Checkpoint remote server/n");    fflush(NULL);        // Test normal execution    if(strcmp(reason=checkpoint(1),"OK")==0)		test_matrix[test_index-1].success = 0;	else	    test_matrix[test_index-1].reason = strdup(reason);      printf("Test 18 finished. Result = %s/n",reason);    fflush(NULL);        free(reason);    }         /**------------------------------------------     *      19.Wait timeout     * ------------------------------------------*/	    if(test_matrix[test_index++].execute)    {        printf("Beggining of test 19: Wait timeout/n");    fflush(NULL);        // Test normal execution    if(strcmp(reason=wait_timeout(0),"OK")==0)		test_matrix[test_index-1].success = 0;	else	    test_matrix[test_index-1].reason = strdup(reason);      printf("Test 19 finished. Result = %s/n",reason);    fflush(NULL);        free(reason);    }         /**------------------------------------------     *      20.Wait zero timeout     * ------------------------------------------*/	    if(test_matrix[test_index++].execute)    {        printf("Beggining of test 20: Wait zero timeout/n");    fflush(NULL);        // Test normal execution    if(strcmp(reason=wait_timeout(1),"OK")==0)		test_matrix[test_index-1].success = 0;	else	    test_matrix[test_index-1].reason = strdup(reason);      printf("Test 20 finished. Result = %s/n",reason);    fflush(NULL);        free(reason);    }