自学教程：C++ wm831x_reg_read函数代码示例

static int wm831x_gpio_set_debounce(struct wm831x *wm831x, unsigned offset,				    unsigned debounce){	int reg = WM831X_GPIO1_CONTROL + offset;	int ret, fn;	ret = wm831x_reg_read(wm831x, reg);	if (ret < 0)		return ret;	switch (ret & WM831X_GPN_FN_MASK) {	case 0:	case 1:		break;	default:		/* Not in GPIO mode */		return -EBUSY;	}	if (debounce >= 32 && debounce <= 64)		fn = 0;	else if (debounce >= 4000 && debounce <= 8000)		fn = 1;	else		return -EINVAL;	return wm831x_set_bits(wm831x, reg, WM831X_GPN_FN_MASK, fn);}

/* * Set current time and date in RTC */static int wm831x_rtc_set_mmss(struct device *dev, unsigned long time){	struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);	struct wm831x *wm831x = wm831x_rtc->wm831x;	struct rtc_time new_tm;	unsigned long new_time;	int ret;	int count = 0;	ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1,			       (time >> 16) & 0xffff);	if (ret < 0) {		dev_err(dev, "Failed to write TIME_1: %d/n", ret);		return ret;	}	ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff);	if (ret < 0) {		dev_err(dev, "Failed to write TIME_2: %d/n", ret);		return ret;	}	/* Wait for the update to complete - should happen first time	 * round but be conservative.	 */	do {		msleep(1);		ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);		if (ret < 0)			ret = WM831X_RTC_SYNC_BUSY;	} while (!(ret & WM831X_RTC_SYNC_BUSY) &&		 ++count < WM831X_SET_TIME_RETRIES);	if (ret & WM831X_RTC_SYNC_BUSY) {		dev_err(dev, "Timed out writing RTC update/n");		return -EIO;	}	/* Check that the update was accepted; security features may	 * have caused the update to be ignored.	 */	ret = wm831x_rtc_readtime(dev, &new_tm);	if (ret < 0)		return ret;	ret = rtc_tm_to_time(&new_tm, &new_time);	if (ret < 0) {		dev_err(dev, "Failed to convert time: %d/n", ret);		return ret;	}	/* Allow a second of change in case of tick */	if (new_time - time > 1) {		dev_err(dev, "RTC update not permitted by hardware/n");		return -EPERM;	}	return 0;}

/* * Read alarm time and date in RTC */static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm){	struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);	int ret;	u16 data[2];	u32 time;	ret = wm831x_bulk_read(wm831x_rtc->wm831x, WM831X_RTC_ALARM_1,			       2, data);	if (ret != 0) {		dev_err(dev, "Failed to read alarm time: %d/n", ret);		return ret;	}	time = (data[0] << 16) | data[1];	rtc_time_to_tm(time, &alrm->time);	ret = wm831x_reg_read(wm831x_rtc->wm831x, WM831X_RTC_CONTROL);	if (ret < 0) {		dev_err(dev, "Failed to read RTC control: %d/n", ret);		return ret;	}	if (ret & WM831X_RTC_ALM_ENA)		alrm->enabled = 1;	else		alrm->enabled = 0;	return 0;}

static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev){	struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);	struct wm831x *wm831x = dcdc->wm831x;	u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;	int val;	val = wm831x_reg_read(wm831x, reg);	if (val < 0)		return val;	val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;	switch (val) {	case WM831X_DCDC_MODE_FAST:		return REGULATOR_MODE_FAST;	case WM831X_DCDC_MODE_NORMAL:		return REGULATOR_MODE_NORMAL;	case WM831X_DCDC_MODE_STANDBY:		return REGULATOR_MODE_STANDBY;	case WM831X_DCDC_MODE_IDLE:		return REGULATOR_MODE_IDLE;	default:		BUG();		return -EINVAL;	}}

static int wm831x_pre_init(struct wm831x *parm){	int ret;	Wm831x = parm;//	printk("%s/n", __func__);	gpio_request(PMU_POWER_SLEEP, "NULL");	gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);	#ifdef CONFIG_WM8326_VBAT_LOW_DETECTION	#ifdef CONFIG_BATTERY_RK30_VOL3V8	wm831x_set_bits(parm,WM831X_SYSVDD_CONTROL ,0xc077,0xc035);	  //pvdd power on dect vbat voltage	printk("+++The vbat is too low+++/n");		#endif	#endif		ret = wm831x_reg_read(parm, WM831X_POWER_STATE) & 0xffff;	wm831x_reg_write(parm, WM831X_POWER_STATE, (ret & 0xfff8) | 0x04);	wm831x_set_bits(parm, WM831X_RTC_CONTROL, WM831X_RTC_ALAM_ENA_MASK, 0x0400);//enable rtc alam	//BATT_FET_ENA = 1	wm831x_reg_write(parm, WM831X_SECURITY_KEY, 0x9716);	// unlock security key	wm831x_set_bits(parm, WM831X_RESET_CONTROL, 0x1003, 0x1001);	ret = wm831x_reg_read(parm, WM831X_RESET_CONTROL) & 0xffff & UNLOCK_SECURITY_KEY;	// enternal reset active in sleep//	printk("%s:WM831X_RESET_CONTROL=0x%x/n", __func__, ret);	wm831x_reg_write(parm, WM831X_RESET_CONTROL, ret);	wm831x_set_bits(parm,WM831X_DC1_ON_CONFIG ,0x0300,0x0000); //set dcdc mode is FCCM	wm831x_set_bits(parm,WM831X_DC2_ON_CONFIG ,0x0300,0x0000);	wm831x_set_bits(parm,WM831X_DC3_ON_CONFIG ,0x0300,0x0000);	wm831x_set_bits(parm,0x4066,0x0300,0x0000);#ifndef CONFIG_MACH_RK3066_SDK	wm831x_set_bits(parm,WM831X_LDO10_CONTROL ,0x0040,0x0040);// set ldo10 in switch mode#endif	wm831x_set_bits(parm,WM831X_STATUS_LED_1 ,0xc300,0xc100);// set led1 on(in manual mode)	wm831x_set_bits(parm,WM831X_STATUS_LED_2 ,0xc300,0xc000);//set led2 off(in manual mode)	wm831x_set_bits(parm,WM831X_LDO5_SLEEP_CONTROL ,0xe000,0x2000);// set ldo5 is disable in sleep mode 	wm831x_set_bits(parm,WM831X_LDO1_SLEEP_CONTROL ,0xe000,0x2000);// set ldo1 is disable in sleep mode 		wm831x_reg_write(parm, WM831X_SECURITY_KEY, LOCK_SECURITY_KEY);	// lock security key	return 0;}

static int wm831x_dcdc_get_status(struct regulator_dev *rdev){	struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);	struct wm831x *wm831x = dcdc->wm831x;	int ret;	/* First, check for errors */	ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);	if (ret < 0)		return ret;	if (ret & (1 << rdev_get_id(rdev))) {		dev_dbg(wm831x->dev, "DCDC%d under voltage/n",			rdev_get_id(rdev) + 1);		return REGULATOR_STATUS_ERROR;	}	/* DCDC1 and DCDC2 can additionally detect high voltage/current */	if (rdev_get_id(rdev) < 2) {		if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {			dev_dbg(wm831x->dev, "DCDC%d over voltage/n",				rdev_get_id(rdev) + 1);			return REGULATOR_STATUS_ERROR;		}		if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {			dev_dbg(wm831x->dev, "DCDC%d over current/n",				rdev_get_id(rdev) + 1);			return REGULATOR_STATUS_ERROR;		}	}	/* Is the regulator on? */	ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);	if (ret < 0)		return ret;	if (!(ret & (1 << rdev_get_id(rdev))))		return REGULATOR_STATUS_OFF;	/* TODO: When we handle hardware control modes so we can report the	 * current mode. */	return REGULATOR_STATUS_ON;}

static int wm831x_rtc_set_mmss(struct device *dev, unsigned long time){	struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);	struct wm831x *wm831x = wm831x_rtc->wm831x;	struct rtc_time new_tm;	unsigned long new_time;	int ret;	int count = 0;	ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1,			       (time >> 16) & 0xffff);	if (ret < 0) {		dev_err(dev, "Failed to write TIME_1: %d/n", ret);		return ret;	}	ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff);	if (ret < 0) {		dev_err(dev, "Failed to write TIME_2: %d/n", ret);		return ret;	}	do {		msleep(1);		ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);		if (ret < 0)			ret = WM831X_RTC_SYNC_BUSY;	} while (!(ret & WM831X_RTC_SYNC_BUSY) &&		 ++count < WM831X_SET_TIME_RETRIES);	if (ret & WM831X_RTC_SYNC_BUSY) {		dev_err(dev, "Timed out writing RTC update/n");		return -EIO;	}	ret = wm831x_rtc_readtime(dev, &new_tm);	if (ret < 0)		return ret;	ret = rtc_tm_to_time(&new_tm, &new_time);	if (ret < 0) {		dev_err(dev, "Failed to convert time: %d/n", ret);		return ret;	}		if (new_time - time > 1) {		dev_err(dev, "RTC update not permitted by hardware/n");		return -EPERM;	}	return 0;}

static int wm831x_rtc_probe(struct platform_device *pdev){	struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);	struct wm831x_rtc *wm831x_rtc;	int per_irq = platform_get_irq_byname(pdev, "PER");	int alm_irq = platform_get_irq_byname(pdev, "ALM");	int ret = 0;	wm831x_rtc = kzalloc(sizeof(*wm831x_rtc), GFP_KERNEL);	if (wm831x_rtc == NULL)		return -ENOMEM;	platform_set_drvdata(pdev, wm831x_rtc);	wm831x_rtc->wm831x = wm831x;	ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);	if (ret < 0) {		dev_err(&pdev->dev, "Failed to read RTC control: %d/n", ret);		goto err;	}	if (ret & WM831X_RTC_ALM_ENA)		wm831x_rtc->alarm_enabled = 1;	device_init_wakeup(&pdev->dev, 1);	wm831x_rtc->rtc = rtc_device_register("wm831x", &pdev->dev,					      &wm831x_rtc_ops, THIS_MODULE);	if (IS_ERR(wm831x_rtc->rtc)) {		ret = PTR_ERR(wm831x_rtc->rtc);		goto err;	}	ret = request_threaded_irq(per_irq, NULL, wm831x_per_irq,				   IRQF_TRIGGER_RISING, "RTC period",				   wm831x_rtc);	if (ret != 0) {		dev_err(&pdev->dev, "Failed to request periodic IRQ %d: %d/n",			per_irq, ret);	}	ret = request_threaded_irq(alm_irq, NULL, wm831x_alm_irq,				   IRQF_TRIGGER_RISING, "RTC alarm",				   wm831x_rtc);	if (ret != 0) {		dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d/n",			alm_irq, ret);	}	return 0;err:	kfree(wm831x_rtc);	return ret;}

static int wm831x_buckp_get_voltage_sel(struct regulator_dev *rdev){	struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);	struct wm831x *wm831x = dcdc->wm831x;	u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;	int val;	val = wm831x_reg_read(wm831x, reg);	if (val < 0)		return val;	return val & WM831X_DC3_ON_VSEL_MASK;}

static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev){	struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);	struct wm831x *wm831x = dcdc->wm831x;	u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;	int val;	val = wm831x_reg_read(wm831x, reg);	if (val < 0)		return val;	return wm831x_dcdc_ilim[val & WM831X_DC1_HC_THR_MASK];}

static int wm831x_pre_init(struct wm831x *parm){	int ret;	Wm831x = parm;//	printk("%s/n", __func__);	gpio_request(PMU_POWER_SLEEP, "NULL");	gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);		ret = wm831x_reg_read(parm, WM831X_POWER_STATE) & 0xffff;	wm831x_reg_write(parm, WM831X_POWER_STATE, (ret & 0xfff8) | 0x04);	wm831x_set_bits(parm, WM831X_RTC_CONTROL, WM831X_RTC_ALAM_ENA_MASK, 0x0400);//enable rtc alam	//BATT_FET_ENA = 1	wm831x_reg_write(parm, WM831X_SECURITY_KEY, 0x9716);	// unlock security key	wm831x_set_bits(parm, WM831X_RESET_CONTROL, 0x1003, 0x1001);	ret = wm831x_reg_read(parm, WM831X_RESET_CONTROL) & 0xffff & UNLOCK_SECURITY_KEY;	// enternal reset active in sleep//	printk("%s:WM831X_RESET_CONTROL=0x%x/n", __func__, ret);	wm831x_reg_write(parm, WM831X_RESET_CONTROL, ret);	wm831x_set_bits(parm,WM831X_DC1_ON_CONFIG ,0x0300,0x0000); //set dcdc mode is FCCM	wm831x_set_bits(parm,WM831X_DC2_ON_CONFIG ,0x0300,0x0000);	wm831x_set_bits(parm,WM831X_DC3_ON_CONFIG ,0x0300,0x0000);	wm831x_set_bits(parm,0x4066,0x0300,0x0000);//	wm831x_set_bits(parm,WM831X_LDO10_CONTROL ,0x0040,0x0040);// set ldo10 in switch mode	wm831x_set_bits(parm,WM831X_STATUS_LED_1 ,0xc300,0xc100);// set led1 on(in manual mode)	wm831x_set_bits(parm,WM831X_STATUS_LED_2 ,0xc300,0xc000);//set led2 off(in manual mode)	wm831x_set_bits(parm,WM831X_LDO5_SLEEP_CONTROL ,0xe000,0x2000);// set ldo5 is disable in sleep mode 	wm831x_set_bits(parm,WM831X_LDO1_SLEEP_CONTROL ,0xe000,0x2000);// set ldo1 is disable in sleep mode 		wm831x_reg_write(parm, WM831X_SECURITY_KEY, LOCK_SECURITY_KEY);	// lock security key	return 0;}

static int wm831x_alive_ldo_get_voltage(struct regulator_dev *rdev){	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);	struct wm831x *wm831x = ldo->wm831x;	int reg = ldo->base + WM831X_ALIVE_LDO_ON_CONTROL;	int ret;	ret = wm831x_reg_read(wm831x, reg);	if (ret < 0)		return ret;	ret &= WM831X_LDO11_ON_VSEL_MASK;	return wm831x_alive_ldo_list_voltage(rdev, ret);}

static unsigned int wm831x_gp_ldo_get_mode(struct regulator_dev *rdev){	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);	struct wm831x *wm831x = ldo->wm831x;	int ctrl_reg = ldo->base + WM831X_LDO_CONTROL;	int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;	int ret;	ret = wm831x_reg_read(wm831x, on_reg);	if (ret < 0)		return ret;	if (!(ret & WM831X_LDO1_ON_MODE))		return REGULATOR_MODE_NORMAL;	ret = wm831x_reg_read(wm831x, ctrl_reg);	if (ret < 0)		return ret;	if (ret & WM831X_LDO1_LP_MODE)		return REGULATOR_MODE_STANDBY;	else		return REGULATOR_MODE_IDLE;}

static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset){	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);	struct wm831x *wm831x = wm831x_gpio->wm831x;	int ret;	ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL);	if (ret < 0)		return ret;	if (ret & 1 << offset)		return 1;	else		return 0;}

static int wm831x_rtc_probe(struct platform_device *pdev){	struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);	struct wm831x_rtc *wm831x_rtc;	int alm_irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "ALM"));	int ret = 0;	wm831x_rtc = devm_kzalloc(&pdev->dev, sizeof(*wm831x_rtc), GFP_KERNEL);	if (wm831x_rtc == NULL)		return -ENOMEM;	platform_set_drvdata(pdev, wm831x_rtc);	wm831x_rtc->wm831x = wm831x;	ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);	if (ret < 0) {		dev_err(&pdev->dev, "Failed to read RTC control: %d/n", ret);		return ret;	}	if (ret & WM831X_RTC_ALM_ENA)		wm831x_rtc->alarm_enabled = 1;	device_init_wakeup(&pdev->dev, 1);	wm831x_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);	if (IS_ERR(wm831x_rtc->rtc))		return PTR_ERR(wm831x_rtc->rtc);	wm831x_rtc->rtc->ops = &wm831x_rtc_ops;	wm831x_rtc->rtc->range_max = U32_MAX;	ret = rtc_register_device(wm831x_rtc->rtc);	if (ret)		return ret;	ret = devm_request_threaded_irq(&pdev->dev, alm_irq, NULL,				wm831x_alm_irq,				IRQF_TRIGGER_RISING, "RTC alarm",				wm831x_rtc);	if (ret != 0) {		dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d/n",			alm_irq, ret);	}	wm831x_rtc_add_randomness(wm831x);	return 0;}

static int wm831x_read_on_pin_status(struct wm831x_chg *wm831x_chg){	int ret;		if(!wm831x_chg)	{		printk("err:%s:wm831x_chg address is 0/n",__FUNCTION__);		return -1;	}		ret = wm831x_reg_read(wm831x_chg->wm831x, WM831X_ON_PIN_CONTROL);	if (ret < 0)		return ret;	return !(ret & WM831X_ON_PIN_STS) ? 1 : 0;}

static int wm831x_ldo_is_enabled(struct regulator_dev *rdev){	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);	struct wm831x *wm831x = ldo->wm831x;	int mask = 1 << rdev_get_id(rdev);	int reg;	reg = wm831x_reg_read(wm831x, WM831X_LDO_ENABLE);	if (reg < 0)		return reg;	if (reg & mask)		return 1;	else		return 0;}

static int wm831x_alive_ldo_get_status(struct regulator_dev *rdev){	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);	struct wm831x *wm831x = ldo->wm831x;	int mask = 1 << rdev_get_id(rdev);	int ret;	/* Is the regulator on? */	ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS);	if (ret < 0)		return ret;	if (ret & mask)		return REGULATOR_STATUS_ON;	else		return REGULATOR_STATUS_OFF;}

static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev){	struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);	struct wm831x *wm831x = dcdc->wm831x;	int mask = 1 << rdev_get_id(rdev);	int reg;	reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);	if (reg < 0)		return reg;	if (reg & mask)		return 1;	else		return 0;}

int wm831x_read_on_pin_status(void){	int ret;		if(!g_wm831x_power)	{		printk("err:%s:g_wm831x_power address is 0/n",__FUNCTION__);		return -1;	}		ret = wm831x_reg_read(g_wm831x_power->wm831x, WM831X_ON_PIN_CONTROL);	if (ret < 0)		return ret;	return !(ret & WM831X_ON_PIN_STS) ? 1 : 0;}

static int wm831x_power_check_online(struct wm831x *wm831x, int supply,				     union power_supply_propval *val){	int ret;	ret = wm831x_reg_read(wm831x, WM831X_SYSTEM_STATUS);	if (ret < 0)		return ret;	if (ret & supply)		val->intval = 1;	else		val->intval = 0;	return 0;}

static int wm831x_isink_is_enabled(struct regulator_dev *rdev){	struct wm831x_isink *isink = rdev_get_drvdata(rdev);	struct wm831x *wm831x = isink->wm831x;	int ret;	ret = wm831x_reg_read(wm831x, isink->reg);	if (ret < 0)		return ret;	if ((ret & (WM831X_CS1_ENA | WM831X_CS1_DRIVE)) ==	    (WM831X_CS1_ENA | WM831X_CS1_DRIVE))		return 1;	else		return 0;}

static int wm831x_isink_get_current(struct regulator_dev *rdev){	struct wm831x_isink *isink = rdev_get_drvdata(rdev);	struct wm831x *wm831x = isink->wm831x;	int ret;	ret = wm831x_reg_read(wm831x, isink->reg);	if (ret < 0)		return ret;	ret &= WM831X_CS1_ISEL_MASK;	if (ret > WM831X_ISINK_MAX_ISEL)		ret = WM831X_ISINK_MAX_ISEL;	return wm831x_isinkv_values[ret];}

/* * Read current time and date in RTC */static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm){	struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);	struct wm831x *wm831x = wm831x_rtc->wm831x;	u16 time1[2], time2[2];	int ret;	int count = 0;	/* Has the RTC been programmed? */	ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);	if (ret < 0) {		dev_err(dev, "Failed to read RTC control: %d/n", ret);		return ret;	}	if (!(ret & WM831X_RTC_VALID)) {		dev_dbg(dev, "RTC not yet configured/n");		return -EINVAL;	}	/* Read twice to make sure we don't read a corrupt, partially	 * incremented, value.	 */	do {		ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,				       2, time1);		if (ret != 0)			continue;		ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,				       2, time2);		if (ret != 0)			continue;		if (memcmp(time1, time2, sizeof(time1)) == 0) {			u32 time = (time1[0] << 16) | time1[1];			rtc_time_to_tm(time, tm);			return rtc_valid_tm(tm);		}	} while (++count < WM831X_GET_TIME_RETRIES);	dev_err(dev, "Timed out reading current time/n");	return -EIO;}

static int wm831x_low_power_detection(struct wm831x *wm831x){	wm831x_reg_write(wm831x,WM831X_AUXADC_CONTROL,0x803f);     //open adc 	wm831x_reg_write(wm831x,WM831X_AUXADC_CONTROL,0xd03f);	wm831x_reg_write(wm831x,WM831X_AUXADC_SOURCE,0x0001);		wm831x_reg_write(wm831x,WM831X_COMPARATOR_CONTROL,0x0001);	wm831x_reg_write(wm831x,WM831X_COMPARATOR_1,0x2910);   //set the low power is 3.4v		wm831x_reg_write(wm831x,WM831X_INTERRUPT_STATUS_1_MASK,0x99ee);	wm831x_set_bits(wm831x,WM831X_SYSTEM_INTERRUPTS_MASK,0x0100,0x0000);	if (wm831x_reg_read(wm831x,WM831X_AUXADC_DATA)< 0x1900){		printk("The vbat is too low./n");		wm831x_device_shutdown(wm831x);	}	return 0;}

static int wm831x_buckv_read_voltage(struct regulator_dev *rdev){	int vol_read;	int ret;	struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);	struct wm831x *wm831x = dcdc->wm831x;	int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;	ret = wm831x_reg_read(wm831x, on_reg);	if (ret < 0)		return ret;	ret &= WM831X_DC1_ON_VSEL_MASK;	vol_read = (ret-8)*12500 + 600000;	return vol_read;}

static void wm831x_rtc_add_randomness(struct wm831x *wm831x){	int ret;	u16 reg;	/*	 * The write counter contains a pseudo-random number which is	 * regenerated every time we set the RTC so it should be a	 * useful per-system source of entropy.	 */	ret = wm831x_reg_read(wm831x, WM831X_RTC_WRITE_COUNTER);	if (ret >= 0) {		reg = ret;		add_device_randomness(&reg, sizeof(reg));	} else {		dev_warn(wm831x->dev, "Failed to read RTC write counter: %d/n",			 ret);	}}

static int wm831x_bat_check_type(struct wm831x *wm831x, int *type){	int ret;#ifdef WM831X_DEBUG_0 	ret = wm831x_reg_read(wm831x, WM831X_POWER_STATE);	if (ret < 0)		return ret;	WM_BATT_DBG("%s: wm831x power status %#x/n", __FUNCTION__, ret);	ret = wm831x_reg_read(wm831x, WM831X_SYSTEM_STATUS);	if (ret < 0)		return ret;	WM_BATT_DBG("%s: wm831x system status %#x/n", __FUNCTION__, ret);	ret = wm831x_reg_read(wm831x, WM831X_CHARGER_CONTROL_1);	if (ret < 0)		return ret;	WM_BATT_DBG("%s: wm831x charger control1 %#x/n", __FUNCTION__, ret);	ret = wm831x_reg_read(wm831x, WM831X_CHARGER_CONTROL_2);	if (ret < 0)		return ret;	WM_BATT_DBG("%s: wm831x charger control2 %#x/n", __FUNCTION__, ret);	ret = wm831x_reg_read(wm831x, WM831X_CHARGER_STATUS);	if (ret < 0)		return ret;	WM_BATT_DBG("%s: wm831x charger status %#x/n/n", __FUNCTION__, ret);#endif	ret = wm831x_reg_read(wm831x, WM831X_CHARGER_STATUS);	if (ret < 0)		return ret;	switch (ret & WM831X_CHG_STATE_MASK) {	case WM831X_CHG_STATE_TRICKLE:	case WM831X_CHG_STATE_TRICKLE_OT:		*type = POWER_SUPPLY_CHARGE_TYPE_TRICKLE;		break;	case WM831X_CHG_STATE_FAST:	case WM831X_CHG_STATE_FAST_OT:		*type = POWER_SUPPLY_CHARGE_TYPE_FAST;		break;	default:		*type = POWER_SUPPLY_CHARGE_TYPE_NONE;		break;	}	return 0;}

static int wm831x_wdt_ping(struct watchdog_device *wdt_dev){	struct wm831x_wdt_drvdata *driver_data = watchdog_get_drvdata(wdt_dev);	struct wm831x *wm831x = driver_data->wm831x;	int ret;	u16 reg;	mutex_lock(&driver_data->lock);	if (driver_data->update_gpio) {		gpio_set_value_cansleep(driver_data->update_gpio,					driver_data->update_state);		driver_data->update_state = !driver_data->update_state;		ret = 0;		goto out;	}	reg = wm831x_reg_read(wm831x, WM831X_WATCHDOG);	if (!(reg & WM831X_WDOG_RST_SRC)) {		dev_err(wm831x->dev, "Hardware watchdog update unsupported/n");		ret = -EINVAL;		goto out;	}	reg |= WM831X_WDOG_RESET;	ret = wm831x_reg_unlock(wm831x);	if (ret == 0) {		ret = wm831x_reg_write(wm831x, WM831X_WATCHDOG, reg);		wm831x_reg_lock(wm831x);	} else {		dev_err(wm831x->dev, "Failed to unlock security key: %d/n",			ret);	}out:	mutex_unlock(&driver_data->lock);	return ret;}

int wm831x_read_chg_status(void){	int ret, usb_chg = 0, wall_chg = 0;		if(!g_wm831x_power)	{		printk("err:%s:g_wm831x_power address is 0/n",__FUNCTION__);		return -1;	}		ret = wm831x_reg_read(g_wm831x_power->wm831x, WM831X_SYSTEM_STATUS);	if (ret < 0)		return ret;	if (ret & WM831X_PWR_USB)		usb_chg = 1;	if (ret & WM831X_PWR_WALL)		wall_chg = 1;	return ((usb_chg | wall_chg) ? 1 : 0);}