自学教程：C++ xhci_dbg函数代码示例

int xhci_bus_suspend(struct usb_hcd *hcd){	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);	int max_ports, port_index;	__le32 __iomem **port_array;	struct xhci_bus_state *bus_state;	unsigned long flags;	max_ports = xhci_get_ports(hcd, &port_array);	bus_state = &xhci->bus_state[hcd_index(hcd)];	spin_lock_irqsave(&xhci->lock, flags);	if (hcd->self.root_hub->do_remote_wakeup) {		port_index = max_ports;		while (port_index--) {			if (bus_state->resume_done[port_index] != 0) {				spin_unlock_irqrestore(&xhci->lock, flags);				xhci_dbg(xhci, "suspend failed because "						"port %d is resuming/n",						port_index + 1);				return -EBUSY;			}		}	}	port_index = max_ports;	bus_state->bus_suspended = 0;	while (port_index--) {		/* suspend the port if the port is not suspended */		u32 t1, t2;		int slot_id;		t1 = xhci_readl(xhci, port_array[port_index]);		t2 = xhci_port_state_to_neutral(t1);		if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {			xhci_dbg(xhci, "port %d not suspended/n", port_index);			slot_id = xhci_find_slot_id_by_port(hcd, xhci,					port_index + 1);			if (slot_id) {				spin_unlock_irqrestore(&xhci->lock, flags);				xhci_stop_device(xhci, slot_id, 1);				spin_lock_irqsave(&xhci->lock, flags);			}			t2 &= ~PORT_PLS_MASK;			t2 |= PORT_LINK_STROBE | XDEV_U3;			set_bit(port_index, &bus_state->bus_suspended);		}		/* USB core sets remote wake mask for USB 3.0 hubs,		 * including the USB 3.0 roothub, but only if CONFIG_USB_SUSPEND		 * is enabled, so also enable remote wake here.		 */		if (hcd->self.root_hub->do_remote_wakeup) {			if (t1 & PORT_CONNECT) {				t2 |= PORT_WKOC_E | PORT_WKDISC_E;				t2 &= ~PORT_WKCONN_E;			} else {				t2 |= PORT_WKOC_E | PORT_WKCONN_E;				t2 &= ~PORT_WKDISC_E;			}		} else			t2 &= ~PORT_WAKE_BITS;		t1 = xhci_port_state_to_neutral(t1);		if (t1 != t2) {			xhci_writel(xhci, t2, port_array[port_index]);			if (xhci->quirks & XHCI_PORTSC_DELAY)				ndelay(100);		}		if (hcd->speed != HCD_USB3) {			/* enable remote wake up for USB 2.0 */			__le32 __iomem *addr;			u32 tmp;			/* Add one to the port status register address to get			 * the port power control register address.			 */			addr = port_array[port_index] + 1;			tmp = xhci_readl(xhci, addr);			tmp |= PORT_RWE;			xhci_writel(xhci, tmp, addr);			if (xhci->quirks & XHCI_PORTSC_DELAY)				ndelay(100);		}	}	hcd->state = HC_STATE_SUSPENDED;	bus_state->next_statechange = jiffies + msecs_to_jiffies(10);	spin_unlock_irqrestore(&xhci->lock, flags);	return 0;}

int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,		u16 wIndex, char *buf, u16 wLength){	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);	int ports;	unsigned long flags;	u32 temp, status;	int retval = 0;	u32 __iomem *addr;	char *port_change_bit;	ports = HCS_MAX_PORTS(xhci->hcs_params1);	spin_lock_irqsave(&xhci->lock, flags);	switch (typeReq) {	case GetHubStatus:		/* No power source, over-current reported per port */		memset(buf, 0, 4);		break;	case GetHubDescriptor:		xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);		break;	case GetPortStatus:		if (!wIndex || wIndex > ports)			goto error;		wIndex--;		status = 0;		addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);		temp = xhci_readl(xhci, addr);		xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x/n", wIndex, temp);		/* wPortChange bits */		if (temp & PORT_CSC)			status |= 1 << USB_PORT_FEAT_C_CONNECTION;		if (temp & PORT_PEC)			status |= 1 << USB_PORT_FEAT_C_ENABLE;		if ((temp & PORT_OCC))			status |= 1 << USB_PORT_FEAT_C_OVER_CURRENT;		/*		 * FIXME ignoring suspend, reset, and USB 2.1/3.0 specific		 * changes		 */		if (temp & PORT_CONNECT) {			status |= 1 << USB_PORT_FEAT_CONNECTION;			status |= xhci_port_speed(temp);		}		if (temp & PORT_PE)			status |= 1 << USB_PORT_FEAT_ENABLE;		if (temp & PORT_OC)			status |= 1 << USB_PORT_FEAT_OVER_CURRENT;		if (temp & PORT_RESET)			status |= 1 << USB_PORT_FEAT_RESET;		if (temp & PORT_POWER)			status |= 1 << USB_PORT_FEAT_POWER;		xhci_dbg(xhci, "Get port status returned 0x%x/n", status);		put_unaligned(cpu_to_le32(status), (__le32 *) buf);		break;	case SetPortFeature:		wIndex &= 0xff;		if (!wIndex || wIndex > ports)			goto error;		wIndex--;		addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);		temp = xhci_readl(xhci, addr);		temp = xhci_port_state_to_neutral(temp);		switch (wValue) {		case USB_PORT_FEAT_POWER:			/*			 * Turn on ports, even if there isn't per-port switching.			 * HC will report connect events even before this is set.			 * However, khubd will ignore the roothub events until			 * the roothub is registered.			 */			xhci_writel(xhci, temp | PORT_POWER, addr);			temp = xhci_readl(xhci, addr);			xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x/n", wIndex, temp);			break;		case USB_PORT_FEAT_RESET:			temp = (temp | PORT_RESET);			xhci_writel(xhci, temp, addr);			temp = xhci_readl(xhci, addr);			xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x/n", wIndex, temp);			break;		default:			goto error;		}		temp = xhci_readl(xhci, addr); /* unblock any posted writes */		break;	case ClearPortFeature:		if (!wIndex || wIndex > ports)			goto error;		wIndex--;		addr = &xhci->op_regs->port_status_base +			NUM_PORT_REGS*(wIndex & 0xff);		temp = xhci_readl(xhci, addr);		temp = xhci_port_state_to_neutral(temp);		switch (wValue) {		case USB_PORT_FEAT_C_RESET://.........这里部分代码省略.........

int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,		u16 wIndex, char *buf, u16 wLength){	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);	int max_ports;	unsigned long flags;	u32 temp, status;	int retval = 0;	__le32 __iomem **port_array;	int slot_id;	struct xhci_bus_state *bus_state;	u16 link_state = 0;	u16 wake_mask = 0;	u32 __iomem *status_reg = NULL;	u32 i, command, num_ports, selector;	max_ports = xhci_get_ports(hcd, &port_array);	bus_state = &xhci->bus_state[hcd_index(hcd)];	spin_lock_irqsave(&xhci->lock, flags);	switch (typeReq) {	case GetHubStatus:		/* No power source, over-current reported per port */		memset(buf, 0, 4);		break;	case GetHubDescriptor:		/* Check to make sure userspace is asking for the USB 3.0 hub		 * descriptor for the USB 3.0 roothub.  If not, we stall the		 * endpoint, like external hubs do.		 */		if (hcd->speed == HCD_USB3 &&				(wLength < USB_DT_SS_HUB_SIZE ||				 wValue != (USB_DT_SS_HUB << 8))) {			xhci_dbg(xhci, "Wrong hub descriptor type for "					"USB 3.0 roothub./n");			goto error;		}		xhci_hub_descriptor(hcd, xhci,				(struct usb_hub_descriptor *) buf);		break;	case DeviceRequest | USB_REQ_GET_DESCRIPTOR:		if ((wValue & 0xff00) != (USB_DT_BOS << 8))			goto error;		if (hcd->speed != HCD_USB3)			goto error;		memcpy(buf, &usb_bos_descriptor,				USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE);		temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);		buf[12] = HCS_U1_LATENCY(temp);		put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);		spin_unlock_irqrestore(&xhci->lock, flags);		return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE;	case GetPortStatus:		if (!wIndex || wIndex > max_ports)			goto error;		wIndex--;		status = 0;		temp = xhci_readl(xhci, port_array[wIndex]);		if (temp == 0xffffffff) {			retval = -ENODEV;			break;		}		xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x/n", wIndex, temp);		/* wPortChange bits */		if (temp & PORT_CSC)			status |= USB_PORT_STAT_C_CONNECTION << 16;		if (temp & PORT_PEC)			status |= USB_PORT_STAT_C_ENABLE << 16;		if ((temp & PORT_OCC))			status |= USB_PORT_STAT_C_OVERCURRENT << 16;		if ((temp & PORT_RC))			status |= USB_PORT_STAT_C_RESET << 16;		/* USB3.0 only */		if (hcd->speed == HCD_USB3) {			if ((temp & PORT_PLC))				status |= USB_PORT_STAT_C_LINK_STATE << 16;			if ((temp & PORT_WRC))				status |= USB_PORT_STAT_C_BH_RESET << 16;		}		if (hcd->speed != HCD_USB3) {			if ((temp & PORT_PLS_MASK) == XDEV_U3					&& (temp & PORT_POWER))				status |= USB_PORT_STAT_SUSPEND;		}		if ((temp & PORT_PLS_MASK) == XDEV_RESUME &&				!DEV_SUPERSPEED(temp)) {			if ((temp & PORT_RESET) || !(temp & PORT_PE))				goto error;			if (time_after_eq(jiffies,					bus_state->resume_done[wIndex])) {				xhci_dbg(xhci, "Resume USB2 port %d/n",					wIndex + 1);				bus_state->resume_done[wIndex] = 0;//.........这里部分代码省略.........

static void xhci_print_cap_regs(struct xhci_hcd *xhci){	u32 temp;	xhci_dbg(xhci, "xHCI capability registers at %p:/n", xhci->cap_regs);	temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);	xhci_dbg(xhci, "CAPLENGTH AND HCIVERSION 0x%x:/n",			(unsigned int) temp);	xhci_dbg(xhci, "CAPLENGTH: 0x%x/n",			(unsigned int) HC_LENGTH(temp));	xhci_dbg(xhci, "HCIVERSION: 0x%x/n",			(unsigned int) HC_VERSION(temp));	temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);	xhci_dbg(xhci, "HCSPARAMS 1: 0x%x/n",			(unsigned int) temp);	xhci_dbg(xhci, "  Max device slots: %u/n",			(unsigned int) HCS_MAX_SLOTS(temp));	xhci_dbg(xhci, "  Max interrupters: %u/n",			(unsigned int) HCS_MAX_INTRS(temp));	xhci_dbg(xhci, "  Max ports: %u/n",			(unsigned int) HCS_MAX_PORTS(temp));	temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);	xhci_dbg(xhci, "HCSPARAMS 2: 0x%x/n",			(unsigned int) temp);	xhci_dbg(xhci, "  Isoc scheduling threshold: %u/n",			(unsigned int) HCS_IST(temp));	xhci_dbg(xhci, "  Maximum allowed segments in event ring: %u/n",			(unsigned int) HCS_ERST_MAX(temp));	temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);	xhci_dbg(xhci, "HCSPARAMS 3 0x%x:/n",			(unsigned int) temp);	xhci_dbg(xhci, "  Worst case U1 device exit latency: %u/n",			(unsigned int) HCS_U1_LATENCY(temp));	xhci_dbg(xhci, "  Worst case U2 device exit latency: %u/n",			(unsigned int) HCS_U2_LATENCY(temp));	temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);	xhci_dbg(xhci, "HCC PARAMS 0x%x:/n", (unsigned int) temp);	xhci_dbg(xhci, "  HC generates %s bit addresses/n",			HCC_64BIT_ADDR(temp) ? "64" : "32");	/* FIXME */	xhci_dbg(xhci, "  FIXME: more HCCPARAMS debugging/n");	temp = xhci_readl(xhci, &xhci->cap_regs->run_regs_off);	xhci_dbg(xhci, "RTSOFF 0x%x:/n", temp & RTSOFF_MASK);}

int xhci_bus_suspend(struct usb_hcd *hcd){	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);	int max_ports, port_index;	__le32 __iomem **port_array;	struct xhci_bus_state *bus_state;	unsigned long flags;	max_ports = xhci_get_ports(hcd, &port_array);	bus_state = &xhci->bus_state[hcd_index(hcd)];	spin_lock_irqsave(&xhci->lock, flags);	if (hcd->self.root_hub->do_remote_wakeup) {		if (bus_state->resuming_ports) {			spin_unlock_irqrestore(&xhci->lock, flags);			xhci_dbg(xhci, "suspend failed because "						"a port is resuming/n");			return -EBUSY;		}	}	port_index = max_ports;	bus_state->bus_suspended = 0;	while (port_index--) {		/* suspend the port if the port is not suspended */		u32 t1, t2;		int slot_id;		t1 = xhci_readl(xhci, port_array[port_index]);		t2 = xhci_port_state_to_neutral(t1);		if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {			xhci_dbg(xhci, "port %d not suspended/n", port_index);			slot_id = xhci_find_slot_id_by_port(hcd, xhci,					port_index + 1);			if (slot_id) {				spin_unlock_irqrestore(&xhci->lock, flags);				xhci_stop_device(xhci, slot_id, 1);				spin_lock_irqsave(&xhci->lock, flags);			}			t2 &= ~PORT_PLS_MASK;			t2 |= PORT_LINK_STROBE | XDEV_U3;			set_bit(port_index, &bus_state->bus_suspended);		}		/* USB core sets remote wake mask for USB 3.0 hubs,		 * including the USB 3.0 roothub, but only if CONFIG_USB_SUSPEND		 * is enabled, so also enable remote wake here.		 */		if (hcd->self.root_hub->do_remote_wakeup) {			if (t1 & PORT_CONNECT) {				t2 |= PORT_WKOC_E | PORT_WKDISC_E;				t2 &= ~PORT_WKCONN_E;			} else {				t2 |= PORT_WKOC_E | PORT_WKCONN_E;				t2 &= ~PORT_WKDISC_E;			}		} else			t2 &= ~PORT_WAKE_BITS;		t1 = xhci_port_state_to_neutral(t1);		if (t1 != t2) {			xhci_writel(xhci, t2, port_array[port_index]);	}	hcd->state = HC_STATE_SUSPENDED;	bus_state->next_statechange = jiffies + msecs_to_jiffies(10);	spin_unlock_irqrestore(&xhci->lock, flags);	return 0;}int xhci_bus_resume(struct usb_hcd *hcd){	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);	int max_ports, port_index;	__le32 __iomem **port_array;	struct xhci_bus_state *bus_state;	u32 temp;	unsigned long flags;	max_ports = xhci_get_ports(hcd, &port_array);	bus_state = &xhci->bus_state[hcd_index(hcd)];	if (time_before(jiffies, bus_state->next_statechange))		msleep(5);	spin_lock_irqsave(&xhci->lock, flags);	if (!HCD_HW_ACCESSIBLE(hcd)) {		spin_unlock_irqrestore(&xhci->lock, flags);		return -ESHUTDOWN;	}	/* delay the irqs */	temp = xhci_readl(xhci, &xhci->op_regs->command);	temp &= ~CMD_EIE;	xhci_writel(xhci, temp, &xhci->op_regs->command);	port_index = max_ports;	while (port_index--) {		/* Check whether need resume ports. If needed		   resume port and disable remote wakeup *///.........这里部分代码省略.........

static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci){	struct pci_dev		*pdev = to_pci_dev(dev);	/* Look for vendor-specific quirks */	if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&			(pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||			 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {		if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&				pdev->revision == 0x0) {			xhci->quirks |= XHCI_RESET_EP_QUIRK;			xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"					" endpoint cmd after reset endpoint/n");		}		/* Fresco Logic confirms: all revisions of this chip do not		 * support MSI, even though some of them claim to in their PCI		 * capabilities.		 */		xhci->quirks |= XHCI_BROKEN_MSI;		xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "				"has broken MSI implementation/n",				pdev->revision);		xhci->quirks |= XHCI_TRUST_TX_LENGTH;	}	if (pdev->vendor == PCI_VENDOR_ID_NEC)		xhci->quirks |= XHCI_NEC_HOST;	if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)		xhci->quirks |= XHCI_AMD_0x96_HOST;	/* AMD PLL quirk */	if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())		xhci->quirks |= XHCI_AMD_PLL_FIX;	if (pdev->vendor == PCI_VENDOR_ID_AMD)		xhci->quirks |= XHCI_TRUST_TX_LENGTH;	if (pdev->vendor == PCI_VENDOR_ID_INTEL)		xhci->quirks |= XHCI_AVOID_BEI;	if (pdev->vendor == PCI_VENDOR_ID_INTEL &&			pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {		xhci->quirks |= XHCI_EP_LIMIT_QUIRK;		xhci->limit_active_eps = 64;		xhci->quirks |= XHCI_SW_BW_CHECKING;		/*		 * PPT desktop boards DH77EB and DH77DF will power back on after		 * a few seconds of being shutdown.  The fix for this is to		 * switch the ports from xHCI to EHCI on shutdown.  We can't use		 * DMI information to find those particular boards (since each		 * vendor will change the board name), so we have to key off all		 * PPT chipsets.		 */		xhci->quirks |= XHCI_SPURIOUS_REBOOT;	}	if (pdev->vendor == PCI_VENDOR_ID_INTEL &&		(pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||		 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||		 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) {		xhci->quirks |= XHCI_PME_STUCK_QUIRK;	}	if (pdev->vendor == PCI_VENDOR_ID_ETRON &&			pdev->device == PCI_DEVICE_ID_ASROCK_P67) {		xhci->quirks |= XHCI_RESET_ON_RESUME;		xhci_dbg(xhci, "QUIRK: Resetting on resume/n");		xhci->quirks |= XHCI_TRUST_TX_LENGTH;	}	if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&			pdev->device == 0x0015)		xhci->quirks |= XHCI_RESET_ON_RESUME;	if (pdev->vendor == PCI_VENDOR_ID_VIA)		xhci->quirks |= XHCI_RESET_ON_RESUME;}

static void xhci_print_cap_regs(struct xhci_hcd *xhci){	u32 temp;	u32 hci_version;	xhci_dbg(xhci, "xHCI capability registers at %p:/n", xhci->cap_regs);	temp = readl(&xhci->cap_regs->hc_capbase);	hci_version = HC_VERSION(temp);	xhci_dbg(xhci, "CAPLENGTH AND HCIVERSION 0x%x:/n",			(unsigned int) temp);	xhci_dbg(xhci, "CAPLENGTH: 0x%x/n",			(unsigned int) HC_LENGTH(temp));	xhci_dbg(xhci, "HCIVERSION: 0x%x/n", hci_version);	temp = readl(&xhci->cap_regs->hcs_params1);	xhci_dbg(xhci, "HCSPARAMS 1: 0x%x/n",			(unsigned int) temp);	xhci_dbg(xhci, "  Max device slots: %u/n",			(unsigned int) HCS_MAX_SLOTS(temp));	xhci_dbg(xhci, "  Max interrupters: %u/n",			(unsigned int) HCS_MAX_INTRS(temp));	xhci_dbg(xhci, "  Max ports: %u/n",			(unsigned int) HCS_MAX_PORTS(temp));	temp = readl(&xhci->cap_regs->hcs_params2);	xhci_dbg(xhci, "HCSPARAMS 2: 0x%x/n",			(unsigned int) temp);	xhci_dbg(xhci, "  Isoc scheduling threshold: %u/n",			(unsigned int) HCS_IST(temp));	xhci_dbg(xhci, "  Maximum allowed segments in event ring: %u/n",			(unsigned int) HCS_ERST_MAX(temp));	temp = readl(&xhci->cap_regs->hcs_params3);	xhci_dbg(xhci, "HCSPARAMS 3 0x%x:/n",			(unsigned int) temp);	xhci_dbg(xhci, "  Worst case U1 device exit latency: %u/n",			(unsigned int) HCS_U1_LATENCY(temp));	xhci_dbg(xhci, "  Worst case U2 device exit latency: %u/n",			(unsigned int) HCS_U2_LATENCY(temp));	temp = readl(&xhci->cap_regs->hcc_params);	xhci_dbg(xhci, "HCC PARAMS 0x%x:/n", (unsigned int) temp);	xhci_dbg(xhci, "  HC generates %s bit addresses/n",			HCC_64BIT_ADDR(temp) ? "64" : "32");	xhci_dbg(xhci, "  HC %s Contiguous Frame ID Capability/n",			HCC_CFC(temp) ? "has" : "hasn't");	xhci_dbg(xhci, "  HC %s generate Stopped - Short Package event/n",			HCC_SPC(temp) ? "can" : "can't");	/* FIXME */	xhci_dbg(xhci, "  FIXME: more HCCPARAMS debugging/n");	temp = readl(&xhci->cap_regs->run_regs_off);	xhci_dbg(xhci, "RTSOFF 0x%x:/n", temp & RTSOFF_MASK);	/* xhci 1.1 controllers have the HCCPARAMS2 register */	if (hci_version > 0x100) {		temp = readl(&xhci->cap_regs->hcc_params2);		xhci_dbg(xhci, "HCC PARAMS2 0x%x:/n", (unsigned int) temp);		xhci_dbg(xhci, "  HC %s Force save context capability",			 HCC2_FSC(temp) ? "supports" : "doesn't support");		xhci_dbg(xhci, "  HC %s Large ESIT Payload Capability",			 HCC2_LEC(temp) ? "supports" : "doesn't support");		xhci_dbg(xhci, "  HC %s Extended TBC capability",			 HCC2_ETC(temp) ? "supports" : "doesn't support");	}}

int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,		u16 wIndex, char *buf, u16 wLength){	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);	int max_ports, max_portpmsc;	unsigned long flags;	u32 temp, status;	int retval = 0;	__le32 __iomem **port_array;	__le32 __iomem **portpmsc_array;	int slot_id;	struct xhci_bus_state *bus_state;	u16 link_state = 0;	u16 wake_mask = 0;	u8 selector;	max_ports = xhci_get_ports(hcd, &port_array);	max_portpmsc = xhci_get_portpmsc(hcd, &portpmsc_array);	bus_state = &xhci->bus_state[hcd_index(hcd)];	spin_lock_irqsave(&xhci->lock, flags);	switch (typeReq) {	case GetHubStatus:		/* No power source, over-current reported per port */		memset(buf, 0, 4);		break;	case GetHubDescriptor:		/* Check to make sure userspace is asking for the USB 3.0 hub		 * descriptor for the USB 3.0 roothub.  If not, we stall the		 * endpoint, like external hubs do.		 */		if (hcd->speed == HCD_USB3 &&				(wLength < USB_DT_SS_HUB_SIZE ||				 wValue != (USB_DT_SS_HUB << 8))) {			xhci_dbg(xhci, "Wrong hub descriptor type for "					"USB 3.0 roothub./n");			goto error;		}		xhci_hub_descriptor(hcd, xhci,				(struct usb_hub_descriptor *) buf);		break;	case DeviceRequest | USB_REQ_GET_DESCRIPTOR:		if ((wValue & 0xff00) != (USB_DT_BOS << 8))			goto error;		if (hcd->speed != HCD_USB3)			goto error;		memcpy(buf, &usb_bos_descriptor,				USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE);		temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);		buf[12] = HCS_U1_LATENCY(temp);		put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);		spin_unlock_irqrestore(&xhci->lock, flags);		return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE;	case GetPortStatus:		if (!wIndex || wIndex > max_ports)			goto error;		wIndex--;		status = 0;		temp = xhci_readl(xhci, port_array[wIndex]);		if (temp == 0xffffffff) {			retval = -ENODEV;			break;		}		xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x/n", wIndex, temp);		/* wPortChange bits */		if (temp & PORT_CSC)			status |= USB_PORT_STAT_C_CONNECTION << 16;		if (temp & PORT_PEC)			status |= USB_PORT_STAT_C_ENABLE << 16;		if ((temp & PORT_OCC))			status |= USB_PORT_STAT_C_OVERCURRENT << 16;		if ((temp & PORT_RC))			status |= USB_PORT_STAT_C_RESET << 16;		/* USB3.0 only */		if (hcd->speed == HCD_USB3) {			if ((temp & PORT_PLC))				status |= USB_PORT_STAT_C_LINK_STATE << 16;			if ((temp & PORT_WRC))				status |= USB_PORT_STAT_C_BH_RESET << 16;			if ((temp & PORT_CEC))				status |= USB_PORT_STAT_C_CONFIG_ERROR << 16;		}		if (hcd->speed != HCD_USB3) {			if ((temp & PORT_PLS_MASK) == XDEV_U3					&& (temp & PORT_POWER))				status |= USB_PORT_STAT_SUSPEND;		}		if ((temp & PORT_PLS_MASK) == XDEV_RESUME &&				!DEV_SUPERSPEED(temp)) {			if ((temp & PORT_RESET) || !(temp & PORT_PE))				goto error;			if (time_after_eq(jiffies,					bus_state->resume_done[wIndex])) {				xhci_dbg(xhci, "Resume USB2 port %d/n",					wIndex + 1);//.........这里部分代码省略.........

int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,		u16 wIndex, char *buf, u16 wLength){	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);	int ports;	unsigned long flags;	u32 temp, temp1, status;	int retval = 0;	u32 __iomem **port_array;	int slot_id;	struct xhci_bus_state *bus_state;	if (hcd->speed == HCD_USB3) {		ports = xhci->num_usb3_ports;		port_array = xhci->usb3_ports;	} else {		ports = xhci->num_usb2_ports;		port_array = xhci->usb2_ports;	}	bus_state = &xhci->bus_state[hcd_index(hcd)];	spin_lock_irqsave(&xhci->lock, flags);	switch (typeReq) {	case GetHubStatus:		/* No power source, over-current reported per port */		memset(buf, 0, 4);		break;	case GetHubDescriptor:		/* Check to make sure userspace is asking for the USB 3.0 hub		 * descriptor for the USB 3.0 roothub.  If not, we stall the		 * endpoint, like external hubs do.		 */		if (hcd->speed == HCD_USB3 &&				(wLength < USB_DT_SS_HUB_SIZE ||				 wValue != (USB_DT_SS_HUB << 8))) {			xhci_dbg(xhci, "Wrong hub descriptor type for "					"USB 3.0 roothub./n");			goto error;		}		xhci_hub_descriptor(hcd, xhci,				(struct usb_hub_descriptor *) buf);		break;	case GetPortStatus:		if (!wIndex || wIndex > ports)			goto error;		wIndex--;		status = 0;		temp = xhci_readl(xhci, port_array[wIndex]);		if (temp == 0xffffffff) {			retval = -ENODEV;			break;		}		xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x/n", wIndex, temp);		/* FIXME - should we return a port status value like the USB		 * 3.0 external hubs do?		 */		/* wPortChange bits */		if (temp & PORT_CSC)			status |= USB_PORT_STAT_C_CONNECTION << 16;		if (temp & PORT_PEC)			status |= USB_PORT_STAT_C_ENABLE << 16;		if ((temp & PORT_OCC))			status |= USB_PORT_STAT_C_OVERCURRENT << 16;		/*		 * FIXME ignoring reset and USB 2.1/3.0 specific		 * changes		 */		if ((temp & PORT_PLS_MASK) == XDEV_U3			&& (temp & PORT_POWER))			status |= 1 << USB_PORT_FEAT_SUSPEND;		if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {			if ((temp & PORT_RESET) || !(temp & PORT_PE))				goto error;			if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,						bus_state->resume_done[wIndex])) {				xhci_dbg(xhci, "Resume USB2 port %d/n",					wIndex + 1);				bus_state->resume_done[wIndex] = 0;				temp1 = xhci_port_state_to_neutral(temp);				temp1 &= ~PORT_PLS_MASK;				temp1 |= PORT_LINK_STROBE | XDEV_U0;				xhci_writel(xhci, temp1, port_array[wIndex]);				xhci_dbg(xhci, "set port %d resume/n",					wIndex + 1);				slot_id = xhci_find_slot_id_by_port(hcd, xhci,								 wIndex + 1);				if (!slot_id) {					xhci_dbg(xhci, "slot_id is zero/n");					goto error;				}				xhci_ring_device(xhci, slot_id);				bus_state->port_c_suspend |= 1 << wIndex;				bus_state->suspended_ports &= ~(1 << wIndex);			}		}		if ((temp & PORT_PLS_MASK) == XDEV_U0			&& (temp & PORT_POWER)			&& (bus_state->suspended_ports & (1 << wIndex))) {//.........这里部分代码省略.........

int xhci_bus_resume(struct usb_hcd *hcd){	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);	int max_ports, port_index;	u32 __iomem **port_array;	struct xhci_bus_state *bus_state;	u32 temp;	unsigned long flags;	if (hcd->speed == HCD_USB3) {		max_ports = xhci->num_usb3_ports;		port_array = xhci->usb3_ports;		xhci_dbg(xhci, "resume USB 3.0 root hub/n");	} else {		max_ports = xhci->num_usb2_ports;		port_array = xhci->usb2_ports;		xhci_dbg(xhci, "resume USB 2.0 root hub/n");	}	bus_state = &xhci->bus_state[hcd_index(hcd)];	if (time_before(jiffies, bus_state->next_statechange))		msleep(5);	spin_lock_irqsave(&xhci->lock, flags);	if (!HCD_HW_ACCESSIBLE(hcd)) {		spin_unlock_irqrestore(&xhci->lock, flags);		return -ESHUTDOWN;	}	/* delay the irqs */	temp = xhci_readl(xhci, &xhci->op_regs->command);	temp &= ~CMD_EIE;	xhci_writel(xhci, temp, &xhci->op_regs->command);	port_index = max_ports;	while (port_index--) {		/* Check whether need resume ports. If needed		   resume port and disable remote wakeup */		u32 temp;		int slot_id;		temp = xhci_readl(xhci, port_array[port_index]);		if (DEV_SUPERSPEED(temp))			temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);		else			temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);		if (test_bit(port_index, &bus_state->bus_suspended) &&		    (temp & PORT_PLS_MASK)) {			if (DEV_SUPERSPEED(temp)) {				temp = xhci_port_state_to_neutral(temp);				temp &= ~PORT_PLS_MASK;				temp |= PORT_LINK_STROBE | XDEV_U0;				xhci_writel(xhci, temp, port_array[port_index]);			} else {				temp = xhci_port_state_to_neutral(temp);				temp &= ~PORT_PLS_MASK;				temp |= PORT_LINK_STROBE | XDEV_RESUME;				xhci_writel(xhci, temp, port_array[port_index]);				spin_unlock_irqrestore(&xhci->lock, flags);				msleep(20);				spin_lock_irqsave(&xhci->lock, flags);				temp = xhci_readl(xhci, port_array[port_index]);				temp = xhci_port_state_to_neutral(temp);				temp &= ~PORT_PLS_MASK;				temp |= PORT_LINK_STROBE | XDEV_U0;				xhci_writel(xhci, temp, port_array[port_index]);			}			slot_id = xhci_find_slot_id_by_port(hcd,					xhci, port_index + 1);			if (slot_id)				xhci_ring_device(xhci, slot_id);		} else			xhci_writel(xhci, temp, port_array[port_index]);		if (DEV_HIGHSPEED(temp)) {			/* disable remote wake up for USB 2.0 */			u32 __iomem *addr;			u32 tmp;			/* Add one to the port status register address to get			 * the port power control register address.			 */			addr = port_array[port_index] + 1;			tmp = xhci_readl(xhci, addr);			tmp &= ~PORT_RWE;			xhci_writel(xhci, tmp, addr);		}	}	(void) xhci_readl(xhci, &xhci->op_regs->command);	bus_state->next_statechange = jiffies + msecs_to_jiffies(5);	/* re-enable irqs */	temp = xhci_readl(xhci, &xhci->op_regs->command);	temp |= CMD_EIE;	xhci_writel(xhci, temp, &xhci->op_regs->command);	temp = xhci_readl(xhci, &xhci->op_regs->command);//.........这里部分代码省略.........

int xhci_bus_suspend(struct usb_hcd *hcd){	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);	int max_ports, port_index;	__le32 __iomem **port_array;	struct xhci_bus_state *bus_state;	unsigned long flags;	max_ports = xhci_get_ports(hcd, &port_array);	bus_state = &xhci->bus_state[hcd_index(hcd)];	spin_lock_irqsave(&xhci->lock, flags);	if (hcd->self.root_hub->do_remote_wakeup) {		if (bus_state->resuming_ports) {			spin_unlock_irqrestore(&xhci->lock, flags);			xhci_dbg(xhci, "suspend failed because "						"a port is resuming/n");			return -EBUSY;		}	}	port_index = max_ports;	bus_state->bus_suspended = 0;	while (port_index--) {		/* suspend the port if the port is not suspended */		u32 t1, t2;		int slot_id;		t1 = xhci_readl(xhci, port_array[port_index]);		t2 = xhci_port_state_to_neutral(t1);		if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {			xhci_dbg(xhci, "port %d not suspended/n", port_index);			slot_id = xhci_find_slot_id_by_port(hcd, xhci,					port_index + 1);			if (slot_id) {				spin_unlock_irqrestore(&xhci->lock, flags);				xhci_stop_device(xhci, slot_id, 1);				spin_lock_irqsave(&xhci->lock, flags);			}			t2 &= ~PORT_PLS_MASK;			t2 |= PORT_LINK_STROBE | XDEV_U3;			set_bit(port_index, &bus_state->bus_suspended);		}		/* USB core sets remote wake mask for USB 3.0 hubs,		 * including the USB 3.0 roothub, but only if CONFIG_PM_RUNTIME		 * is enabled, so also enable remote wake here.		 */		if (hcd->self.root_hub->do_remote_wakeup) {			if (t1 & PORT_CONNECT) {				t2 |= PORT_WKOC_E | PORT_WKDISC_E;				t2 &= ~PORT_WKCONN_E;			} else {				t2 |= PORT_WKOC_E | PORT_WKCONN_E;				t2 &= ~PORT_WKDISC_E;			}		} else			t2 &= ~PORT_WAKE_BITS;		t1 = xhci_port_state_to_neutral(t1);		if (t1 != t2)			xhci_writel(xhci, t2, port_array[port_index]);	}	hcd->state = HC_STATE_SUSPENDED;	bus_state->next_statechange = jiffies + msecs_to_jiffies(10);	spin_unlock_irqrestore(&xhci->lock, flags);	return 0;}

static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci){    struct pci_dev		*pdev = to_pci_dev(dev);    /* Look for vendor-specific quirks */    if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&            (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||             pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {        if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&                pdev->revision == 0x0) {            xhci->quirks |= XHCI_RESET_EP_QUIRK;            xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"                     " endpoint cmd after reset endpoint/n");        }        if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&                pdev->revision == 0x4) {            xhci->quirks |= XHCI_SLOW_SUSPEND;            xhci_dbg(xhci,                     "QUIRK: Fresco Logic xHC revision %u"                     "must be suspended extra slowly",                     pdev->revision);        }        /* Fresco Logic confirms: all revisions of this chip do not         * support MSI, even though some of them claim to in their PCI         * capabilities.         */        xhci->quirks |= XHCI_BROKEN_MSI;        xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "                 "has broken MSI implementation/n",                 pdev->revision);        xhci->quirks |= XHCI_TRUST_TX_LENGTH;    }    if (pdev->vendor == PCI_VENDOR_ID_NEC)        xhci->quirks |= XHCI_NEC_HOST;    if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)        xhci->quirks |= XHCI_AMD_0x96_HOST;    /* AMD PLL quirk */    if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())        xhci->quirks |= XHCI_AMD_PLL_FIX;    if (pdev->vendor == PCI_VENDOR_ID_AMD)        xhci->quirks |= XHCI_TRUST_TX_LENGTH;    if (pdev->vendor == PCI_VENDOR_ID_INTEL)        xhci->quirks |= XHCI_AVOID_BEI;    if (pdev->vendor == PCI_VENDOR_ID_INTEL &&            pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {        xhci->quirks |= XHCI_EP_LIMIT_QUIRK;        xhci->limit_active_eps = 64;        xhci->quirks |= XHCI_SW_BW_CHECKING;        /*         * PPT desktop boards DH77EB and DH77DF will power back on after         * a few seconds of being shutdown.  The fix for this is to         * switch the ports from xHCI to EHCI on shutdown.  We can't use         * DMI information to find those particular boards (since each         * vendor will change the board name), so we have to key off all         * PPT chipsets.         */        xhci->quirks |= XHCI_SPURIOUS_REBOOT;    }    if (pdev->vendor == PCI_VENDOR_ID_INTEL &&            (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI ||             pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI)) {        /* Workaround for occasional spurious wakeups from S5 (or         * any other sleep) on Haswell machines with LPT and LPT-LP         * with the new Intel BIOS         */        /* Limit the quirk to only known vendors, as this triggers         * yet another BIOS bug on some other machines         * https://bugzilla.kernel.org/show_bug.cgi?id=66171         */        if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)            xhci->quirks |= XHCI_SPURIOUS_WAKEUP;    }    if (pdev->vendor == PCI_VENDOR_ID_INTEL &&            (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||             pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||             pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) {        xhci->quirks |= XHCI_PME_STUCK_QUIRK;    }    if (pdev->vendor == PCI_VENDOR_ID_ETRON &&            pdev->device == PCI_DEVICE_ID_ASROCK_P67) {        xhci->quirks |= XHCI_RESET_ON_RESUME;        xhci_dbg(xhci, "QUIRK: Resetting on resume/n");        xhci->quirks |= XHCI_TRUST_TX_LENGTH;    }    if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&            pdev->device == 0x0015)        xhci->quirks |= XHCI_RESET_ON_RESUME;    if (pdev->vendor == PCI_VENDOR_ID_VIA)        xhci->quirks |= XHCI_RESET_ON_RESUME;}

int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,		struct usb_device *udev, gfp_t flags){	struct xhci_virt_device *dev;	int i;	/* Slot ID 0 is reserved */	if (slot_id == 0 || xhci->devs[slot_id]) {		xhci_warn(xhci, "Bad Slot ID %d/n", slot_id);		return 0;	}	xhci->devs[slot_id] = kzalloc(sizeof(*xhci->devs[slot_id]), flags);	if (!xhci->devs[slot_id])		return 0;	dev = xhci->devs[slot_id];	/* Allocate the (output) device context that will be used in the HC. */	dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);	if (!dev->out_ctx)		goto fail;	xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)/n", slot_id,			(unsigned long long)dev->out_ctx->dma);	/* Allocate the (input) device context for address device command */	dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags);	if (!dev->in_ctx)		goto fail;	xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)/n", slot_id,			(unsigned long long)dev->in_ctx->dma);	/* Initialize the cancellation list and watchdog timers for each ep */	for (i = 0; i < 31; i++) {		xhci_init_endpoint_timer(xhci, &dev->eps[i]);		INIT_LIST_HEAD(&dev->eps[i].cancelled_td_list);	}	/* Allocate endpoint 0 ring */	dev->eps[0].ring = xhci_ring_alloc(xhci, 1, true, flags);	if (!dev->eps[0].ring)		goto fail;	/* Allocate pointers to the ring cache */	dev->ring_cache = kzalloc(			sizeof(struct xhci_ring *)*XHCI_MAX_RINGS_CACHED,			flags);	if (!dev->ring_cache)		goto fail;	dev->num_rings_cached = 0;	init_completion(&dev->cmd_completion);	INIT_LIST_HEAD(&dev->cmd_list);	/* Point to output device context in dcbaa. */	xhci->dcbaa->dev_context_ptrs[slot_id] = dev->out_ctx->dma;	xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx/n",			slot_id,			&xhci->dcbaa->dev_context_ptrs[slot_id],			(unsigned long long) xhci->dcbaa->dev_context_ptrs[slot_id]);	return 1;fail:	xhci_free_virt_device(xhci, slot_id);	return 0;}

static void xhci_print_op_regs(struct xhci_hcd *xhci){	xhci_dbg(xhci, "xHCI operational registers at %p:/n", xhci->op_regs);	xhci_print_command_reg(xhci);	xhci_print_status(xhci);}

int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,		u16 wIndex, char *buf, u16 wLength){	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);	int max_ports;	unsigned long flags;	u32 temp, status;	int retval = 0;	__le32 __iomem **port_array;	int slot_id;	struct xhci_bus_state *bus_state;	u16 link_state = 0;	u16 wake_mask = 0;	max_ports = xhci_get_ports(hcd, &port_array);	bus_state = &xhci->bus_state[hcd_index(hcd)];	spin_lock_irqsave(&xhci->lock, flags);	switch (typeReq) {	case GetHubStatus:		/* No power source, over-current reported per port */		memset(buf, 0, 4);		break;	case GetHubDescriptor:		/* Check to make sure userspace is asking for the USB 3.0 hub		 * descriptor for the USB 3.0 roothub.  If not, we stall the		 * endpoint, like external hubs do.		 */		if (hcd->speed == HCD_USB3 &&				(wLength < USB_DT_SS_HUB_SIZE ||				 wValue != (USB_DT_SS_HUB << 8))) {			xhci_dbg(xhci, "Wrong hub descriptor type for "					"USB 3.0 roothub./n");			goto error;		}		xhci_hub_descriptor(hcd, xhci,				(struct usb_hub_descriptor *) buf);		break;	case DeviceRequest | USB_REQ_GET_DESCRIPTOR:		if ((wValue & 0xff00) != (USB_DT_BOS << 8))			goto error;		if (hcd->speed != HCD_USB3)			goto error;		memcpy(buf, &usb_bos_descriptor,				USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE);		temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);		buf[12] = HCS_U1_LATENCY(temp);		put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);		spin_unlock_irqrestore(&xhci->lock, flags);		return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE;	case GetPortStatus:		if (!wIndex || wIndex > max_ports)			goto error;		wIndex--;		status = 0;		temp = xhci_readl(xhci, port_array[wIndex]);		if (temp == 0xffffffff) {			retval = -ENODEV;			break;		}		xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x/n", wIndex, temp);		/* wPortChange bits */		if (temp & PORT_CSC)			status |= USB_PORT_STAT_C_CONNECTION << 16;		if (temp & PORT_PEC)			status |= USB_PORT_STAT_C_ENABLE << 16;		if ((temp & PORT_OCC))			status |= USB_PORT_STAT_C_OVERCURRENT << 16;		if ((temp & PORT_RC))			status |= USB_PORT_STAT_C_RESET << 16;		/* USB3.0 only */		if (hcd->speed == HCD_USB3) {			if ((temp & PORT_PLC))				status |= USB_PORT_STAT_C_LINK_STATE << 16;			if ((temp & PORT_WRC))				status |= USB_PORT_STAT_C_BH_RESET << 16;		}		if (hcd->speed != HCD_USB3) {			if ((temp & PORT_PLS_MASK) == XDEV_U3					&& (temp & PORT_POWER))				status |= USB_PORT_STAT_SUSPEND;		}		if ((temp & PORT_PLS_MASK) == XDEV_RESUME &&				!DEV_SUPERSPEED(temp)) {			if ((temp & PORT_RESET) || !(temp & PORT_PE))				goto error;			if (time_after_eq(jiffies,					bus_state->resume_done[wIndex])) {				xhci_dbg(xhci, "Resume USB2 port %d/n",					wIndex + 1);				bus_state->resume_done[wIndex] = 0;				xhci_set_link_state(xhci, port_array, wIndex,							XDEV_U0);				xhci_dbg(xhci, "set port %d resume/n",					wIndex + 1);//.........这里部分代码省略.........

/* Setup an xHCI virtual device for a Set Address command */int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev){	struct xhci_virt_device *dev;	struct xhci_ep_ctx	*ep0_ctx;	struct usb_device	*top_dev;	struct xhci_slot_ctx    *slot_ctx;	struct xhci_input_control_ctx *ctrl_ctx;	dev = xhci->devs[udev->slot_id];	/* Slot ID 0 is reserved */	if (udev->slot_id == 0 || !dev) {		xhci_warn(xhci, "Slot ID %d is not assigned to this device/n",				udev->slot_id);		return -EINVAL;	}	ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0);	ctrl_ctx = xhci_get_input_control_ctx(xhci, dev->in_ctx);	slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx);	/* 2) New slot context and endpoint 0 context are valid*/	ctrl_ctx->add_flags = SWAP32(SLOT_FLAG | EP0_FLAG);	/* 3) Only the control endpoint is valid - one endpoint context */	slot_ctx->dev_info |= SWAP32(LAST_CTX(1));	slot_ctx->dev_info |= SWAP32((u32) udev->route);	switch (udev->speed) {	case USB_SPEED_SUPER:		slot_ctx->dev_info |= SWAP32((u32) SLOT_SPEED_SS);		break;	case USB_SPEED_HIGH:		slot_ctx->dev_info |= SWAP32((u32) SLOT_SPEED_HS);		break;	case USB_SPEED_FULL:		slot_ctx->dev_info |= SWAP32((u32) SLOT_SPEED_FS);		break;	case USB_SPEED_LOW:		slot_ctx->dev_info |= SWAP32((u32) SLOT_SPEED_LS);		break;	case USB_SPEED_VARIABLE:		xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds/n");		return -EINVAL;		break;	default:		/* Speed was set earlier, this shouldn't happen. */		BUG();	}	/* Find the root hub port this device is under */	for (top_dev = udev; top_dev->parent && top_dev->parent->parent;			top_dev = top_dev->parent)		/* Found device below root hub */;	slot_ctx->dev_info2 |= SWAP32((u32) ROOT_HUB_PORT(top_dev->portnum));	xhci_dbg(xhci, "Set root hub portnum to %d/n", top_dev->portnum);	/* Is this a LS/FS device under a HS hub? */	if ((udev->speed == USB_SPEED_LOW || udev->speed == USB_SPEED_FULL) &&			udev->tt) {		slot_ctx->tt_info  = SWAP32(udev->tt->hub->slot_id);		slot_ctx->tt_info |= SWAP32(udev->ttport << 8);		if (udev->tt->multi)			slot_ctx->dev_info |= SWAP32(DEV_MTT);	}	xhci_dbg(xhci, "udev->tt = %p/n", udev->tt);	xhci_dbg(xhci, "udev->ttport = 0x%x/n", udev->ttport);	/* Step 4 - ring already allocated */	/* Step 5 */	ep0_ctx->ep_info2 = SWAP32(EP_TYPE(CTRL_EP));	/*	 * XXX: Not sure about wireless USB devices.	 */	switch (udev->speed) {	case USB_SPEED_SUPER:		ep0_ctx->ep_info2 |= SWAP32(MAX_PACKET(512));		break;	case USB_SPEED_HIGH:	/* USB core guesses at a 64-byte max packet first for FS devices */	case USB_SPEED_FULL:		ep0_ctx->ep_info2 |= SWAP32(MAX_PACKET(64));		break;	case USB_SPEED_LOW:		ep0_ctx->ep_info2 |= SWAP32(MAX_PACKET(8));		break;	case USB_SPEED_VARIABLE:		xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds/n");		return -EINVAL;		break;	default:		/* New speed? */		BUG();	}	/* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */	ep0_ctx->ep_info2 |= SWAP32(MAX_BURST(0));	ep0_ctx->ep_info2 |= SWAP32(ERROR_COUNT(3));	ep0_ctx->deq =		SWAP64(dev->eps[0].ring->first_seg->dma);	ep0_ctx->deq |= SWAP64(dev->eps[0].ring->cycle_state);//.........这里部分代码省略.........

/* called during probe() after chip reset completes */static int ubi32_xhci_drv_setup(struct usb_hcd *hcd){    struct xhci_hcd		*xhci;    int			retval;    u32			temp;    hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;    if (usb_hcd_is_primary_hcd(hcd)) {        xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);        if (!xhci)            return -ENOMEM;        *((struct xhci_hcd **) hcd->hcd_priv) = xhci;        xhci->main_hcd = hcd;        /* Mark the first roothub as being USB 2.0.         * The xHCI driver will register the USB 3.0 roothub.         */        hcd->speed = HCD_USB2;        hcd->self.root_hub->speed = USB_SPEED_HIGH;        /*         * USB 2.0 roothub under xHCI has an integrated TT,         * (rate matching hub) as opposed to having an OHCI/UHCI         * companion controller.         */        hcd->has_tt = 1;    } else {        /* xHCI private pointer was set in xhci_pci_probe for the second         * registered roothub.         */        xhci = hcd_to_xhci(hcd);        temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);        if (HCC_64BIT_ADDR(temp)) {            xhci_dbg(xhci, "Enabling 64-bit DMA addresses./n");            dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));        } else {            dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));        }        return 0;    }    xhci->cap_regs = hcd->regs;    xhci->op_regs = hcd->regs +                    HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));    xhci->run_regs = hcd->regs +                     (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);    /* Cache read-only capability registers */    xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);    xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);    xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);    xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);    xhci->hci_version = HC_VERSION(xhci->hcc_params);    xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);    xhci_print_registers(xhci);    /* Make sure the HC is halted. */    retval = xhci_halt(xhci);    if (retval)        goto error;    xhci_dbg(xhci, "Resetting HCD/n");    /* Reset the internal HC memory state and registers. */    retval = xhci_reset(xhci);    if (retval)        goto error;    xhci_dbg(xhci, "Reset complete/n");    temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);    if (HCC_64BIT_ADDR(temp)) {        xhci_dbg(xhci, "Enabling 64-bit DMA addresses./n");        dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));    } else {        dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));    }    xhci_dbg(xhci, "Calling HCD init/n");    /* Initialize HCD and host controller data structures. */    retval = xhci_init(hcd);    if (retval)        goto error;    xhci_dbg(xhci, "Called HCD init/n");    if (!retval)        return retval;error:    kfree(xhci);    return retval;}