自学教程：C++ BTIF_SET_BIT函数代码示例

int btif_rx_dma_ctrl(P_MTK_DMA_INFO_STR p_dma_info, ENUM_DMA_CTRL ctrl_id){	unsigned int i_ret = -1;	unsigned long base = p_dma_info->base;	unsigned int dat;	BTIF_TRC_FUNC();	if (DMA_CTRL_DISABLE == ctrl_id) {		/*if write 0 to EN bit, DMA will be stoped imediately*/		/*if write 1 to STOP bit, DMA will be stoped after current transaction finished*/		/*BTIF_CLR_BIT(RX_DMA_EN(base), DMA_EN_BIT);*/		BTIF_SET_BIT(RX_DMA_STOP(base), DMA_STOP_BIT);		do {			dat = BTIF_READ32(RX_DMA_STOP(base));		} while (0x1 & dat);		BTIF_DBG_FUNC("BTIF Rx DMA disabled,EN(0x%x),STOP(0x%x)/n",			BTIF_READ32(RX_DMA_EN(base)), BTIF_READ32(RX_DMA_STOP(base)));		i_ret = 0;	} else if (DMA_CTRL_ENABLE == ctrl_id) {		BTIF_SET_BIT(RX_DMA_EN(base), DMA_EN_BIT);		BTIF_DBG_FUNC("BTIF Rx DMA enabled/n");		i_ret = 0;	} else {/*TODO: print error log*/		BTIF_ERR_FUNC("invalid DMA ctrl_id (%d)/n", ctrl_id);		i_ret = ERR_INVALID_PAR;	}	BTIF_TRC_FUNC();	return i_ret;}

int hal_btif_dma_hw_init(P_MTK_DMA_INFO_STR p_dma_info){	int i_ret = 0;	unsigned long base = p_dma_info->base;	P_DMA_VFIFO p_vfifo = p_dma_info->p_vfifo;	P_MTK_BTIF_DMA_VFIFO p_mtk_dma_vfifo = container_of(p_vfifo,							    MTK_BTIF_DMA_VFIFO,							    vfifo);	if (DMA_DIR_RX == p_dma_info->dir) {/*Rx DMA*//*do hardware reset*///		BTIF_SET_BIT(RX_DMA_RST(base), DMA_HARD_RST);//		BTIF_CLR_BIT(RX_DMA_RST(base), DMA_HARD_RST);				BTIF_SET_BIT(RX_DMA_RST(base), DMA_WARM_RST);		while((0x01 & BTIF_READ32(RX_DMA_EN(base))));/*write vfifo base address to VFF_ADDR*/		btif_reg_sync_writel(p_vfifo->phy_addr, RX_DMA_VFF_ADDR(base));/*write vfifo length to VFF_LEN*/		btif_reg_sync_writel(p_vfifo->vfifo_size, RX_DMA_VFF_LEN(base));/*write wpt to VFF_WPT*/		btif_reg_sync_writel(p_mtk_dma_vfifo->wpt,				     RX_DMA_VFF_WPT(base));		btif_reg_sync_writel(p_mtk_dma_vfifo->rpt,					 RX_DMA_VFF_RPT(base));/*write vff_thre to VFF_THRESHOLD*/		btif_reg_sync_writel(p_vfifo->thre, RX_DMA_VFF_THRE(base));/*clear Rx DMA's interrupt status*/		BTIF_SET_BIT(RX_DMA_INT_FLAG(base),			     RX_DMA_INT_DONE | RX_DMA_INT_THRE);/*enable Rx IER by default*/		btif_rx_dma_ier_ctrl(p_dma_info, true);	} else {/*Tx DMA*//*do hardware reset*///		BTIF_SET_BIT(TX_DMA_RST(base), DMA_HARD_RST);//		BTIF_CLR_BIT(TX_DMA_RST(base), DMA_HARD_RST);		BTIF_SET_BIT(TX_DMA_RST(base), DMA_WARM_RST);		while((0x01 & BTIF_READ32(TX_DMA_EN(base))));/*write vfifo base address to VFF_ADDR*/		btif_reg_sync_writel(p_vfifo->phy_addr, TX_DMA_VFF_ADDR(base));/*write vfifo length to VFF_LEN*/		btif_reg_sync_writel(p_vfifo->vfifo_size, TX_DMA_VFF_LEN(base));/*write wpt to VFF_WPT*/		btif_reg_sync_writel(p_mtk_dma_vfifo->wpt,				     TX_DMA_VFF_WPT(base));		btif_reg_sync_writel(p_mtk_dma_vfifo->rpt,				     TX_DMA_VFF_RPT(base));/*write vff_thre to VFF_THRESHOLD*/		btif_reg_sync_writel(p_vfifo->thre, TX_DMA_VFF_THRE(base));		BTIF_CLR_BIT(TX_DMA_INT_FLAG(base), TX_DMA_INT_FLAG_MASK);		hal_btif_dma_ier_ctrl(p_dma_info, false);	}	return i_ret;}

/****************************************************************************** FUNCTION*  hal_btif_raise_wak_sig* DESCRIPTION*  raise wakeup signal to counterpart* PARAMETERS* p_base   [IN]        BTIF module's base address* RETURNS*  0 means success, negative means fail*****************************************************************************/int hal_btif_raise_wak_sig(P_MTK_BTIF_INFO_STR p_btif){    int i_ret = -1;    unsigned int base = p_btif->base;#if MTK_BTIF_ENABLE_CLK_CTL    if (0 == clock_is_on(MTK_BTIF_CG_BIT)) {        BTIF_ERR_FUNC("%s: clock is off before send wakeup signal!!!/n",                      __FILE__);        return i_ret;    }#endif    /*write 0  to BTIF_WAK to pull ap_wakeup_consyss low */    BTIF_CLR_BIT(BTIF_WAK(base), BTIF_WAK_BIT);    /*wait for a period for longer than 1/32k period, here we use 40us*/    set_current_state(TASK_UNINTERRUPTIBLE);    usleep_range(64, 96);    /*according to linux/documentation/timers/timers-how-to, we choose usleep_range    SLEEPING FOR ~USECS OR SMALL MSECS ( 10us - 20ms):      * Use usleep_range    */    /*write 1 to pull ap_wakeup_consyss high*/    BTIF_SET_BIT(BTIF_WAK(base), BTIF_WAK_BIT);    i_ret = 0;    return i_ret;}

static int btif_new_handshake_ctrl(P_MTK_BTIF_INFO_STR p_btif, bool enable){    unsigned int base = p_btif->base;    if (true == enable) {        BTIF_SET_BIT(BTIF_HANDSHAKE(base), BTIF_HANDSHAKE_EN_HANDSHAKE);    } else {        BTIF_CLR_BIT(BTIF_HANDSHAKE(base), BTIF_HANDSHAKE_EN_HANDSHAKE);    }    return true;}

/****************************************************************************** FUNCTION*  hal_btif_rx_ier_ctrl* DESCRIPTION*  BTIF Rx interrupt enable/disable* PARAMETERS* p_base   [IN]        BTIF module's base address* enable    [IN]        control if rx interrupt enabled or not* RETURNS*  0 means success, negative means fail*****************************************************************************/int hal_btif_rx_ier_ctrl(P_MTK_BTIF_INFO_STR p_btif, bool en){    int i_ret = -1;    unsigned int base = p_btif->base;    if (false == en) {        BTIF_CLR_BIT(BTIF_IER(base), BTIF_IER_RXFEN);    } else {        BTIF_SET_BIT(BTIF_IER(base), BTIF_IER_RXFEN);    }    /*TODO:do we need to read back ? Answer: no*/    i_ret = 0;    return i_ret;}

int btif_tx_dma_ier_ctrl(P_MTK_DMA_INFO_STR p_dma_info, bool en){	unsigned int i_ret = -1;	unsigned long base = p_dma_info->base;	BTIF_TRC_FUNC();	if (!en)		BTIF_CLR_BIT(TX_DMA_INT_EN(base), TX_DMA_INTEN_BIT);	else		BTIF_SET_BIT(TX_DMA_INT_EN(base), TX_DMA_INTEN_BIT);	i_ret = 0;	BTIF_TRC_FUNC();	return i_ret;}

/****************************************************************************** FUNCTION*  hal_btif_tx_mode_ctrl* DESCRIPTION*  set BTIF tx to corresponding mode (PIO/DMA)* PARAMETERS* p_base   [IN]        BTIF module's base address* mode     [IN]        rx mode <PIO/DMA>* RETURNS*  0 means success, negative means fail*****************************************************************************/int hal_btif_tx_mode_ctrl(P_MTK_BTIF_INFO_STR p_btif, ENUM_BTIF_MODE mode){    int i_ret = -1;    unsigned int base = p_btif->base;    if (BTIF_MODE_DMA == mode) {        /*set to DMA mode*/        BTIF_SET_BIT(BTIF_DMA_EN(base), BTIF_DMA_EN_TX);    } else {        /*set to PIO mode*/        BTIF_CLR_BIT(BTIF_DMA_EN(base), BTIF_DMA_EN_TX);    }    i_ret = 0;    return i_ret;}

/****************************************************************************** FUNCTION*  hal_btif_loopback_ctrl* DESCRIPTION*  BTIF Tx/Rx loopback mode set, this operation can only be done after set BTIF to normal mode* PARAMETERS* RETURNS*  0 means success, negative means fail*****************************************************************************/int hal_btif_loopback_ctrl(P_MTK_BTIF_INFO_STR p_btif, bool en){    int i_ret = -1;    unsigned int base = p_btif->base;    if (false == en) {        BTIF_CLR_BIT(BTIF_TRI_LVL(base), BTIF_TRI_LOOP_EN);    } else {        BTIF_SET_BIT(BTIF_TRI_LVL(base), BTIF_TRI_LOOP_EN);    }    /*TODO:do we need to read back ? Answer: no*/    /*TODO:do we need to dsb?*/    i_ret = 0;    return i_ret;}

/****************************************************************************** FUNCTION*  btif_tx_fifo_reset* DESCRIPTION*  reset BTIF's tx fifo* PARAMETERS* p_base   [IN]        BTIF module's base address* RETURNS*  0 means success, negative means fail*****************************************************************************/static int btif_tx_fifo_reset(P_MTK_BTIF_INFO_STR p_btif){    int i_ret = -1;    unsigned int base = p_btif->base;    /*set Tx FIFO clear bit to 1*/    BTIF_SET_BIT(BTIF_FIFOCTRL(base), BTIF_FIFOCTRL_CLR_TX);    /*clear Tx FIFO clear bit to 0*/    BTIF_CLR_BIT(BTIF_FIFOCTRL(base), BTIF_FIFOCTRL_CLR_TX);    /*TODO:do we need to read back ? Answer: no*/    /*TODO:do we need to dsb?*/    i_ret = 0;    return i_ret;}

static int _tx_dma_flush(P_MTK_DMA_INFO_STR p_dma_info){	unsigned int i_ret = -1;	unsigned long base = p_dma_info->base;	unsigned int stop = BTIF_READ32(TX_DMA_STOP(base));/*in MTK DMA BTIF channel we cannot set STOP and FLUSH bit at the same time*/	if ((DMA_STOP_BIT && stop) != 0)		BTIF_ERR_FUNC("BTIF's DMA in stop state, omit flush operation/n");	else {		BTIF_DBG_FUNC("flush tx dma/n");		BTIF_SET_BIT(TX_DMA_FLUSH(base), DMA_FLUSH_BIT);		i_ret = 0;	}	return i_ret;}

/****************************************************************************** FUNCTION*  btif_rx_fifo_reset* DESCRIPTION*  reset BTIF's rx fifo* PARAMETERS* p_base   [IN]        BTIF module's base address* ec         [IN]        control if loopback mode is enabled or not* RETURNS*  0 means success, negative means fail*****************************************************************************/static int btif_rx_fifo_reset(P_MTK_BTIF_INFO_STR p_btif){    /*Chaozhong: To be implement*/    int i_ret = -1;    unsigned int base = p_btif->base;    /*set Rx FIFO clear bit to 1*/    BTIF_SET_BIT(BTIF_FIFOCTRL(base), BTIF_FIFOCTRL_CLR_RX);    /*clear Rx FIFO clear bit to 0*/    BTIF_CLR_BIT(BTIF_FIFOCTRL(base), BTIF_FIFOCTRL_CLR_RX);    /*TODO:do we need to read back ? Answer: no*/    /*TODO:do we need to dsb?*/    i_ret = 0;    return i_ret;}

int btif_sleep_ctrl(P_MTK_BTIF_INFO_STR p_btif, bool en){    int i_ret = -1;    unsigned int base = p_btif->base;    if (false == en) {        BTIF_CLR_BIT(BTIF_SLEEP_EN(base), BTIF_SLEEP_EN_BIT);    } else {        BTIF_SET_BIT(BTIF_SLEEP_EN(base), BTIF_SLEEP_EN_BIT);    }    /*TODO:do we need to read back ? Answer: no*/    /*TODO:do we need to dsb?*/    i_ret = 0;    return i_ret;}

int btif_rx_dma_ier_ctrl(P_MTK_DMA_INFO_STR p_dma_info, bool en){	unsigned int i_ret = -1;	unsigned int base = p_dma_info->base;	BTIF_TRC_FUNC();	if (!en) {		BTIF_CLR_BIT(RX_DMA_INT_EN(base),			     (RX_DMA_INT_THRE_EN | RX_DMA_INT_DONE_EN));	} else {		BTIF_SET_BIT(RX_DMA_INT_EN(base),			     (RX_DMA_INT_THRE_EN | RX_DMA_INT_DONE_EN));	}	i_ret = 0;	BTIF_TRC_FUNC();	return i_ret;}

/****************************************************************************** FUNCTION*  hal_btif_hw_init* DESCRIPTION*  BTIF hardware init* PARAMETERS* p_base   [IN]        BTIF module's base address* RETURNS*  0 means success, negative means fail*****************************************************************************/int hal_btif_hw_init(P_MTK_BTIF_INFO_STR p_btif){    /*Chaozhong: To be implement*/    int i_ret = -1;    unsigned int base = p_btif->base;	#if NEW_TX_HANDLING_SUPPORT	_btif_tx_fifo_reset(p_btif);#endif    /*set to normal mode*/    btif_reg_sync_writel(BTIF_FAKELCR_NORMAL_MODE, BTIF_FAKELCR(base));    /*set to newhandshake mode*/    btif_new_handshake_ctrl(p_btif, true);    /*No need to access: enable sleep mode*/    /*No need to access: set Rx timeout count*/    /*set Tx threshold*/    /*set Rx threshold*/    /*disable internal loopback test*/    btif_reg_sync_writel(BTIF_TRI_LVL_TX(p_btif->tx_tri_lvl) /                         | BTIF_TRI_LVL_RX(p_btif->rx_tri_lvl) /                         | BTIF_TRI_LOOP_DIS,/                         BTIF_TRI_LVL(base));    hal_btif_loopback_ctrl(p_btif, false);    /*disable BTIF Tx DMA mode*/    hal_btif_tx_mode_ctrl(p_btif, false);    /*disable BTIF Rx DMA mode*/    hal_btif_rx_mode_ctrl(p_btif, false);    /*auto reset*/    BTIF_SET_BIT(BTIF_DMA_EN(base), BTIF_DMA_EN_AUTORST_EN);    /*disable Tx IER*/    hal_btif_tx_ier_ctrl( p_btif, false);    /*enable Rx IER by default*/    hal_btif_rx_ier_ctrl( p_btif, true);    	    i_ret = 0;    return i_ret;}

int btif_tx_dma_ctrl(P_MTK_DMA_INFO_STR p_dma_info, ENUM_DMA_CTRL ctrl_id){	unsigned int i_ret = -1;	unsigned int base = p_dma_info->base;	BTIF_TRC_FUNC();	if (DMA_CTRL_DISABLE == ctrl_id) {/*if write 0 to EN bit, DMA will be stoped imediately*//*if write 1 to STOP bit, DMA will be stoped after current transaction finished*/		BTIF_CLR_BIT(TX_DMA_EN(base), DMA_EN_BIT);		BTIF_DBG_FUNC("BTIF Tx DMA disabled/n");		i_ret = 0;	} else if (DMA_CTRL_ENABLE == ctrl_id) {		BTIF_SET_BIT(TX_DMA_EN(base), DMA_EN_BIT);		BTIF_DBG_FUNC("BTIF Tx DMA enabled/n");		i_ret = 0;	} else {/*TODO: print error log*/		BTIF_ERR_FUNC("invalid DMA ctrl_id (%d)/n", ctrl_id);		i_ret = ERR_INVALID_PAR;	}	BTIF_TRC_FUNC();	return i_ret;}

/****************************************************************************** FUNCTION*  hal_rx_dma_irq_handler* DESCRIPTION*  lower level rx interrupt handler* PARAMETERS* p_dma_info   [IN]        pointer to BTIF dma channel's information* p_buf     [IN/OUT] pointer to rx data buffer* max_len  [IN]        max length of rx buffer* RETURNS*  0 means success, negative means fail*****************************************************************************/int hal_rx_dma_irq_handler(P_MTK_DMA_INFO_STR p_dma_info,			   unsigned char *p_buf, const unsigned int max_len){	int i_ret = -1;	unsigned int valid_len = 0;	unsigned int wpt_wrap = 0;	unsigned int rpt_wrap = 0;	unsigned int wpt = 0;	unsigned int rpt = 0;	unsigned int tail_len = 0;	unsigned int real_len = 0;	unsigned int base = p_dma_info->base;	P_DMA_VFIFO p_vfifo = p_dma_info->p_vfifo;	dma_rx_buf_write rx_cb = p_dma_info->rx_cb;	unsigned char *p_vff_buf = NULL;	unsigned char *vff_base = p_vfifo->p_vir_addr;	unsigned int vff_size = p_vfifo->vfifo_size;	P_MTK_BTIF_DMA_VFIFO p_mtk_vfifo = container_of(p_vfifo,							MTK_BTIF_DMA_VFIFO,							vfifo);	unsigned long flag = 0;	spin_lock_irqsave(&(g_clk_cg_spinlock), flag);	if (0 == clock_is_on(MTK_BTIF_APDMA_CLK_CG)) {		spin_unlock_irqrestore(&(g_clk_cg_spinlock), flag);		BTIF_ERR_FUNC("%s: clock is off before irq handle done!!!/n",			      __FILE__);		return i_ret;	}/*disable DMA Rx IER*/	hal_btif_dma_ier_ctrl(p_dma_info, false);/*clear Rx DMA's interrupt status*/	BTIF_SET_BIT(RX_DMA_INT_FLAG(base), RX_DMA_INT_DONE | RX_DMA_INT_THRE);	valid_len = BTIF_READ32(RX_DMA_VFF_VALID_SIZE(base));	rpt = BTIF_READ32(RX_DMA_VFF_RPT(base));	wpt = BTIF_READ32(RX_DMA_VFF_WPT(base));	if ((0 == valid_len) && (rpt == wpt)) {		BTIF_DBG_FUNC		    ("rx interrupt, no data available in Rx DMA, wpt(0x%08x), rpt(0x%08x)/n",		     rpt, wpt);	}	i_ret = 0;	while ((0 < valid_len) || (rpt != wpt)) {		rpt_wrap = rpt & DMA_RPT_WRAP;		wpt_wrap = wpt & DMA_WPT_WRAP;		rpt &= DMA_RPT_MASK;		wpt &= DMA_WPT_MASK;/*calcaute length of available data  in vFIFO*/		if (wpt_wrap != p_mtk_vfifo->last_wpt_wrap) {			real_len = wpt + vff_size - rpt;		} else {			real_len = wpt - rpt;		}		if (NULL != rx_cb) {			tail_len = vff_size - rpt;			p_vff_buf = vff_base + rpt;			if (tail_len >= real_len) {				(*rx_cb) (p_dma_info, p_vff_buf, real_len);			} else {				(*rx_cb) (p_dma_info, p_vff_buf, tail_len);				p_vff_buf = vff_base;				(*rx_cb) (p_dma_info, p_vff_buf, real_len -					  tail_len);			}			i_ret += real_len;		} else {			BTIF_ERR_FUNC			    ("no rx_cb found, please check your init process/n");		}		dsb();		rpt += real_len;		if (rpt >= vff_size) {/*read wrap bit should be revert*/			rpt_wrap ^= DMA_RPT_WRAP;			rpt %= vff_size;		}		rpt |= rpt_wrap;/*record wpt, last_wpt_wrap, rpt, last_rpt_wrap*/		p_mtk_vfifo->wpt = wpt;		p_mtk_vfifo->last_wpt_wrap = wpt_wrap;		p_mtk_vfifo->rpt = rpt;//.........这里部分代码省略.........