自学教程：C++ BV函数代码示例

/* Encrypt at most 16 bytes of data. */static voidcipher16(uint8_t *data, int len){  uint8_t status;  len = MIN(len, MAX_DATALEN);  CC2420_WRITE_RAM(data, CC2420RAM_SABUF, len);  CC2420_STROBE(CC2420_SAES);  /* Wait for the encryption to finish */  do {    CC2420_GET_STATUS(status);  } while(status & BV(CC2420_ENC_BUSY));  CC2420_READ_RAM(data, CC2420RAM_SABUF, len);}

/* * /brief Read contents of PHY register. * * /param reg PHY register number. * * /return Contents of the specified register. */static uint16_t phy_hw_read(uint8_t phy_addr, reg8_t reg){	// PHY read command.	EMAC_MAN = EMAC_SOF | EMAC_RW_READ		| ((phy_addr << EMAC_PHYA_SHIFT) & EMAC_PHYA)		| ((reg  << EMAC_REGA_SHIFT) & EMAC_REGA)		| EMAC_CODE;	// Wait until PHY logic completed.	while (!(EMAC_NSR & BV(EMAC_IDLE)))		cpu_relax();	// Get data from PHY maintenance register.	return (uint16_t)(EMAC_MAN & EMAC_DATA);}

/* * Initialize SPI bus. */voidspi_init(void){  static unsigned char spi_inited = 0;  if (spi_inited)    return;  /* Initalize ports for communication with SPI units. */  /* CSN=SS and must be output when master! */  DDRB  |= BV(MOSI) | BV(SCK) | BV(CSN);  PORTB |= BV(MOSI) | BV(SCK);  /* Enables SPI, selects "master", clock rate FCK / 2, and SPI mode 0 */  SPCR = BV(SPE) | BV(MSTR);  SPSR = BV(SPI2X);}

/************************************************************************************************** * * @fn      timer_start_timerEx * * @brief   Modeled after OSAL_start_timerEx. * 			To stop timer call with same threadId, and event, and * 			set timeout to 0. * * @param   threadId - Id of the thread to call at the event. * @param	event - event bitmask * @param	timeout - number of milliseconds to count down * * @return  void */uint8 timer_start_timerEx(uint8 threadId, uint32 event, uint32 timeout){	uint8 i;	if (event == 0)	{		// No event requested, just return		return -1;	}	for (i = 0; i < 32; i++)	{		if (event & BV(i))			break;	}	LOG_DEBUG_TIMER("[TIMER] timer_start_timerEx(%d, 0x%.8X, %d)... /n", threadId, event, timeout);	fflush(LOG_DESTINATION_FP);	// To avoid race conditions we cannot update timerThreadTbl without mutex lock	pthread_mutex_lock(&timerMutex);	LOG_DEBUG_TIMER("lock (line: %d)/n", __LINE__);	// Value is stored in us for better precision	timerThreadTbl[threadId].timeoutValue[i] = timeout * 1000;	// Use a 0 value of timeout to disable timer	if (timeout)	{		// Enable event		timerThreadTbl[threadId].timerEnabled |= event;		// We also need to make sure the timer update does not decrement now.		timerThreadTbl[threadId].justKicked |= event;	}	else	{		timerThreadTbl[threadId].timerEnabled &= ~event;		// Clear event in case it just fired.		timer_clear_event(threadId, event);	}	LOG_DEBUG_TIMER("[TIMER] Timer started for %dus, for event 0x%.8X and thread %d/n",			(int)timerThreadTbl[threadId].timeoutValue[i], event, threadId);	// Unlock mutex before notifying timer thread	pthread_mutex_unlock(&timerMutex);	// Notify timer thread that timer has been set	pthread_cond_signal(&timerSetCond);	return 1;}

void NRF24L01_Initialize(uint8_t baseConfig){    standbyConfig = BV(NRF24L01_00_CONFIG_PWR_UP) | baseConfig;    NRF24_CE_LO();    // nRF24L01+ needs 100 milliseconds settling time from PowerOnReset to PowerDown mode    static const uint32_t settlingTimeUs = 100000;    const uint32_t currentTimeUs = micros();    if (currentTimeUs < settlingTimeUs) {        delayMicroseconds(settlingTimeUs - currentTimeUs);    }    // now in PowerDown mode    NRF24L01_WriteReg(NRF24L01_00_CONFIG, standbyConfig); // set PWR_UP to enter Standby mode    // nRF24L01+ needs 4500 microseconds from PowerDown mode to Standby mode, for crystal oscillator startup    delayMicroseconds(4500);    // now in Standby mode}

voidcc2420_off(void){  u8_t spiStatusByte;  if (receive_on == 0)    return;  receive_on = 0;  /* Wait for transmission to end before turning radio off. */  do {    spiStatusByte = cc2420_status();  } while (spiStatusByte & BV(CC2420_TX_ACTIVE));  cc2420_strobe(CC2420_SRFOFF);  DISABLE_FIFOP_INT();}

static voidon(void){  if(completely_off) {    completely_off = 0;    powerup();    configure();  }  CC2420_ENABLE_FIFOP_INT();  strobe(CC2420_SRXON);  BUSYWAIT_UNTIL(status() & (BV(CC2420_XOSC16M_STABLE)), RTIMER_SECOND / 100);  ENERGEST_ON(ENERGEST_TYPE_LISTEN);  receive_on = 1;}

intcompile_preamble(int *instructions, struct local *s){    int *instp;    int len;    int extra_regs, i, j, t, disp;    extra_regs = s->maxreg - INITIAL_NSCRATCHREGS;    if (extra_regs > 0) {	len = extra_regs * 2 + 4;	/* stw rp | (n-1) * stw | bl | stw | ldw rp | (n-1) * ldw | bv | ldw */    } else	return 0;    if (instructions == NULL)	return len;    instp = instructions;    /* Generate a wrapper function to save the callee-saves registers       before invoking the filter code we have generated.  It would be       marginally better to have the filter branch directly to the       postamble code on return, but the difference is trivial and it       is easier to have it always branch to (rp).  */#define FRAME_SIZE 128	/* This is plenty without being excessive. */    *instp++ = STW_NEG(REG_RTN, 20, REG_SP);		/* stw rp,-20(sp) */    i = INITIAL_NSCRATCHREGS;    t = STWM(scratchregs[i], FRAME_SIZE, REG_SP);	/* stwm r3,128(sp) */    j = FRAME_SIZE;    while (++i < s->maxreg) {	*instp++ = t;	j -= sizeof (int);	t = STW_NEG(scratchregs[i], j, REG_SP);		/* stw r4,-124(sp) &c */    }    disp = extra_regs + 2;	/* n * ldw | bv | ldw rp */    *instp++ = BL(disp, REG_RTN);			/* bl filter,rp */    *instp++ = t;					/* stw in delay slot */    *instp++ = LDW_NEG(FRAME_SIZE + 20, REG_SP, REG_RTN);							/* ldw -148(sp),rp */    while (--i > INITIAL_NSCRATCHREGS) {	*instp++ = LDW_NEG(j, REG_SP, scratchregs[i]);	/* ldw -124(sp),r4 &c */	j += sizeof (int);    }    *instp++ = BV(0, REG_RTN);				/* bv (rp) */    *instp++ = LDWM_NEG(FRAME_SIZE, REG_SP, scratchregs[i]);							/* ldwm -128(sp),r3							   in delay slot */    assert(instp - instructions == len);    return len;}

void adc_init (void){	adc_ch = 0;	adc_ports[0] = ADC_VOLT;	ADCSRA = BV(ADEN); /* enable ADC conversion */	ADCSRA |= (BV(ADPS2) | BV(ADPS1) | BV(ADPS0)); /* div by 128 presc. */	ADCSRA |= BV(ADIE); /* interrupt enable */	ADMUX = adc_ports[adc_ch]; /* Voltage reference is AREF) */	ADCSRA |= BV(ADSC); /* request ADC conversion */}

void delegateSetCellStatus(uint8_t xCol){	// Col -> set only one port as output low and all others as input full up	DDRCOLUMNS  = BV(xCol);	// 
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