自学教程：C++ DE_INF函数代码示例

__s32 lvds_clk_init(void){	DE_INF("lvds clk init /n");	h_lvdsmclk = OSAL_CCMU_OpenMclk(MOD_CLK_LVDS);#ifdef RESET_OSAL	OSAL_CCMU_MclkReset(h_lvdsmclk, RST_INVAILD);#endif	return DIS_SUCCESS;}

static struct disp_smbl_private_data *disp_smbl_get_priv(struct disp_smbl *smbl){	if(NULL == smbl) {		DE_INF("NULL hdl!/n");		return NULL;	}	return &smbl_private[smbl->disp];}

static s32 disp_smbl_disable(struct disp_smbl* smbl){	struct disp_smbl_private_data *smblp = disp_smbl_get_priv(smbl);	if((NULL == smbl) || (NULL == smblp)) {		DE_INF("NULL hdl!/n");		return -1;	}	DE_INF("smbl %d disable/n", smbl->disp);	disp_sys_lock((void *)&smblp->mlock);	smblp->info.enable = 0;	smblp->info.flags |= SMBL_DIRTY_ENABLE;	disp_smbl_apply(smbl);	disp_sys_unlock((void *)&smblp->mlock);	return 0;}

s32 disp_init_connections(void){	u32 disp = 0;	u32 num_screens = 0;	u32 num_layers = 0,layer_id = 0;	DE_INF("disp_init_connections/n");	num_screens = bsp_disp_feat_get_num_screens();	for(disp=0; disp<num_screens; disp++) {		struct disp_manager *mgr;		struct disp_layer *lyr;		struct disp_device *lcd = NULL;		struct disp_enhance *enhance = NULL;		struct disp_smbl *smbl = NULL;		struct disp_capture *cptr = NULL;		mgr = disp_get_layer_manager(disp);		if(!mgr)			continue;		/* connect layer & it's manager */		num_layers = bsp_disp_feat_get_num_layers(disp);		for(layer_id=0; layer_id<num_layers; layer_id++) {			lyr = disp_get_layer_1(disp, layer_id);			if(NULL != lyr) {				lyr->set_manager(lyr, mgr);			}		}		/* connect device & it's manager */		if(bsp_disp_feat_is_supported_output_types(disp, DISP_OUTPUT_TYPE_LCD)) {			lcd = disp_get_lcd(disp);			if((lcd) && (lcd->set_manager))				lcd->set_manager(lcd, mgr);		} else {			//other device		}		enhance = disp_get_enhance(disp);		if(enhance && (enhance->set_manager)) {			enhance->set_manager(enhance, mgr);		}		smbl = disp_get_smbl(disp);		if(smbl && (smbl->set_manager)) {			smbl->set_manager(smbl, mgr);		}		cptr = disp_get_capture(disp);		if(cptr && (cptr->set_manager)) {			cptr->set_manager(cptr, mgr);		}	}	return 0;}

static struct disp_enhance_private_data *disp_enhance_get_priv(struct disp_enhance *enhance){	if(NULL == enhance) {		DE_INF("NULL hdl!/n");		return NULL;	}	return &enhance_private[enhance->disp];}

void LCD_vbi_event_proc(__u32 sel, __u32 tcon_index){            __u32 cur_line = 0, start_delay = 0;        __u32 i = 0;        //add by heyihang.Jan 28, 2013        if(gdisp.screen[sel].vsync_event_en && gdisp.init_para.vsync_event)        {                gdisp.init_para.vsync_event(sel);        }        	Video_Operation_In_Vblanking(sel, tcon_index);                cur_line = LCDC_get_cur_line(sel, tcon_index);        start_delay = LCDC_get_start_delay(sel, tcon_index);        if(cur_line > start_delay-3)	{	      //DE_INF("cur_line(%d) >= start_delay(%d)-3 in LCD_vbi_event_proc/n", cur_line, start_delay);		return ;	}        if(gdisp.screen[sel].LCD_CPUIF_ISR)        {        	(*gdisp.screen[sel].LCD_CPUIF_ISR)();        }        if(gdisp.screen[sel].cache_flag == FALSE )//&& gdisp.screen[sel].cfg_cnt == 0)        {                for(i=0; i<2; i++)                {                        if((gdisp.scaler[i].status & SCALER_USED) && (gdisp.scaler[i].screen_index == sel))                        {                                DE_SCAL_Set_Reg_Rdy(i);                                //DE_SCAL_Reset(i);                                //DE_SCAL_Start(i);                                gdisp.scaler[i].b_reg_change = FALSE;                        }                        if(gdisp.scaler[i].b_close == TRUE)                        {                                Scaler_close(i);                                gdisp.scaler[i].b_close = FALSE;                        }                }                DE_BE_Cfg_Ready(sel);        	gdisp.screen[sel].have_cfg_reg = TRUE;        }#if 0    cur_line = LCDC_get_cur_line(sel, tcon_index);    	if(cur_line > 5)	{    	DE_INF("%d/n", cur_line);    }#endif    return ;}

__s32 lcdc_clk_init(__u32 screen_id){	DE_INF("lcd %d clk init/n", screen_id);	if(screen_id == 0) {		h_lcd0ahbclk   = OSAL_CCMU_OpenMclk(AHB_CLK_LCD0);		h_lcd0ch0mclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD0CH0);		#if (!defined CONFIG_ARCH_SUN7I)		h_lcd0ch1mclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD0CH1);		#else		h_lcd0ch1mclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD0CH1_S1);		h_lcd0ch1mclk2 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD0CH1_S2);		#endif#ifdef RESET_OSAL		OSAL_CCMU_MclkReset(h_lcd0ch0mclk0, RST_INVAILD);#endif		OSAL_CCMU_SetMclkSrc(h_lcd0ch0mclk0, CLK_LCD_CH0_SRC);		OSAL_CCMU_SetMclkSrc(h_lcd0ch1mclk1, CLK_LCD_CH1_SRC);		OSAL_CCMU_SetMclkDiv(h_lcd0ch1mclk1, 10);		OSAL_CCMU_SetMclkDiv(h_lcd0ch1mclk2, 10);		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_ON);		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_ON);		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_ON);		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_ON);		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_OFF);	}	else if(screen_id == 1)	{		h_lcd1ahbclk   = OSAL_CCMU_OpenMclk(AHB_CLK_LCD1);		h_lcd1ch0mclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD1CH0);		#if (!defined CONFIG_ARCH_SUN7I)		h_lcd1ch1mclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD1CH1);		#else		h_lcd1ch1mclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD1CH1_S1);		h_lcd1ch1mclk2 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD1CH1_S2);		#endif#ifdef RESET_OSAL		OSAL_CCMU_MclkReset(h_lcd1ch0mclk0, RST_INVAILD);#endif		OSAL_CCMU_SetMclkSrc(h_lcd1ch0mclk0, CLK_LCD_CH0_SRC);		OSAL_CCMU_SetMclkSrc(h_lcd1ch1mclk1, CLK_LCD_CH1_SRC);		OSAL_CCMU_SetMclkDiv(h_lcd1ch1mclk1, 10);		OSAL_CCMU_SetMclkDiv(h_lcd1ch1mclk2, 10);		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_ON);		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_ON);		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_ON);		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_OFF);	}	return DIS_SUCCESS;}

__s32 deu_clk_init(__u32 sel){	__u32 pll_freq;	__u32 mclk_div;	DE_INF("deu %d clk init/n", sel);	if(!sel) {		h_deuahbclk0 = OSAL_CCMU_OpenMclk(AHB_CLK_DEU0);		h_deudramclk0 = OSAL_CCMU_OpenMclk(DRAM_CLK_DEU0);		h_deumclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDEU0);		OSAL_CCMU_SetMclkSrc(h_deumclk0, CLK_FE_SRC);	//FIX CONNECT TO  PLL10		OSAL_CCMU_SetMclkDiv(h_deumclk0, 1);		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_FE_SRC);		mclk_div = 1;		while((pll_freq / mclk_div) > 300000000) {			mclk_div ++;		}		OSAL_CCMU_SetMclkDiv(h_deumclk0, mclk_div);		OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_ON);		OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_deudramclk0, CLK_ON);		OSAL_CCMU_MclkOnOff(h_deudramclk0, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_ON);		OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_OFF);#ifdef RESET_OSAL		OSAL_CCMU_MclkReset(h_deumclk0, RST_INVAILD);#endif	}	else {		h_deuahbclk1 = OSAL_CCMU_OpenMclk(AHB_CLK_DEU1);		h_deudramclk1 = OSAL_CCMU_OpenMclk(DRAM_CLK_DEU1);		h_deumclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDEU1);		OSAL_CCMU_SetMclkSrc(h_deumclk1, CLK_FE_SRC);	//FIX CONNECT TO PLL9		OSAL_CCMU_SetMclkDiv(h_deumclk1, 1);		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_FE_SRC);		mclk_div = 1;		while((pll_freq / mclk_div) > 300000000) {			mclk_div ++;		}		OSAL_CCMU_SetMclkDiv(h_deumclk1, mclk_div);		OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_ON);		OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_deudramclk1, CLK_ON);		OSAL_CCMU_MclkOnOff(h_deudramclk1, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_ON);		OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_OFF);#ifdef RESET_OSAL		OSAL_CCMU_MclkReset(h_deumclk1, RST_INVAILD);#endif	}	return DIS_SUCCESS;}

//en : 0-close when vbi//en : 1- open when vbi//en : 2-close immediately__s32 drc_enable(__u32 sel, __u32 en){	switch(en) {	case 0:		if(g_iep_status[sel] & DRC_USED) {			g_iep_status[sel] |= DRC_NEED_CLOSED;		}	else {			DE_INF("[iep_drc.c]DRC hasn't opened yet !/n");		}		break;	case 1:		if(g_iep_status[sel] & DRC_REQUIRED) {			//if((gdisp.screen[sel].output_type == DISP_OUTPUT_TYPE_LCD) && (gdisp.screen[sel].status & LCD_ON))			//{			if(!(g_iep_status[sel] & DRC_USED)) {				drc_init(sel);				g_iep_status[sel] |= DRC_USED;				DE_INF("[iep_drc.c]DRC open now!/n");			}	else {				DE_INF("[iep_drc.c]DRC has already opened before !/n");			}			//}			//else			//{			//  DE_INF("[iep_drc.c]Will OPEN DRC when output to LCD !/n");			//}		}	else {			DE_INF("[iep_drc.c]Run DISP_CMD_DRC_ON will open DRC !/n");		}		break;	case 2:		if(g_iep_status[sel] & DRC_USED) {			drc_close_proc(sel);		}	else {			DE_INF("[iep_drc.c]DRC hasn't opened yet !/n");		}		break;	}	return DIS_SUCCESS;}

__s32 drc_clk_init(__u32 sel){	__u32 pll_freq;	__u32 mclk_div;	DE_INF("drc %d clk init/n", sel);	if(!sel) {		h_drcahbclk0 = OSAL_CCMU_OpenMclk(AHB_CLK_DRC0);		h_drcdramclk0 = OSAL_CCMU_OpenMclk(DRAM_CLK_DRC0);		h_drcmclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDRC0);		OSAL_CCMU_SetMclkSrc(h_drcmclk0, CLK_BE_SRC);		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);		mclk_div = 1;		while((pll_freq / mclk_div) > 300000000) {			mclk_div ++;		}		OSAL_CCMU_SetMclkDiv(h_drcmclk0, mclk_div);		OSAL_CCMU_MclkOnOff(h_drcahbclk0, CLK_ON);		OSAL_CCMU_MclkOnOff(h_drcahbclk0, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_drcdramclk0, CLK_ON);		OSAL_CCMU_MclkOnOff(h_drcdramclk0, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_drcmclk0, CLK_ON);		OSAL_CCMU_MclkOnOff(h_drcmclk0, CLK_OFF);#ifdef RESET_OSAL		OSAL_CCMU_MclkReset(h_drcmclk0, RST_INVAILD);#endif	}	else {		h_drcahbclk1 = OSAL_CCMU_OpenMclk(AHB_CLK_DRC1);		h_drcdramclk1 = OSAL_CCMU_OpenMclk(DRAM_CLK_DRC1);		h_drcmclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDRC1);		OSAL_CCMU_SetMclkSrc(h_drcmclk1, CLK_BE_SRC);		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);		mclk_div = 1;		while((pll_freq / mclk_div) > 300000000) {			mclk_div ++;		}		OSAL_CCMU_SetMclkDiv(h_drcmclk1, mclk_div);		OSAL_CCMU_MclkOnOff(h_drcahbclk1, CLK_ON);		OSAL_CCMU_MclkOnOff(h_drcahbclk1, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_drcdramclk1, CLK_ON);		OSAL_CCMU_MclkOnOff(h_drcdramclk1, CLK_OFF);		OSAL_CCMU_MclkOnOff(h_drcmclk1, CLK_ON);		OSAL_CCMU_MclkOnOff(h_drcmclk1, CLK_OFF);#ifdef RESET_OSAL		OSAL_CCMU_MclkReset(h_drcmclk1, RST_INVAILD);#endif	}	return DIS_SUCCESS;}

__s32 BSP_disp_set_output_csc(__u32 sel, __u32 out_type, __u32 drc_en){    __disp_color_range_t out_color_range = DISP_COLOR_RANGE_0_255;    __u32 out_csc = 0;//out_csc: 0:rgb  1:yuv  2:igb        if(out_type == DISP_OUTPUT_TYPE_HDMI)    {        __s32 ret = 0;        __s32 value = 0;                out_color_range = DISP_COLOR_RANGE_16_255;        ret = OSAL_Script_FetchParser_Data("disp_init", "screen0_out_color_range", &value, 1);        if(ret < 0)        {            DE_INF("fetch script data disp_init.screen0_out_color_range fail/n");        }        else        {            out_color_range = value;            DE_INF("screen0_out_color_range = %d/n", value);        }        out_csc = 0;    }    else if(out_type == DISP_OUTPUT_TYPE_LCD)    {        out_csc = 0;    }    else if(out_type == DISP_OUTPUT_TYPE_TV)    {        out_csc = 1;    }        if(drc_en)    {        out_csc = 2;    }        DE_BE_Set_Enhance(sel, out_csc, out_color_range, gdisp.screen[sel].bright, gdisp.screen[sel].contrast, gdisp.screen[sel].saturation, gdisp.screen[sel].hue);    return DIS_SUCCESS;}

//should protect width @mlockstatic s32 disp_smbl_update_backlight(struct disp_smbl* smbl, unsigned int bl){	if(NULL == smbl) {		DE_INF("NULL hdl!/n");		return -1;	}	smbl->backlight = bl;	return 0;}

/* seem no meaning */static bool disp_enhance_is_enabled(struct disp_enhance* enhance){	struct disp_enhance_private_data *enhancep = disp_enhance_get_priv(enhance);	if((NULL == enhance) || (NULL == enhancep)) {		DE_INF("NULL hdl!/n");		return false;	}	return enhancep->enabled;}

static s32 disp_enhance_exit(struct disp_enhance *enhance){	struct disp_enhance_private_data *enhancep = disp_enhance_get_priv(enhance);	if((NULL == enhance) || (NULL == enhancep)) {		DE_INF("NULL hdl!/n");		return -1;	}	return 0;}

__s32 bsp_disp_scaler_release(__u32 handle){	__u32 scaler_index = 0;	scaler_index = SCALER_HANDTOID(handle);	if(gdisp.scaler[scaler_index].screen_index == 0xff) {		return Scaler_Release(scaler_index, FALSE);	}	DE_INF("bsp_disp_scaler_release, scaler %d not a independent scaler/n", scaler_index);	return 0;}

s32 bsp_disp_set_hdmi_func(u32 screen_id, disp_hdmi_func * func){	struct disp_hdmi* hdmi;	s32 ret = -1;	hdmi = disp_get_hdmi(screen_id);	if(!hdmi) {	    DE_INF("get hdmi%d failed!/n", screen_id);	    return DIS_FAIL;	    }	gdisp.hdmi_registered = 1;	if(hdmi->set_func)	    ret = hdmi->set_func(hdmi, func);	if(gdisp.init_para.start_process) {		DE_INF("gdisp.init_para.start_process/n");		gdisp.init_para.start_process();	}	return ret;}

static s32 disp_smbl_exit(struct disp_smbl *smbl){	struct disp_smbl_private_data *smblp = disp_smbl_get_priv(smbl);	if((NULL == smbl) || (NULL == smblp)) {		DE_INF("NULL hdl!/n");		return -1;	}	return 0;}

__s32 Display_Hdmi_Init(void){    __s32 ret;    __u32 value;    hdmi_clk_init();        ret = OSAL_Script_FetchParser_Data("disp_init", "hdmi_cts_compatibility", &value, 1);    if(ret < 0)    {        DE_INF("disp_init.hdmi_cts_compatibility not exit/n");    }    else    {        DE_INF("disp_init.hdmi_cts_compatibility = %d/n", value);        gdisp.init_para.hdmi_cts_compatibility = value;    }    gdisp.screen[0].hdmi_mode = DISP_TV_MOD_720P_50HZ;    gdisp.screen[1].hdmi_mode = DISP_TV_MOD_720P_50HZ;    return DIS_SUCCESS;}

static bool disp_smbl_is_enabled(struct disp_smbl* smbl){	struct disp_smbl_private_data *smblp = disp_smbl_get_priv(smbl);	if((NULL == smbl) || (NULL == smblp)) {		DE_INF("NULL hdl!/n");		return false;	}	return (smblp->info.enable == 1);}

__s32 disp_video_init(){	__u32 num_screens;	__u32 num_scalers;	__u32 scaler_id;	num_screens = bsp_disp_feat_get_num_screens();	num_scalers = bsp_disp_feat_get_num_scalers();	memset(g_video,0,sizeof(g_video));#ifdef __LINUX_OSAL__	for(scaler_id=0; scaler_id<num_scalers; scaler_id++) {		if((bsp_disp_feat_get_layer_feats(scaler_id, DISP_LAYER_WORK_MODE_SCALER, scaler_id)				    & DISP_LAYER_FEAT_DE_INTERLACE))			bsp_disp_lcd_delay_ms(10);			maf_flag_mem[scaler_id][0] = (void*)__pa((char __iomem *)kmalloc(maf_flag_mem_len, GFP_KERNEL |  __GFP_ZERO));			maf_flag_mem[scaler_id][1] = (void*)__pa((char __iomem *)kmalloc(maf_flag_mem_len, GFP_KERNEL |  __GFP_ZERO));			DE_INF("maf_flag_mem[%d][%d]=0x%8x, maf_flag_mem[%d][%d]=0x%8x/n",scaler_id, 0,				(unsigned int)maf_flag_mem[scaler_id][0], scaler_id, 1, (unsigned int)maf_flag_mem[scaler_id][1]);			if((maf_flag_mem[scaler_id][0] == NULL) || (maf_flag_mem[scaler_id][1] == NULL)) {				DE_WRN("maf memory[%d] request fail/n", scaler_id);			}	}#else	for(scaler_id=0; scaler_id<num_scalers; scaler_id++) {		if((bsp_disp_feat_get_layer_feats(scaler_id, DISP_LAYER_WORK_MODE_SCALER, scaler_id)			    & DISP_LAYER_FEAT_DE_INTERLACE))			maf_flag_mem[scaler_id][0] = OSAL_PhyAlloc(maf_flag_mem_len);			maf_flag_mem[scaler_id][1] = OSAL_PhyAlloc(maf_flag_mem_len);			DE_INF("maf_flag_mem[%d][%d]=0x%8x, maf_flag_mem[%d][%d]=0x%8x/n",scaler_id, 0,				(unsigned int)maf_flag_mem[scaler_id][0], scaler_id, 1, (unsigned int)maf_flag_mem[scaler_id][1]);			if((maf_flag_mem[scaler_id][0] == NULL) || (maf_flag_mem[scaler_id][1] == NULL)) {				DE_WRN("maf memory[%d] request fail/n", scaler_id);			}	}#endif	for(scaler_id=0; scaler_id<num_scalers; scaler_id++) {		dit_mode_default[scaler_id] = DIT_MODE_MAF;	}	return DIS_SUCCESS;}

s32 bsp_disp_lcd_pin_cfg(u32 screen_id, u32 bon){	struct disp_lcd* lcd;	DE_INF("bsp_disp_lcd_pin_cfg, sel=%d, %s/n", screen_id, (bon)? "on":"off");	lcd = disp_get_lcd(screen_id);	if(lcd && lcd->pin_cfg) {		return lcd->pin_cfg(lcd, bon);	}	return DIS_FAIL;}

static s32 disp_enhance_update_regs(struct disp_enhance* enhance){	unsigned long flags;	struct disp_enhance_private_data *enhancep = disp_enhance_get_priv(enhance);	if((NULL == enhance) || (NULL == enhancep)) {		DE_INF("NULL hdl!/n");		return -1;	}	if(enhancep->applied) {		DE_INF("enhance %d, enable=%d/n", enhance->disp, enhancep->config.info.enable);		disp_al_enhance_update_regs(enhance->disp);	}	disp_sys_irqlock((void*)&enhance_data_lock, &flags);	enhancep->applied = false;	disp_sys_irqunlock((void*)&enhance_data_lock, &flags);	return 0;}

__s32 Scaler_open(__u32 scaler_index){	DE_INF("scaler %d open/n", scaler_index);	scaler_clk_on(scaler_index);	deu_clk_open(scaler_index, 0);	DE_SCAL_Reset(scaler_index);	DE_SCAL_DisableINT(scaler_index,DE_WB_END_IE);	DE_SCAL_Enable(scaler_index);	return DIS_SUCCESS;}

__s32 deu_clk_init(__u32 sel){    __u32 pll_freq;    __u32 mclk_div;    DE_INF("deu %d clk init/n", sel);	if(!sel)	{	    h_deuahbclk0 = OSAL_CCMU_OpenMclk(AHB_CLK_DEU0);	    h_deudramclk0 = OSAL_CCMU_OpenMclk(DRAM_CLK_DEU0);	    h_deumclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDEU0);		OSAL_CCMU_MclkReset(h_deumclk0, RST_INVAILD);				OSAL_CCMU_SetMclkSrc(h_deumclk0, SYS_CLK_PLL10);	//FIX CONNECT TO  PLL10		OSAL_CCMU_SetMclkDiv(h_deumclk0, 1);        pll_freq = OSAL_CCMU_GetSrcFreq(SYS_CLK_PLL10);        mclk_div = 1;        while((pll_freq / mclk_div) > 300000000)        {            mclk_div ++;        }		OSAL_CCMU_SetMclkDiv(h_deumclk0, mclk_div);				OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_ON);		OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_ON);		g_deu_clk_status  |= (CLK_DEU0_AHB_ON | CLK_DEU0_MOD_ON);	}	else	{		h_deuahbclk1 = OSAL_CCMU_OpenMclk(AHB_CLK_DEU1);	    h_deudramclk1 = OSAL_CCMU_OpenMclk(DRAM_CLK_DEU1);	    h_deumclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDEU1);		OSAL_CCMU_MclkReset(h_deumclk1, RST_INVAILD);		OSAL_CCMU_SetMclkSrc(h_deumclk1, SYS_CLK_PLL10);	//FIX CONNECT TO PLL10		OSAL_CCMU_SetMclkDiv(h_deumclk1, 1);        pll_freq = OSAL_CCMU_GetSrcFreq(SYS_CLK_PLL10);        mclk_div = 1;        while((pll_freq / mclk_div) > 300000000)        {            mclk_div ++;        }		OSAL_CCMU_SetMclkDiv(h_deumclk1, mclk_div);				OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_ON);		OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_ON);		g_deu_clk_status  |= (CLK_DEU1_AHB_ON | CLK_DEU1_MOD_ON);	}	return DIS_SUCCESS;}

//should protect width @mlockstatic s32 disp_smbl_apply(struct disp_smbl* smbl){	unsigned long flags;	struct disp_smbl_private_data *smblp = disp_smbl_get_priv(smbl);	struct disp_smbl_info info;	if((NULL == smbl) || (NULL == smblp)) {		DE_INF("NULL hdl!/n");		return -1;	}	DE_INF("smbl %d apply, en=%d, win=<%d,%d,%d,%d>/n", smbl->disp,	smblp->info.enable, smblp->info.window.x, smblp->info.window.y,	smblp->info.window.width, smblp->info.window.height);	memset(&info, 0, sizeof(struct disp_smbl_info));	//disp_sys_lock((void *)&smblp->mlock);	if(smbl->backlight != smblp->info.backlight) {		smblp->info.backlight = smbl->backlight;		smblp->info.flags |= SMBL_DIRTY_BL;	}	//FIXME	smblp->info.backlight = 255;	if(SMBL_DIRTY_NONE != smblp->info.flags) {		memcpy(&info, &smblp->info, sizeof(struct disp_smbl_info));		smblp->info.flags = SMBL_DIRTY_NONE;	}	//disp_sys_unlock((void *)&smblp->mlock);	if(SMBL_DIRTY_NONE != info.flags) {		disp_smbl_shadow_protect(smbl, true);		disp_al_smbl_apply(smbl->disp, &info);		disp_smbl_shadow_protect(smbl, false);		disp_sys_irqlock((void*)&smbl_data_lock, &flags);		smblp->applied = true;		disp_sys_irqunlock((void*)&smbl_data_lock, &flags);	}	return 0;}

struct disp_hdmi* disp_get_hdmi(u32 screen_id){	u32 num_screens;	num_screens = bsp_disp_feat_get_num_screens();	if(screen_id >= num_screens) {		DE_WRN("screen_id %d out of range/n", screen_id);		return NULL;	}	if(!(bsp_disp_feat_get_supported_output_types(screen_id) & DISP_OUTPUT_TYPE_HDMI)) {	    DE_INF("screen_id %d do not support HDMI TYPE!/n", screen_id);	    return NULL;	}	if(!disp_al_query_hdmi_mod(screen_id)) {		DE_INF("hdmi %d is not registered/n", screen_id);		return NULL;	}	return &hdmis[screen_id];}

struct disp_smbl* disp_get_smbl(u32 disp){	u32 num_screens;	num_screens = bsp_disp_feat_get_num_screens();	if(disp >= num_screens) {		DE_WRN("disp %d out of range/n", disp);		return NULL;	}	DE_INF("get smbl%d ok/n", disp);	return &smbls[disp];}