自学教程：C++ CLR_BIT函数代码示例

int main(void){	DDRA = 0xFF; //set all pins of port A to output	DDRC = 0x00; //set all pins of port C to input	while(1)	{		int one = 1;		int count = 0;		int i = 0;		while(i < 8)		{			int temp = GET_BIT(PINC,i);			if(temp != 0)			{				count++;			}			++i;		}		if ((count % 2) != 0)		{			CLR_BIT(PORTA, 1);			one = SET_BIT(PORTA, 0);		}		else 		{				CLR_BIT(PORTA, 0);			one = SET_BIT(PORTA, 1);		}		count = 0;	}return 0;	}

int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle,			   unsigned char ae, enum icp_qat_uof_regtype lm_type,			   unsigned char mode){	unsigned int csr, new_csr;	qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &csr);	csr &= IGNORE_W1C_MASK;	switch (lm_type) {	case ICP_LMEM0:		new_csr = (mode) ?			SET_BIT(csr, CE_LMADDR_0_GLOBAL_BITPOS) :			CLR_BIT(csr, CE_LMADDR_0_GLOBAL_BITPOS);		break;	case ICP_LMEM1:		new_csr = (mode) ?			SET_BIT(csr, CE_LMADDR_1_GLOBAL_BITPOS) :			CLR_BIT(csr, CE_LMADDR_1_GLOBAL_BITPOS);		break;	default:		pr_err("QAT: lmType = 0x%x/n", lm_type);		return -EINVAL;	}	if (new_csr != csr)		qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, new_csr);	return 0;}

/* * Player has used hyperjump item. */static void Hyperjump(player_t *pl){    clpos_t dest;    int counter;    hitmask_t hitmask = NONBALL_BIT | HITMASK(pl->team); /* kps - ok ? */    /* Try to find empty space to hyperjump to. */    for (counter = 100; counter > 0; counter--) {	dest = World_get_random_clpos();	if (shape_is_inside(dest.cx, dest.cy, hitmask, OBJ_PTR(pl),			    (shape_t *)pl->ship, pl->dir) == NO_GROUP)	    break;    }    /* We can't find an empty space, hyperjump failed. */    if (!counter) {	/* need to do something else here ? */	Set_player_message(pl, "Could not hyperjump. [*Server notice*]");	CLR_BIT(pl->obj_status, WARPING);	sound_play_sensors(pl->pos, HYPERJUMP_SOUND);	return;    }    sound_play_sensors(pl->pos, HYPERJUMP_SOUND);    Warp_balls(pl, dest);    Object_position_init_clpos(OBJ_PTR(pl), dest);    pl->forceVisible += 15;    CLR_BIT(pl->obj_status, WARPING);}

void LCD_WriteCommand (unsigned char Command) {   CLR_BIT(CONTROL_BUS,RS);   DATA_BUS = Command;   SET_BIT(CONTROL_BUS,E);   asm("nop");   CLR_BIT(CONTROL_BUS,E);   delay_ms(2); // ClearScreen requires 1.52ms to execute}

void set_to_NC(c) {	for (int x=4; x < 8; x++) {		if (x != c) {			CLR_BIT(DDRC, x);			CLR_BIT(PORTC, x);		}	}}

static void output(unsigned char d, unsigned char rs) {  if( rs ) SET_BIT(PORT, RS_PIN); else CLR_BIT(PORT, RS_PIN);  CLR_BIT(PORT, RW_PIN);  set_data(d);  SET_BIT(PORT, EN_PIN);  sleep_700ns();  CLR_BIT(PORT, EN_PIN);}

static unsigned char input(unsigned char rs) {  unsigned char d;  if( rs ) SET_BIT(PORT, RS_PIN); else CLR_BIT(PORT, RS_PIN);  SET_BIT(PORT, RW_PIN);  get_data();  SET_BIT(PORT, EN_PIN);  sleep_700ns();  d = get_data();  CLR_BIT(PORT, EN_PIN);  return d;}

void timer1_init(){//	uint16_t count;	//Timer 1 is used by or for:	//	a) Control Loop Timing and interrupt	//	b) Decoding RC reciever pulses	//With a clock prescale of 8 we get	//Minimum interrupt time period = 400ns(2.5MHz)	//Maxiumum interrupt time period = 26.2144ms(38.14Hz)		//With a clock prescale of 64 we get	//Minimum interrupt time period = 3.2us		//Do not use loop rate greater than 500Hz as that will mess up the RC decoding logic.	//Safe operating loop rate in terms of not conflicting with RC reciever decoding is from	//lower than 300Hz.	TCCR1A = 0;	TCCR1B = 0;	// Prescalar 64	SET_BIT(TCCR1B, CS11);	SET_BIT(TCCR1B, CS10); // 	//CTC (Clear Timer on Compare Match)// 	CLR_BIT(TCCR1B, WGM13); // 	SET_BIT(TCCR1B, WGM12); // 	CLR_BIT(TCCR1A, WGM11); // 	CLR_BIT(TCCR1A, WGM10); 	//Normal non PWM mode 	CLR_BIT(TCCR1B, WGM13);  	CLR_BIT(TCCR1B, WGM12);  	CLR_BIT(TCCR1A, WGM11);  	CLR_BIT(TCCR1A, WGM10); // 	//Calculate count value to generate given interrupt rate.// 	//8 is clock prescale used for Timer 1// 	count = (F_CPU/(CONTROL_LOOP_RATE*8));// 	OCR1A = count;// 	TIMSK1 = 0;// 	//Enable interrupt on Compare Match A// 	SET_BIT(TIMSK1, OCIE1A);  	SET_BIT(TIMSK1, TOIE1); }

unsigned char key_pressed(unsigned char r, unsigned char c) {	DDRC = 0;	PORTC = 0;	CLR_BIT(DDRC, r);	SET_BIT(PORTC, r);	SET_BIT(DDRC, c + 4);	CLR_BIT(PORTC, c + 4);	if (!GET_BIT(PINC, r)) {		return 1;	}	else {		return 0;	}}

void flashSuccess(void){	SET_BIT(PORTB, 0);	wait_avr(150);	CLR_BIT(PORTB, 0);	wait_avr(150);	SET_BIT(PORTB, 0);	wait_avr(150);	CLR_BIT(PORTB, 0);	wait_avr(150);	SET_BIT(PORTB, 0);	wait_avr(150);	CLR_BIT(PORTB, 0);}

static int handleDisconnect1(struct slice *slice, int clNo){        if(slice != NULL) {	if (BIT_ISSET(clNo, slice->sl_reqack.readySet)) {	    /* avoid counting client both as left and ready */	    CLR_BIT(clNo, slice->sl_reqack.readySet);	    slice->nrReady--;	}	if (BIT_ISSET(clNo, slice->answeredSet)) {	    slice->nrAnswered--;	    CLR_BIT(clNo, slice->answeredSet);	}    }    return 0;}

unsigned char get_key(void) {	for (int r=0; r < 4; r++) {		CLR_BIT(DDRC, r);		SET_BIT(PORTC, r);		for (int c=4; c < 8; c++) {			SET_BIT(DDRC, c);			CLR_BIT(PORTC, c);			set_to_NC(c);			if (key_pressed(r,c)) {				return (r*4) + c - 3;			}		}	}	return 0;}

void setPinModeInput(t_SetPortCfg* cfg, uint8_t bit){	t_stPort* stport=(t_stPort *)cfg->pID;  //make the pointer points to the Port Registers in memory	cfg->Portdir=stport->portDirReg;    CLR_BIT(cfg->Portdir,bit);    stport->portDirReg &= cfg->Portdir;}

_Bool pressed(int col, int row){	CLR_BIT(PORTC, col);	_Bool buttonPressed = !GET_BIT(PINC, col) && !GET_BIT(PINC, row);		return !GET_BIT(PINC, col) && !GET_BIT(PINC, row);}

int psivshmem_free_mem(ivshmem_pci_dev_t *dev, char * frame_ptr, size_t size){/* * first implementation: just clear corresponding bit in bitmap -> frame is available * * "a = b/c"  int division round up * int a = (b + (c - 1)) / c  <- rounds up for positiv int, e.g. frameIndices * * */    unsigned long long n;    unsigned long long index_low, index_high;    if(!psivshmem_ptr_in_dev(dev, frame_ptr)) return -1;    if(!psivshmem_ptr_in_dev(dev, frame_ptr + size)) return -1;    index_low = (frame_ptr - dev->ivshmem_base) / dev->frame_size; //has to be a multiple of it!    index_high = (frame_ptr - dev->ivshmem_base + size + (dev->frame_size - 1)) / dev->frame_size;    pthread_spin_lock(dev->spinlock);        for(n = index_low; n<=index_high;n++) {  //'unlock' all N used frames	    CLR_BIT(dev->bitmap, n);	}    pthread_spin_unlock(dev->spinlock);return 0;}

/**********************************************************************************函数功能：点亮或者熄灭某一个显示标志入口：    Flag----1:显示;0:熄灭出口：    1---------有此设备；0------找不到设备**********************************************************************************/INT8U SetOrClr_COM4(INT16U Seg,INT8U Com,INT8U Type,INT8U ClrOrSet){     if((Seg<=MAX_SEG)&&(Com<=MAX_COL))  {    Com=MAX_COL-Com;    if(Seg%2 EQ 0)       //高4位        Com+=MAX_COL+1;          if(ClrOrSet)    {      if(GET_BIT(Show_Lcd_Ram[Seg/2],Com))  //检查内存是否已经置位或者 seg/com配置表错误      return 0;            Show_Lcd_Flag=1;                   SET_BIT(Show_Lcd_Ram[Seg/2],Com);      return 1;    }    else    {              CLR_BIT(Show_Lcd_Ram[Seg/2],Com);      return 1;    }    }  return 0;}

/*** External Function Defines ***/RET spiOpen(SPI_OPEN_PRM *prm){	if(s_IsUsing != 0) return RET_ERR_CONFLICT;	s_IsUsing = 1;		/* io settings */	SET_BIT(SPI_DDR, SPI_MOSI_BIT);	CLR_BIT(SPI_DDR, SPI_MISO_BIT);	SET_BIT(SPI_DDR, SPI_SCK_BIT);		/* spi settings */	uint8_t isLsbFirst = (prm->order == SPI_OPEN_ORDER_LSB_FIRST) ? 1 : 0;	uint8_t isMaster = (prm->role == SPI_OPEN_ROLE_MASTER) ? 1 : 0;	uint8_t mode = prm->mode & 0x03;	uint8_t div = prm->div & 0x03;	uint8_t isDouble = (prm->speed == SPI_OPEN_SPEED_X2) ? 1 : 0;	uint8_t useInterrupt = (prm->blocking == SPI_OPEN_BLOCKING_NO) ? 1 : 0;		if(isMaster){		// when spi is master, SS should be output to avoid unexpected action		SPI_DDR |= 1 << SPI_SS_BIT;	}		uint8_t spcr = (useInterrupt<<SPIE) | (1<<SPE) | (isLsbFirst<<DORD) | (isMaster<<MSTR) | (mode<<CPHA) | div;	SPCR = spcr;	SPSR |= (isDouble == 0 ? 0 : 1);	return RET_OK;}

int main() {	int tmren = 0;	ini_lcd();	InitADC();	timer1_init();	cli();		CLR_BIT(DDRA, 1);		puts_lcd2("I:----  AVG:----");	pos_lcd(1, 0);	puts_lcd2("Mi:----  Ma:----");		while(1) {		wait_btn();		if(tmren) {			cli();			tmren = 0;		}		else {			sei();			tmren = 1;		}			}}

void CbusReset (void){    uint8_t idx;	TX_DEBUG_PRINT( ("CBUS reset!!!/n"));	SET_BIT(REG_SRST, 3);	HalTimerWait(2);	CLR_BIT(REG_SRST, 3);	mscCmdInProgress = false;    UNMASK_INTR_4_INTERRUPTS;#if (SYSTEM_BOARD == SB_STARTER_KIT_X01)    UNMASK_INTR_1_INTERRUPTS;    UNMASK_INTR_2_INTERRUPTS;    UNMASK_INTR_5_INTERRUPTS;#else    MASK_INTR_1_INTERRUPTS;    MASK_INTR_5_INTERRUPTS;#endif    UNMASK_CBUS1_INTERRUPTS;    UNMASK_CBUS2_INTERRUPTS;	for(idx=0; idx < 4; idx++)	{		WriteByteCBUS((0xE0 + idx), 0xFF);		WriteByteCBUS((0xF0 + idx), 0xFF);	}}

uint8_tControlPort::bitmask() {        uint8_t result = 0xFF;        if (axisY == -1) CLR_BIT(result, 0);    if (axisY ==  1) CLR_BIT(result, 1);    if (axisX == -1) CLR_BIT(result, 2);    if (axisX ==  1) CLR_BIT(result, 3);    if (button)      CLR_BIT(result, 4);        uint8_t mouseBits = c64->mouse.readControlPort(nr);    result &= mouseBits;        return result;}

/////////////////////////////////////////////////////////////////////////////// CbusReset/////////////////////////////////////////////////////////////////////////////void CbusReset (void){uint8_t enable[4]={0xff,0xff,0xff,0xff};// must write 0xFF to clear regardless!	SET_BIT(REG_SRST, 3);	HalTimerWait(2);	CLR_BIT(REG_SRST, 3);	mscCmdInProgress = false;	// Adjust interrupt mask everytime reset is performed.    UNMASK_INTR_1_INTERRUPTS;	UNMASK_INTR_4_INTERRUPTS;    if (g_chipRevId < 1)    {    	if(fwPowerState != POWER_STATE_FIRST_INIT)			UNMASK_INTR_5_INTERRUPTS;	}	else	{		//RG disabled due to auto FIFO reset	    MASK_INTR_5_INTERRUPTS;	}	UNMASK_CBUS1_INTERRUPTS;	UNMASK_CBUS2_INTERRUPTS;		// Enable WRITE_STAT interrupt for writes to all 4 MSC Status registers.    SiiRegWriteBlock(REG_CBUS_WRITE_STAT_ENABLE_0,enable,4);		// Enable SET_INT interrupt for writes to all 4 MSC Interrupt registers.    SiiRegWriteBlock(REG_CBUS_SET_INT_ENABLE_0,enable,4);}

/////////////////////////////////////////////////////////////////////////////////// SiiMhlTxDrvReleaseUpstreamHPDControl//// Release the direct control of Upstream HPD.//void SiiMhlTxDrvReleaseUpstreamHPDControl (void){   	// Un-force HPD (it was kept low, now propagate to source	// let HPD float by clearing reg_hpd_out_ovr_en   	CLR_BIT(REG_INT_CTRL, 4);	TX_DEBUG_PRINT(("Drv: Upstream HPD released./n"));}

void	ForceSwitchToD3( void ){		//HalTimerWait(50);		CLR_BIT(REG_POWER_EN, 0);		CBusQueueReset();		fwPowerState = POWER_STATE_D3;}

/*---------------------------------------------------------------------------     TITLE   : Hw_I2C_IMU_GetErrStatus     WORK    :      ARG     : void     RET     : void---------------------------------------------------------------------------*/u16 Hw_I2C_IMU_GetErrStatus( void ){	u16 Err = 0;	u16 SR;	if( IS_SET_BIT(REG_I2C1_SR1, 11) ) Err = 11;	if( IS_SET_BIT(REG_I2C1_SR1, 10) ) Err = 10;	if( IS_SET_BIT(REG_I2C1_SR1,  9) ) Err =  9;	if( IS_SET_BIT(REG_I2C1_SR1,  8) ) Err =  8;	//-- 
C++ CLR_INT函数代码示例
C++ CLRBIT函数代码示例