自学教程：C++ FSMC_NORSRAMInit函数代码示例

static void lcd_fsmc_nor_mux_config(void){	FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;	FSMC_NORSRAMTimingInitTypeDef  Timing_read,Timing_write;	FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &Timing_read;	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &Timing_write;	FSMC_NORSRAMStructInit(&FSMC_NORSRAMInitStructure);#if 0	/* ssd1289 */	Timing_read.FSMC_AddressSetupTime = 8;             /* 地址建立时间  */	Timing_read.FSMC_AddressHoldTime  = 8;             /* 地址保持时间  */	Timing_read.FSMC_DataSetupTime = 8;                /* 数据建立时间  */	Timing_read.FSMC_AccessMode = FSMC_AccessMode_A;    /* FSMC 访问模式 */	Timing_write.FSMC_AddressSetupTime = 8;             /* 地址建立时间  */	Timing_write.FSMC_AddressHoldTime  = 8;             /* 地址保持时间  */	Timing_write.FSMC_DataSetupTime = 8;                /* 数据建立时间  */	Timing_write.FSMC_AccessMode = FSMC_AccessMode_A;   /* FSMC 访问模式 */#else	/* ili9320 */	Timing_read.FSMC_AddressSetupTime = 3;             /* 地址建立时间  */	Timing_read.FSMC_AddressHoldTime  = 8;             /* 地址保持时间  */	Timing_read.FSMC_DataSetupTime = 4;                /* 数据建立时间  */	Timing_read.FSMC_AccessMode = FSMC_AccessMode_A;    /* FSMC 访问模式 */	Timing_write.FSMC_AddressSetupTime = 2;             /* 地址建立时间  */	Timing_write.FSMC_AddressHoldTime  = 8;             /* 地址保持时间  */	Timing_write.FSMC_DataSetupTime = 3;                /* 数据建立时间  */	Timing_write.FSMC_AccessMode = FSMC_AccessMode_A;   /* FSMC 访问模式 */#endif	/* Color LCD configuration ------------------------------------	LCD configured as follow:	- Data/Address MUX = Disable	- Memory Type = SRAM	- Data Width = 16bit	- Write Operation = Enable	- Extended Mode = Enable	- Asynchronous Wait = Disable */	/* Bank1 4*64MiB 0x60000000 -- 0x6fffffff	 *	ne1 -- 0x60000000 -- 0x63ffffff	 */	FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Enable;	FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;	FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;	FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable;	FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;	FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);}

void LCD_FSMCConf(void){  	FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;  	FSMC_NORSRAMTimingInitTypeDef  p;  	RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);  	p.FSMC_AddressSetupTime = 5;  	p.FSMC_AddressHoldTime = 0;  	p.FSMC_DataSetupTime = 9;  	p.FSMC_BusTurnAroundDuration = 0;  	p.FSMC_CLKDivision = 0;  	p.FSMC_DataLatency = 0;  	p.FSMC_AccessMode = FSMC_AccessMode_A;  	FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;  	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;  	FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;  	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;  	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;  	FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;  	FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;  	FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;  	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;  	FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;  	FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;  	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;  	FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;  	FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;  	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;  	FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);     	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);}

void LCD_FSMC_Config(void){  FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;  FSMC_NORSRAMTimingInitTypeDef  p;     p.FSMC_AddressSetupTime = 0x04;	        //地址建立时间    p.FSMC_AddressHoldTime = 0x04;	        //地址保持时间    p.FSMC_DataSetupTime = 0x04;		//数据建立时间    p.FSMC_BusTurnAroundDuration = 0x00;    p.FSMC_CLKDivision = 0x00;    p.FSMC_DataLatency = 0x00;    p.FSMC_AccessMode = FSMC_AccessMode_B;	 // 一般使用模式B来控制LCD       FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;    FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;    FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;    FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;    FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;    FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;    FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;    FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;    FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;         FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);         /* Enable FSMC Bank1_SRAM Bank */    FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);}

void FSMC_LCD_Init(void){	FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure ;	FSMC_NORSRAMTimingInitTypeDef p ;	/* Configure FSMC Bank1 NOR/PSRAM */	p.FSMC_AddressSetupTime = 0x02 ;	p.FSMC_AddressHoldTime = 0x00 ;	p.FSMC_DataSetupTime = 0x05 ;	p.FSMC_BusTurnAroundDuration = 0x00 ;	p.FSMC_CLKDivision = 0x00 ;	p.FSMC_DataLatency = 0x00 ;	p.FSMC_AccessMode = FSMC_AccessMode_B ;	FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1 ;	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable ;	FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR ;	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b ;	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable ;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low ;	FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable ;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState ;	FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable ;	FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable ;	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable ;	FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable ;	FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p ;	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p ;	FSMC_NORSRAMInit( &FSMC_NORSRAMInitStructure) ;	/* Enable FSMC Bank1_SRAM Bank */	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1 , ENABLE) ;}

static void lcd_fsmc_initialize(void){		FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;	FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStructure;		FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4;	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;	FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;	FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;	FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;	FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;	FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;	//FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); 	/* FSMC Write Timing */	FSMC_NORSRAMTimingInitStructure.FSMC_AddressSetupTime = 15;   /* Address Setup Time */	FSMC_NORSRAMTimingInitStructure.FSMC_AddressHoldTime = 0;	FSMC_NORSRAMTimingInitStructure.FSMC_DataSetupTime = 15;	     /* Data Setup Time */	FSMC_NORSRAMTimingInitStructure.FSMC_BusTurnAroundDuration = 0x00;	FSMC_NORSRAMTimingInitStructure.FSMC_CLKDivision = 0x00;	FSMC_NORSRAMTimingInitStructure.FSMC_DataLatency = 0x00;	FSMC_NORSRAMTimingInitStructure.FSMC_AccessMode = FSMC_AccessMode_A;	/* FSMC Access Mode */	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;		FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);		/* Enable FSMC Bank4_SRAM Bank */	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);}

void SRAM_FSMC_Config(void){  FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;  FSMC_NORSRAMTimingInitTypeDef  p;     p.FSMC_AddressSetupTime = 1;  //这里我尝试改成5 6 也不对。  p.FSMC_AddressHoldTime = 1;  p.FSMC_DataSetupTime = 0;  p.FSMC_BusTurnAroundDuration = 0; //这里我尝试不用扩展模式也不行  p.FSMC_CLKDivision = 0;  p.FSMC_DataLatency = 0;  p.FSMC_AccessMode = FSMC_AccessMode_A;  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);  // 使能BANK3}

/*** FSMC配置函数 ***/static void FSMC_Configuration(void){	FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;	FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStructure;		/*** FSMC Configuration：FSMC_Bank1_NORSRAM1 Configuration ***/	FSMC_NORSRAMTimingInitStructure.FSMC_AddressSetupTime      = 0x02;			//地址建立时间（1 ~ 16个HCLK）	FSMC_NORSRAMTimingInitStructure.FSMC_AddressHoldTime       = 0x00;			//地址保存时间（1 ~ 16个HCLK）	FSMC_NORSRAMTimingInitStructure.FSMC_DataSetupTime         = 0x05;			//数据建立时间（0：保留，1：2个HCLK，0xFF：256个HCLK）	FSMC_NORSRAMTimingInitStructure.FSMC_BusTurnAroundDuration = 0x00;			//总线恢复时间（1 ~ 16个HCLK）	FSMC_NORSRAMTimingInitStructure.FSMC_CLKDivision           = 0x00;			//时钟分频比（定义CLK时钟输出信号的周期，0：保留，1-15表示1个CLK相当于2-16个HCLK）	FSMC_NORSRAMTimingInitStructure.FSMC_DataLatency           = 0x00;			//数据保持时间（2 - 17个周期）	FSMC_NORSRAMTimingInitStructure.FSMC_AccessMode            = FSMC_AccessMode_B;	//模式B（一共有4种模式：A，B，C，D）		/*** Color LCD configuration ***/	FSMC_NORSRAMInitStructure.FSMC_Bank                  = FSMC_Bank1_NORSRAM1;						//Bank1_NORSRAM1	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux        = FSMC_DataAddressMux_Disable;				//地址和数据复用失能	FSMC_NORSRAMInitStructure.FSMC_MemoryType            = FSMC_MemoryType_NOR;						//连接到相应存储块的外部存储器类型	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth       = FSMC_MemoryDataWidth_16b;				//存储器数据总线宽度16bit	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode       = FSMC_BurstAccessMode_Disable;			//使能或关闭同步NOR闪存存储器的突发访问模式设置是否使用迸发访问模式	FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity    = FSMC_WaitSignalPolarity_Low;				//设置WAIT信号的有效电平	FSMC_NORSRAMInitStructure.FSMC_WrapMode              = FSMC_WrapMode_Disable;					//设置是否使用环回模式	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive      = FSMC_WaitSignalActive_BeforeWaitState;	//设置WAIT信号有效时机	FSMC_NORSRAMInitStructure.FSMC_WriteOperation        = FSMC_WriteOperation_Enable;				//设定是否使能写操作	FSMC_NORSRAMInitStructure.FSMC_WaitSignal            = FSMC_WaitSignal_Disable;					//设定是否使用WAIT信号	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode          = FSMC_ExtendedMode_Disable;				//使能或关闭扩展模式，扩展模式用于访问具有不同读写操作时序的存储器，设定是否使用单独的写时序	FSMC_NORSRAMInitStructure.FSMC_WriteBurst            = FSMC_WriteBurst_Disable;					//设定是否使用迸发写模式	FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;		//设定读写时序	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct     = &FSMC_NORSRAMTimingInitStructure;		//设定读写时序	FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);	/*** Enable FSMC Bank1_SRAM Bank ****/	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);}

void Dm9000a_FSMCConfig(){    FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;    FSMC_NORSRAMTimingInitTypeDef p;    // DM9000A使用的地址（BANK1，BANK1有4个片选，DM9000A使用第4条片选）    // 时序设置    p.FSMC_AddressSetupTime = 1;    p.FSMC_AddressHoldTime = 1;    p.FSMC_DataSetupTime = 2;    p.FSMC_BusTurnAroundDuration = 1;    p.FSMC_CLKDivision = 1;    p.FSMC_DataLatency = 1;    p.FSMC_AccessMode = FSMC_AccessMode_A;    // 工作模式    FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4;    FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;    FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;    FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;    FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;    FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;    FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;    FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;    FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);    // 使能DM9000A的FSMC访问    FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);}

void ILI9341::fsmcSetup(){  FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;  FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStructureRead;  FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStructureWrite;  /* Enable FSMC Clock */  RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);  /* Define Read timing parameters */  FSMC_NORSRAMTimingInitStructureRead.FSMC_AddressSetupTime = 1;  FSMC_NORSRAMTimingInitStructureRead.FSMC_AddressHoldTime = 0;  FSMC_NORSRAMTimingInitStructureRead.FSMC_DataSetupTime = 15;  FSMC_NORSRAMTimingInitStructureRead.FSMC_BusTurnAroundDuration = 0;  FSMC_NORSRAMTimingInitStructureRead.FSMC_CLKDivision = 1;  FSMC_NORSRAMTimingInitStructureRead.FSMC_DataLatency = 0;  FSMC_NORSRAMTimingInitStructureRead.FSMC_AccessMode = FSMC_AccessMode_A;  /* Define Write Timing parameters */  FSMC_NORSRAMTimingInitStructureWrite.FSMC_AddressSetupTime = 2; // 2  FSMC_NORSRAMTimingInitStructureWrite.FSMC_AddressHoldTime = 0; // 0  FSMC_NORSRAMTimingInitStructureWrite.FSMC_DataSetupTime = 5; // 5  FSMC_NORSRAMTimingInitStructureWrite.FSMC_BusTurnAroundDuration = 0;  FSMC_NORSRAMTimingInitStructureWrite.FSMC_CLKDivision = 1;  FSMC_NORSRAMTimingInitStructureWrite.FSMC_DataLatency = 0;  FSMC_NORSRAMTimingInitStructureWrite.FSMC_AccessMode = FSMC_AccessMode_A;  /* Define protocol type */  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; //Bank1  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; //No mux  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; //SRAM type  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; //16 bits wide  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode =                  FSMC_BurstAccessMode_Disable; //No Burst  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait =                  FSMC_AsynchronousWait_Disable; // No wait  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity =                  FSMC_WaitSignalPolarity_Low; //Don'tcare  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; //No wrap mode  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive =                  FSMC_WaitSignalActive_BeforeWaitState; //Don't care  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; //Don't care  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable; //Allow distinct Read/Write parameters  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; //Don't care  // Set read timing structure  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct =                  &FSMC_NORSRAMTimingInitStructureRead;  // Set write timing structure  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct =                  &FSMC_NORSRAMTimingInitStructureWrite;  // Initialize FSMC for read and write  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);  // Enable FSMC  FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);}

void LCD_init_hardware() {  GPIO_InitTypeDef GPIO_InitStructure;  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); /* Enable the FSMC Clock */  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC |                   RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE , ENABLE);  /* Enable the FSMC pins for LCD control */  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 |                           GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 |                          GPIO_Pin_15 | GPIO_Pin_7 /*NE1*/ |  GPIO_Pin_11/*RS*/;  GPIO_Init(GPIOD, &GPIO_InitStructure);  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |                          GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |                          GPIO_Pin_15;  GPIO_Init(GPIOE, &GPIO_InitStructure);  FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;  FSMC_NORSRAMTimingInitTypeDef  p;  p.FSMC_AddressSetupTime = 0x02;  p.FSMC_AddressHoldTime = 0x00;  p.FSMC_DataSetupTime = 0x05;  p.FSMC_BusTurnAroundDuration = 0x00;  p.FSMC_CLKDivision = 0x00;  p.FSMC_DataLatency = 0x00;  p.FSMC_AccessMode = FSMC_AccessMode_B;  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);  /* Enable FSMC Bank1_SRAM Bank */  FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);  // Toggle LCD reset pin#ifdef LCD_RESET  jshPinSetState(LCD_RESET, JSHPINSTATE_GPIO_OUT);  jshPinSetValue(LCD_RESET, 0); //RESET=0  LCD_DELAY(DELAY_LONG);  jshPinSetValue(LCD_RESET, 1); //RESET=1#endif}

static void LCD_FSMCConfig(void){    FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;    FSMC_NORSRAMTimingInitTypeDef  Timing_read,Timing_write;    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &Timing_read;    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &Timing_write;    FSMC_NORSRAMStructInit(&FSMC_NORSRAMInitStructure);    /*--------------------- read timings configuration ---------------------*/    Timing_read.FSMC_AddressSetupTime = 3;  /* [3:0] F2/F4 1~15 HCLK */    Timing_read.FSMC_AddressHoldTime = 0;   /* [7:4] keep 0x00 in SRAM mode */    Timing_read.FSMC_DataSetupTime = 4;     /* [15:8] F2/F4 0~255 HCLK */    /* [19:16] Time between NEx high to NEx low (BUSTURN HCLK) */    Timing_read.FSMC_BusTurnAroundDuration = 1;    Timing_read.FSMC_CLKDivision = 0; /* [24:20] keep 0x00 in SRAM mode  */    Timing_read.FSMC_DataLatency = 0; /* [27:25] keep 0x00 in SRAM mode  */    Timing_read.FSMC_AccessMode = FSMC_AccessMode_A;    /*--------------------- write timings configuration ---------------------*/    Timing_write.FSMC_AddressSetupTime = 2;  /* [3:0] F2/F4 1~15 HCLK */    Timing_write.FSMC_AddressHoldTime = 0;   /* [7:4] keep 0x00 in SRAM mode */    Timing_write.FSMC_DataSetupTime = 3;     /* [15:8] F2/F4 0~255 HCLK */    /* [19:16] Time between NEx high to NEx low (BUSTURN HCLK) */    Timing_write.FSMC_BusTurnAroundDuration = 1;    Timing_write.FSMC_CLKDivision = 0; /* [24:20] keep 0x00 in SRAM mode  */    Timing_write.FSMC_DataLatency = 0; /* [27:25] keep 0x00 in SRAM mode  */    Timing_write.FSMC_AccessMode = FSMC_AccessMode_A;    /* Color LCD configuration ------------------------------------       LCD configured as follow:          - Data/Address MUX = Disable          - Memory Type = SRAM          - Data Width = 16bit          - Write Operation = Enable          - Extended Mode = Enable          - Asynchronous Wait = Disable */    FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4;    FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;    FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;    FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;    FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;    FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;    FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;    FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable;    FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;    FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);    FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);}

/***********************************************************************************************************	函 数 名: AD7606_FSMCConfig*	功能说明: 配置FSMC并口访问时序*	形    参:  无*	返 回 值: 无**********************************************************************************************************/static void AD7606_FSMCConfig(void){	FSMC_NORSRAMInitTypeDef  init;	FSMC_NORSRAMTimingInitTypeDef  timing;	/*		AD7606规格书要求(3.3V时)：RD读信号低电平脉冲宽度最短21ns，高电平脉冲最短宽度15ns。		按照如下配置 读数均正常。为了和同BANK的LCD配置相同，选择3-0-6-1-0-0		3-0-5-1-0-0  : RD高持续75ns， 低电平持续50ns.  1us以内可读取8路样本数据到内存。		1-0-1-1-0-0  : RD高75ns，低电平执行12ns左右，下降沿差不多也12ns.  数据读取正确。	*/	/* FSMC_Bank1_NORSRAM4 configuration */	timing.FSMC_AddressSetupTime = 3;	timing.FSMC_AddressHoldTime = 0;	timing.FSMC_DataSetupTime = 6;	timing.FSMC_BusTurnAroundDuration = 1;	timing.FSMC_CLKDivision = 0;	timing.FSMC_DataLatency = 0;	timing.FSMC_AccessMode = FSMC_AccessMode_A;	/*	 LCD configured as follow:	    - Data/Address MUX = Disable	    - Memory Type = SRAM	    - Data Width = 16bit	    - Write Operation = Enable	    - Extended Mode = Enable	    - Asynchronous Wait = Disable	*/	init.FSMC_Bank = FSMC_Bank1_NORSRAM4;	init.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;	init.FSMC_MemoryType = FSMC_MemoryType_SRAM;	init.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;	init.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;	init.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;	init.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;	init.FSMC_WrapMode = FSMC_WrapMode_Disable;	init.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;	init.FSMC_WriteOperation = FSMC_WriteOperation_Enable;	init.FSMC_WaitSignal = FSMC_WaitSignal_Disable;	init.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;	init.FSMC_WriteBurst = FSMC_WriteBurst_Disable;	init.FSMC_ReadWriteTimingStruct = &timing;	init.FSMC_WriteTimingStruct = &timing;	FSMC_NORSRAMInit(&init);	/* - BANK 1 (of NOR/SRAM Bank 1~4) is enabled */	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);}

static void fsmc_for_sram_configration(void){	FSMC_NORSRAMInitTypeDef  	FSMC_NORSRAMInitStructure;	FSMC_NORSRAMTimingInitTypeDef  	timing;	FSMC_NORSRAMDeInit(FSMC_Bank1_NORSRAM1);	/*	 * ---- 初期调试用参数	 * p.FSMC_AddressSetupTime = 15;	 * p.FSMC_AddressHoldTime = 15;	 * p.FSMC_DataSetupTime = 15;	 * p.FSMC_BusTurnAroundDuration = 15;	 * p.FSMC_CLKDivision = 8;	 * p.FSMC_DataLatency = 15;	 */	timing.FSMC_AddressSetupTime 	  = 0x01; /* It is not used with synchronous NOR Flash memories. */	timing.FSMC_AddressHoldTime 	  = 0x01; /* It is not used with synchronous NOR Flash memories.*/	timing.FSMC_DataSetupTime 	  = 0x01; /* It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories. */	timing.FSMC_BusTurnAroundDuration = 0x00; /* It is only used for multiplexed NOR Flash memories. */	timing.FSMC_CLKDivision		  = 0x00; /* It is not used for asynchronous NOR Flash, SRAM or ROM accesses. */	timing.FSMC_DataLatency		  = 0x00; /* It must be set to 0 in case of a CRAM */	timing.FSMC_AccessMode		  = FSMC_AccessMode_B;	FSMC_NORSRAMInitStructure.FSMC_Bank 		  = FSMC_Bank1_NORSRAM1;#if RT_EXT_SRAM_MULTIPLEXED	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux 	  = FSMC_DataAddressMux_Enable;#else	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux 	  = FSMC_DataAddressMux_Disable;#endif	FSMC_NORSRAMInitStructure.FSMC_MemoryType 	  = FSMC_MemoryType_PSRAM;	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth 	  = FSMC_MemoryDataWidth_16b;	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode 	  = FSMC_BurstAccessMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait   = FSMC_AsynchronousWait_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;	FSMC_NORSRAMInitStructure.FSMC_WrapMode 	  = FSMC_WrapMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive   = FSMC_WaitSignalActive_BeforeWaitState;	FSMC_NORSRAMInitStructure.FSMC_WriteOperation 	  = FSMC_WriteOperation_Enable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignal 	  = FSMC_WaitSignal_Disable;	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode 	  = FSMC_ExtendedMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WriteBurst 	  = FSMC_WriteBurst_Disable;	FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct	= &timing;	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct	= &timing;	/* FSMC_NORSRAMStructInit(&FSMC_NORSRAMInitStructure); */	FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);	/* Enable FSMC Bank1_SRAM Bank */	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);}

//*----------------------------------------------------------------------------//* Function Name       : UiLcdHy28_FSMCConfig//* Object              ://* Input Parameters    ://* Output Parameters   ://* Functions called    ://*----------------------------------------------------------------------------void UiLcdHy28_FSMCConfig(void){	FSMC_NORSRAMInitTypeDef  		FSMC_NORSRAMInitStructure;	FSMC_NORSRAMTimingInitTypeDef  	p;	// Enable FSMC clock	RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);	//-- FSMC Configuration ------------------------------------------------------	//----------------------- SRAM Bank 3 ----------------------------------------	// FSMC_Bank1_NORSRAM4 configuration	p.FSMC_AddressSetupTime 		= 3;	p.FSMC_AddressHoldTime 			= 0;	p.FSMC_DataSetupTime 			= 9;	p.FSMC_BusTurnAroundDuration 	= 0;	p.FSMC_CLKDivision 				= 0;	p.FSMC_DataLatency 				= 0;	p.FSMC_AccessMode 				= FSMC_AccessMode_A;	// Color LCD configuration ------------------------------------	//   LCD configured as follow:	//     - Data/Address MUX = Disable	//     - Memory Type = SRAM	//     - Data Width = 16bit	//     - Write Operation = Enable	//     - Extended Mode = Enable	//     - Asynchronous Wait = Disable	FSMC_NORSRAMInitStructure.FSMC_Bank 					= FSMC_Bank1_NORSRAM1;	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux 			= FSMC_DataAddressMux_Disable;	FSMC_NORSRAMInitStructure.FSMC_MemoryType 				= FSMC_MemoryType_SRAM;	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth 			= FSMC_MemoryDataWidth_16b;	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode 			= FSMC_BurstAccessMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait 		= FSMC_AsynchronousWait_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity 		= FSMC_WaitSignalPolarity_Low;	FSMC_NORSRAMInitStructure.FSMC_WrapMode 				= FSMC_WrapMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive 		= FSMC_WaitSignalActive_BeforeWaitState;	FSMC_NORSRAMInitStructure.FSMC_WriteOperation 			= FSMC_WriteOperation_Enable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignal 				= FSMC_WaitSignal_Disable;	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode 			= FSMC_ExtendedMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WriteBurst 				= FSMC_WriteBurst_Disable;	FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct 	= &p;	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct 		= &p;	FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);}

/**  * @brief  Configures the Parallel interface (FSMC) for LCD(Parallel mode)  * @param  None  * @retval None  */static void FSMC_Configuration(void){    FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;    FSMC_NORSRAMTimingInitTypeDef  p;    /* Enable FSMC clock */    RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);    /* FSMC_Bank1_NORSRAM1 configuration */    p.FSMC_AddressSetupTime = 3;    p.FSMC_AddressHoldTime = 0;    p.FSMC_DataSetupTime = 4;    p.FSMC_BusTurnAroundDuration = 0;    p.FSMC_CLKDivision = 0;    p.FSMC_DataLatency = 0;    p.FSMC_AccessMode = FSMC_AccessMode_B;    /* Color LCD configuration ------------------------------------       LCD configured as follow:          - Data/Address MUX = Disable          - Memory Type = SRAM          - Data Width = 16bit          - Write Operation = Enable          - Extended Mode = Enable          - Asynchronous Wait = Disable */    FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;    FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;    FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;    FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;    FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;    FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;    FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;    FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;    FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);    /* Enable FSMC NOR/SRAM Bank1 */    FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);}

/******************************************************************************** Function Name  : LCD_FSMCConfig* Description    : Configures the Parallel interface (FSMC) for LCD(Parallel mode)* Input          : None* Output         : None* Return         : None*******************************************************************************/void LCD_FSMCConfig(void){#ifndef NO_LCD    FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;   FSMC_NORSRAMTimingInitTypeDef  p;/*-- FSMC Configuration ------------------------------------------------------*//*----------------------- SRAM Bank 4 ----------------------------------------*/  /* FSMC_Bank1_NORSRAM4 configuration */  p.FSMC_AddressSetupTime = 1;  p.FSMC_AddressHoldTime = 1;  p.FSMC_DataSetupTime = 20;  p.FSMC_BusTurnAroundDuration = 0;  p.FSMC_CLKDivision = 0;  p.FSMC_DataLatency = 1;  p.FSMC_AccessMode = FSMC_AccessMode_A;  /* LCD configuration ------------------------------------     LCD configured as follow:        - Data/Address MUX = Disable        - Memory Type = SRAM        - Data Width = 8bit        - Write Operation = Enable        - Extended Mode = Disable        - Asynchronous Wait = Disable */  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4;  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);    /* BANK 4 (of NOR/SRAM Bank 1~4) is enabled */  FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);#endif}

/***********************************************************************************************************	函 数 名: ch374_CfgFSMC*	功能说明: 初始化CPU的FSMC。*	形    参：无*	返 回 值: 无**********************************************************************************************************/static void ch374_CfgFSMC(void){	FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;	FSMC_NORSRAMTimingInitTypeDef  FSMC_NORSRAMTimingInitStructure;		/*----------------------- SRAM Bank 4 ----------------------------------------*/	/* 配置FSMC_Bank1_NORSRAM4时序延迟 */	FSMC_NORSRAMTimingInitStructure.FSMC_AddressSetupTime = 1;	FSMC_NORSRAMTimingInitStructure.FSMC_AddressHoldTime = 0;	FSMC_NORSRAMTimingInitStructure.FSMC_DataSetupTime = 2;	FSMC_NORSRAMTimingInitStructure.FSMC_BusTurnAroundDuration = 0;	FSMC_NORSRAMTimingInitStructure.FSMC_CLKDivision = 0;	FSMC_NORSRAMTimingInitStructure.FSMC_DataLatency = 0;	FSMC_NORSRAMTimingInitStructure.FSMC_AccessMode = FSMC_AccessMode_B;		/* 		CH374总线配置如下:	    - Data/Address MUX = Disable	    - Memory Type = SRAM	    - Data Width = 16bit	    - Write Operation = Enable	    - Extended Mode = Enable	    - Asynchronous Wait = Disable 	*/	FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4;	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;	FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; 		FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;	FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;	FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;	FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;		FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);		/* - BANK 4 (of NOR/SRAM Bank 0~3) is enabled */	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);}

/********************************************************//函数名称：Lcd_FMSC_Config//功能描述：对FMSC进行初始化//输入参数：无//返回：	无//说明：	配置好FMSC的时序以及其使用模式********************************************************/void Lcd_FMSC_Config(void){	FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;  	FSMC_NORSRAMTimingInitTypeDef  FSMC_NORSRAMTimingInitStructure;	/***********Color LCD configuration***************************************     LCD configured as follow:        - Data/Address MUX = Disable        - Memory Type = SRAM        - Data Width = 16bit        - Write Operation = Enable        - Extended Mode = Enable        - Asynchronous Wait = Disable 	*************************************************************************/		FSMC_NORSRAMTimingInitStructure.FSMC_AddressSetupTime = 2;	FSMC_NORSRAMTimingInitStructure.FSMC_AddressHoldTime = 0;	FSMC_NORSRAMTimingInitStructure.FSMC_DataSetupTime = 0X03;	FSMC_NORSRAMTimingInitStructure.FSMC_BusTurnAroundDuration = 0;	FSMC_NORSRAMTimingInitStructure.FSMC_CLKDivision = 0;	FSMC_NORSRAMTimingInitStructure.FSMC_DataLatency = 0;	FSMC_NORSRAMTimingInitStructure.FSMC_AccessMode = FSMC_AccessMode_B;  	/*******FSMC Configuration********************************************/  	/*******SRAM Bank 4***************************************************/  	/*******FSMC_Bank1_NORSRAM4 configuration*****************************/	FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; //BANK1 的 NE4	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; //关掉地址复用	FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;//FSMC_MemoryType_SRAM; //GRAM 当成MCU的SRAM处理	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; //16位总线	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; //突发模式访问，不是PSRAM所以Disable	FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;	FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;	FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; //写使能	FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;		FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;	FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);   	/* - BANK  (of NOR/SRAM Bank 0~3) is enabled */  	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);}

void initFSMC() {    // FSMC and TFTLCD    fsmcData        =(uint16_t*)  0x60020000; // sets a16    fsmcRegister    =(uint16_t*)  0x60000000; // clears a16            FSMC_NORSRAMTimingInitTypeDef timing;//={0};    FSMC_NORSRAMInitTypeDef init;//={0};    RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC,ENABLE);    timing.FSMC_AddressSetupTime=2; // want 2 :     timing.FSMC_DataSetupTime=5;  // keep    timing.FSMC_AccessMode=FSMC_AccessMode_B/*FSMC_AccessMode_A*/; // B? This is how he does it in ili9325    timing.FSMC_CLKDivision=1; //  ?    timing.FSMC_DataLatency=0;    timing.FSMC_BusTurnAroundDuration=0;    timing.FSMC_AddressHoldTime=0;// itiming.nitialise how the FSMC will work and then enable it    init.FSMC_Bank=FSMC_Bank1_NORSRAM1; // keep    init.FSMC_DataAddressMux=FSMC_DataAddressMux_Disable; // keep    init.FSMC_MemoryType=FSMC_MemoryType_SRAM; // keep    init.FSMC_MemoryDataWidth=FSMC_MemoryDataWidth_16b; // make 8 bit?    init.FSMC_BurstAccessMode=FSMC_BurstAccessMode_Disable; // keep    init.FSMC_WaitSignalPolarity=FSMC_WaitSignalPolarity_Low;  // keep     init.FSMC_WrapMode=FSMC_WrapMode_Disable;  // keep     init.FSMC_WaitSignalActive=FSMC_WaitSignalActive_BeforeWaitState; // keep    init.FSMC_WriteOperation=FSMC_WriteOperation_Enable; // keep    init.FSMC_WaitSignal=FSMC_WaitSignal_Disable; // keep    init.FSMC_ExtendedMode=FSMC_ExtendedMode_Disable; // keep    init.FSMC_WriteBurst=FSMC_WriteBurst_Disable; // keep     init.FSMC_ReadWriteTimingStruct=&timing;    init.FSMC_WriteTimingStruct=&timing;    init.FSMC_AsynchronousWait=FSMC_AsynchronousWait_Disable; // keep    FSMC_NORSRAMInit(&init);    FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1,ENABLE);}

static void FSMC_LCD_Init(uint8_t AddressSetupTime,uint8_t DataSetupTime) {  FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;  FSMC_NORSRAMTimingInitTypeDef  FSMC_NORSRAMTimingInitStructure;  /* Enable the FSMC Clock */  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);  FSMC_NORSRAMTimingInitStructure.FSMC_AddressSetupTime = AddressSetupTime;  FSMC_NORSRAMTimingInitStructure.FSMC_AddressHoldTime = 0x00;  FSMC_NORSRAMTimingInitStructure.FSMC_DataSetupTime = DataSetupTime;  FSMC_NORSRAMTimingInitStructure.FSMC_BusTurnAroundDuration = 0x00;  FSMC_NORSRAMTimingInitStructure.FSMC_CLKDivision = 0x00;  FSMC_NORSRAMTimingInitStructure.FSMC_DataLatency = 0x00;  FSMC_NORSRAMTimingInitStructure.FSMC_AccessMode = FSMC_AccessMode_B;  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;  //FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Enable;  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;  //FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Enable;  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);  /* Enable FSMC Bank1_SRAM Bank */  FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);}

static void FSMC_Conf(void){	FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;	FSMC_NORSRAMTimingInitTypeDef  p;	/*-- FSMC Configuration ------------------------------------------------------*/	p.FSMC_AddressSetupTime 		= 2;	p.FSMC_AddressHoldTime 			= 2;	p.FSMC_DataSetupTime 			= 2;	p.FSMC_BusTurnAroundDuration 	= 5;	p.FSMC_CLKDivision 				= 5;	p.FSMC_DataLatency 				= 5;	p.FSMC_AccessMode 				= FSMC_AccessMode_A;	FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;	FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;        /* MUST be 16b*/	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait= FSMC_AsynchronousWait_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;  /* cf RM p363 + p384*/	FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;	FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;	FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;	FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;	FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;	FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); 	/* Enable FSMC Bank1_SRAM Bank */	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);}

void G8_PSRAM_Init(void){  FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;  FSMC_NORSRAMTimingInitTypeDef  p;  GPIO_InitTypeDef GPIO_InitStructure;   RCC_ClocksTypeDef RCC_Clocks;    /* Enable GPIOs clock */  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF |                         RCC_AHB1Periph_GPIOG, ENABLE);  /* Enable FSMC clock */  RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);         RCC_AHB3PeriphResetCmd(RCC_AHB3Periph_FSMC, ENABLE);    RCC_AHB3PeriphResetCmd(RCC_AHB3Periph_FSMC, DISABLE);        RCC_GetClocksFreq(&RCC_Clocks);  /*-- GPIOs Configuration -----------------------------------------------------*//* +-------------------+--------------------+------------------+------------------+ | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0 <-> FSMC_A0  | PG0 <-> FSMC_A10 | | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1 <-> FSMC_A1  | PG1 <-> FSMC_A11 | | PD4  <-> FSMC_NOE | PE2  <-> FSMC_A23  | PF2 <-> FSMC_A2  | PG2 <-> FSMC_A12 | | PD5  <-> FSMC_NWE | PE3  <-> FSMC_A19  | PF3 <-> FSMC_A3  | PG3 <-> FSMC_A13 | | PD8  <-> FSMC_D13 | PE4  <-> FSMC_A20  | PF4 <-> FSMC_A4  | PG4 <-> FSMC_A14 | | PD9  <-> FSMC_D14 | PE5  <-> FSMC_A21  | PF5 <-> FSMC_A5  | PG5 <-> FSMC_A15 | | PD10 <-> FSMC_D15 | PE6  <-> FSMC_A22  | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | | PD11 <-> FSMC_A16 | PE7  <-> FSMC_D4   | PF13 <-> FSMC_A7 |------------------+ | PD12 <-> FSMC_A17 | PE8  <-> FSMC_D5   | PF14 <-> FSMC_A8 | | PD13 <-> FSMC_A18 | PE9  <-> FSMC_D6   | PF15 <-> FSMC_A9 | | PD14 <-> FSMC_D0  | PE10 <-> FSMC_D7   |------------------+ | PD15 <-> FSMC_D1  | PE11 <-> FSMC_D8   | +-------------------| PE12 <-> FSMC_D9   |                     | PE13 <-> FSMC_D10  |                     | PE14 <-> FSMC_D11  |                     | PE15 <-> FSMC_D12  |                     +--------------------+*/  /* GPIOD configuration */  GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_4  | GPIO_Pin_5  |                                 GPIO_Pin_8  | GPIO_Pin_9  | GPIO_Pin_10 | GPIO_Pin_11 |                                GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;  GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_NOPULL;  GPIO_Init(GPIOD, &GPIO_InitStructure);  /* GPIOE configuration */  GPIO_PinAFConfig(GPIOE, GPIO_PinSource0 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource1 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource2 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource3 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource4 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource5 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource6 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC);  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_2  | GPIO_Pin_3 |                                  GPIO_Pin_4  | GPIO_Pin_5  | GPIO_Pin_6  | GPIO_Pin_7 |                                GPIO_Pin_8  | GPIO_Pin_9  | GPIO_Pin_10 | GPIO_Pin_11|                                GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;  GPIO_Init(GPIOE, &GPIO_InitStructure);  /* GPIOF configuration */  GPIO_PinAFConfig(GPIOF, GPIO_PinSource0 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource1 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource2 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource3 , GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource4 , GPIO_AF_FSMC);//.........这里部分代码省略.........

/* This function configures 2 MiB SRAM memory mounted on STM3220G-EVAL   board. It configures GPIOs and FSMC and to interface with the   memory. It must be called before any operation on the SRAM. */void SRAMconfigure() {  FSMC_NORSRAMInitTypeDef       FSMC_NORSRAMInitStruct;  FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStruct;  GPIO_InitTypeDef              GPIO_InitStruct;  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE |                         RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_GPIOG,                         ENABLE);  RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);  /* GPIOs configuration  +-------------------+--------------------+------------------+------------------+  +                       SRAM pins assignment                                   +  +-------------------+--------------------+------------------+------------------+  | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 |  | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 |  | PD4  <-> FSMC_NOE | PE3  <-> FSMC_A19  | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 |  | PD5  <-> FSMC_NWE | PE4  <-> FSMC_A20  | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 |  | PD8  <-> FSMC_D13 | PE7  <-> FSMC_D4   | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 |  | PD9  <-> FSMC_D14 | PE8  <-> FSMC_D5   | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 |  | PD10 <-> FSMC_D15 | PE9  <-> FSMC_D6   | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |  | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7   | PF13 <-> FSMC_A7 |------------------+  | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8   | PF14 <-> FSMC_A8 |  | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9   | PF15 <-> FSMC_A9 |  | PD14 <-> FSMC_D0  | PE13 <-> FSMC_D10  |------------------+  | PD15 <-> FSMC_D1  | PE14 <-> FSMC_D11  |  +-------------------| PE15 <-> FSMC_D12  |                      +--------------------+  */  GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_AF;  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_100MHz;  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;  GPIO_InitStruct.GPIO_PuPd  = GPIO_PuPd_NOPULL;  GPIO_PinAFConfig(GPIOD, GPIO_PinSource0,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource1,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource4,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource5,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource8,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource9,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_4  |                             GPIO_Pin_5  | GPIO_Pin_8  | GPIO_Pin_9  |                             GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 |                             GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;  GPIO_Init(GPIOD, &GPIO_InitStruct);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource0,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource1,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource3,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource4,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource7,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource8,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource9,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource10, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource11, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource12, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource13, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource14, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE, GPIO_PinSource15, GPIO_AF_FSMC);  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_3  |                             GPIO_Pin_4  | GPIO_Pin_7  | GPIO_Pin_8  |                             GPIO_Pin_9  | GPIO_Pin_10 | GPIO_Pin_11 |                             GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |                             GPIO_Pin_15;  GPIO_Init(GPIOE, &GPIO_InitStruct);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource0,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource1,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource2,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource3,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource4,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource5,  GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource12, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource13, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource14, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOF, GPIO_PinSource15, GPIO_AF_FSMC);  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_2  |                             GPIO_Pin_3  | GPIO_Pin_4  | GPIO_Pin_5  |                             GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |                             GPIO_Pin_15;  GPIO_Init(GPIOF, &GPIO_InitStruct);  GPIO_PinAFConfig(GPIOG, GPIO_PinSource0, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOG, GPIO_PinSource1, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOG, GPIO_PinSource2, GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOG, GPIO_PinSource3, GPIO_AF_FSMC);//.........这里部分代码省略.........

void sram_init(void){		GPIO_InitTypeDef  GPIO_InitStructure;	FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;  FSMC_NORSRAMTimingInitTypeDef  readWriteTiming; 		///////////////////////////////////////////////////////////////////////	////                        SRAM GPIO配置                          ////	///////////////////////////////////////////////////////////////////////		RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE 	| RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_GPIOG, ENABLE);//使能PD,PE,PF,PG时钟	GPIO_InitStructure.GPIO_Pin = (3<<0)|(3<<4)|(0XFF<<8);//PD0,1,4,5,8~15 AF OUT  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;//复用输出  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;//推挽输出  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;//100MHz  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;//上拉  GPIO_Init(GPIOD, &GPIO_InitStructure);//初始化  	  GPIO_InitStructure.GPIO_Pin = (3<<0)|(0X1FF<<7);//PE0,1,7~15,AF OUT  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;//复用输出  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;//推挽输出  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;//100MHz  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;//上拉  GPIO_Init(GPIOE, &GPIO_InitStructure);//初始化  	 	GPIO_InitStructure.GPIO_Pin = (0X3F<<0)|(0XF<<12); 	//PF0~5,12~15  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;//复用输出  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;//推挽输出  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;//100MHz  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;//上拉  GPIO_Init(GPIOF, &GPIO_InitStructure);//初始化  	GPIO_InitStructure.GPIO_Pin =(0X3F<<0)| GPIO_Pin_10;//PG0~5,10  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;//复用输出  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;//推挽输出  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;//100MHz  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;//上拉  GPIO_Init(GPIOG, &GPIO_InitStructure);//初始化     GPIO_PinAFConfig(GPIOD,GPIO_PinSource0,GPIO_AF_FSMC);//PD0,AF12  GPIO_PinAFConfig(GPIOD,GPIO_PinSource1,GPIO_AF_FSMC);//PD1,AF12  GPIO_PinAFConfig(GPIOD,GPIO_PinSource4,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD,GPIO_PinSource5,GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD,GPIO_PinSource8,GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD,GPIO_PinSource9,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD,GPIO_PinSource10,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD,GPIO_PinSource11,GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD,GPIO_PinSource12,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD,GPIO_PinSource13,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD,GPIO_PinSource14,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOD,GPIO_PinSource15,GPIO_AF_FSMC);//PD15,AF12   GPIO_PinAFConfig(GPIOE,GPIO_PinSource0,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE,GPIO_PinSource1,GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOE,GPIO_PinSource7,GPIO_AF_FSMC);//PE7,AF12  GPIO_PinAFConfig(GPIOE,GPIO_PinSource8,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE,GPIO_PinSource9,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE,GPIO_PinSource10,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE,GPIO_PinSource11,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE,GPIO_PinSource12,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE,GPIO_PinSource13,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE,GPIO_PinSource14,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOE,GPIO_PinSource15,GPIO_AF_FSMC);//PE15,AF12   GPIO_PinAFConfig(GPIOF,GPIO_PinSource0,GPIO_AF_FSMC);//PF0,AF12  GPIO_PinAFConfig(GPIOF,GPIO_PinSource1,GPIO_AF_FSMC);//PF1,AF12  GPIO_PinAFConfig(GPIOF,GPIO_PinSource2,GPIO_AF_FSMC);//PF2,AF12  GPIO_PinAFConfig(GPIOF,GPIO_PinSource3,GPIO_AF_FSMC);//PF3,AF12  GPIO_PinAFConfig(GPIOF,GPIO_PinSource4,GPIO_AF_FSMC);//PF4,AF12  GPIO_PinAFConfig(GPIOF,GPIO_PinSource5,GPIO_AF_FSMC);//PF5,AF12  GPIO_PinAFConfig(GPIOF,GPIO_PinSource12,GPIO_AF_FSMC);//PF12,AF12  GPIO_PinAFConfig(GPIOF,GPIO_PinSource13,GPIO_AF_FSMC);//PF13,AF12  GPIO_PinAFConfig(GPIOF,GPIO_PinSource14,GPIO_AF_FSMC);//PF14,AF12  GPIO_PinAFConfig(GPIOF,GPIO_PinSource15,GPIO_AF_FSMC);//PF15,AF12	  GPIO_PinAFConfig(GPIOG,GPIO_PinSource0,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOG,GPIO_PinSource1,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOG,GPIO_PinSource2,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOG,GPIO_PinSource3,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOG,GPIO_PinSource4,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOG,GPIO_PinSource5,GPIO_AF_FSMC);  GPIO_PinAFConfig(GPIOG,GPIO_PinSource10,GPIO_AF_FSMC);		///////////////////////////////////////////////////////////////////////	////                           FSMC配置                            ////	///////////////////////////////////////////////////////////////////////	 	RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC,ENABLE);//使能FSMC时钟  	 	readWriteTiming.FSMC_AddressSetupTime = 0x01;	 //地址建立时间（ADDSET）为1个HCLK 1/168M=6ns  readWriteTiming.FSMC_AddressHoldTime = 0x00;	 //地址保持时间（ADDHLD）模式A未用到	  readWriteTiming.FSMC_DataSetupTime = 0x02;		 ////数据保持时间（DATAST）为2个HCLK 2*6=12ns	 	   readWriteTiming.FSMC_BusTurnAroundDuration = 0x00;  readWriteTiming.FSMC_CLKDivision = 0x00;  readWriteTiming.FSMC_DataLatency = 0x00;  readWriteTiming.FSMC_AccessMode = FSMC_AccessMode_A;	 //模式A 	//.........这里部分代码省略.........

/**  * @brief  Configures the FSMC and GPIOs to interface with the SRAM memory.  *         This function must be called before any write/read operation  *         on the SRAM.  * @param  None   * @retval None  */void SRAM_Init(void){  FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;  FSMC_NORSRAMTimingInitTypeDef  p;  GPIO_InitTypeDef GPIO_InitStructure;     RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |                         RCC_APB2Periph_GPIOF, ENABLE);  /*-- GPIO Configuration ------------------------------------------------------*/  /*!< SRAM Data lines configuration */  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |                                GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;  GPIO_Init(GPIOD, &GPIO_InitStructure);     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |                                GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |                                 GPIO_Pin_15;  GPIO_Init(GPIOE, &GPIO_InitStructure);    /*!< SRAM Address lines configuration */  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |                                 GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |                                 GPIO_Pin_14 | GPIO_Pin_15;  GPIO_Init(GPIOF, &GPIO_InitStructure);    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |                                 GPIO_Pin_4 | GPIO_Pin_5;  GPIO_Init(GPIOG, &GPIO_InitStructure);    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;   GPIO_Init(GPIOD, &GPIO_InitStructure);     /*!< NOE and NWE configuration */    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5;  GPIO_Init(GPIOD, &GPIO_InitStructure);    /*!< NE3 configuration */  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;   GPIO_Init(GPIOG, &GPIO_InitStructure);    /*!< NBL0, NBL1 configuration */  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;   GPIO_Init(GPIOE, &GPIO_InitStructure);   /*-- FSMC Configuration ------------------------------------------------------*/  p.FSMC_AddressSetupTime = 0;  p.FSMC_AddressHoldTime = 0;  p.FSMC_DataSetupTime = 3;  p.FSMC_BusTurnAroundDuration = 0;  p.FSMC_CLKDivision = 0;  p.FSMC_DataLatency = 0;  p.FSMC_AccessMode = FSMC_AccessMode_A;  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);   /*!< Enable FSMC Bank1_SRAM Bank */  FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);  }

void EXT_SRAM_Configuration(void){    FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;    FSMC_NORSRAMTimingInitTypeDef  p;    /* FSMC GPIO configure */    {        GPIO_InitTypeDef GPIO_InitStructure;        RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF                               | RCC_APB2Periph_GPIOG, ENABLE);        RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);        GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_AF_PP;        GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;        /*        FSMC_D0 ~ FSMC_D3        PD14 FSMC_D0   PD15 FSMC_D1   PD0  FSMC_D2   PD1  FSMC_D3        */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_14 | GPIO_Pin_15;        GPIO_Init(GPIOD,&GPIO_InitStructure);        /*        FSMC_D4 ~ FSMC_D12        PE7 ~ PE15  FSMC_D4 ~ FSMC_D12        */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10                                      | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;        GPIO_Init(GPIOE,&GPIO_InitStructure);        /* FSMC_D13 ~ FSMC_D15   PD8 ~ PD10 */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;        GPIO_Init(GPIOD,&GPIO_InitStructure);        /*        FSMC_A0 ~ FSMC_A5   FSMC_A6 ~ FSMC_A9        PF0     ~ PF5       PF12    ~ PF15        */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3                                      | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;        GPIO_Init(GPIOF,&GPIO_InitStructure);        /* FSMC_A10 ~ FSMC_A15  PG0 ~ PG5 */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;        GPIO_Init(GPIOG,&GPIO_InitStructure);        /* FSMC_A16 ~ FSMC_A18  PD11 ~ PD13 */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;        GPIO_Init(GPIOD,&GPIO_InitStructure);        /* RD-PD4 WR-PD5 */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;        GPIO_Init(GPIOD,&GPIO_InitStructure);        /* NBL0-PE0 NBL1-PE1 */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;        GPIO_Init(GPIOE,&GPIO_InitStructure);        /* NE1/NCE2 */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;        GPIO_Init(GPIOD,&GPIO_InitStructure);        /* NE2 */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;        GPIO_Init(GPIOG,&GPIO_InitStructure);        /* NE3 */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;        GPIO_Init(GPIOG,&GPIO_InitStructure);        /* NE4 */        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;        GPIO_Init(GPIOG,&GPIO_InitStructure);    }    /* FSMC GPIO configure */    /*-- FSMC Configuration ------------------------------------------------------*/    p.FSMC_AddressSetupTime = 0;    p.FSMC_AddressHoldTime = 0;    p.FSMC_DataSetupTime = 2;    p.FSMC_BusTurnAroundDuration = 0;    p.FSMC_CLKDivision = 0;    p.FSMC_DataLatency = 0;    p.FSMC_AccessMode = FSMC_AccessMode_A;    FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;    FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;    FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;    FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;    FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;    FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;    FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;    FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;    FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;    FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;    FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);//.........这里部分代码省略.........

/***********************************************************************************************************	函 数 名: bsp_InitNorFlash*	功能说明: 配置连接外部NOR Flash的GPIO和FSMC*	形    参: 无*	返 回 值: 无**********************************************************************************************************/void bsp_InitNorFlash(void){	FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;	FSMC_NORSRAMTimingInitTypeDef  p;	GPIO_InitTypeDef GPIO_InitStructure;	uint32_t ChipID;			Mem_Set(&GPIO_InitStructure, 0x00, sizeof(GPIO_InitTypeDef));	Mem_Set(&FSMC_NORSRAMInitStructure, 0x00, sizeof(FSMC_NORSRAMInitTypeDef));	Mem_Set(&p, 0x00, sizeof(FSMC_NORSRAMTimingInitTypeDef));			/* 使能GPIO时钟 */	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF |	                       RCC_AHB1Periph_GPIOG, ENABLE);	/* 使能 FSMC 时钟 */	RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);	/* NOR Flash 的 GPIO ：		PD0/FSMC_D2		PD1/FSMC_D3		PD4/FSMC_NOE		PD5/FSMC_NWE		PD6/FSMC_NWAIT		- 忙信号，配置为GPIO，输入模式，通过软件查询方式判忙		PD8/FSMC_D13		PD9/FSMC_D14		PD10/FSMC_D15		PD11/FSMC_CLE/FSMC_A16		PD12/FSMC_ALE/FSMC_A17		PD13/FSMC_A18		PD14/FSMC_D0		PD15/FSMC_D1		PE3/FSMC_A19		PE4/FSMC_A20		PE5/FSMC_A21		PE6/FSMC_A22		PE7/FSMC_D4		PE8/FSMC_D5		PE9/FSMC_D6		PE10/FSMC_D7		PE11/FSMC_D8		PE12/FSMC_D9		PE13/FSMC_D10		PE14/FSMC_D11		PE15/FSMC_D12		PF0/FSMC_A0		PF1/FSMC_A1		PF2/FSMC_A2		PF3/FSMC_A3		PF4/FSMC_A4		PF5/FSMC_A5		PF12/FSMC_A6		PF13/FSMC_A7		PF14/FSMC_A8		PF15/FSMC_A9		PG0/FSMC_A10		PG1/FSMC_A11		PG2/FSMC_A12		PG3/FSMC_A13		PG4/FSMC_A14		PG5/FSMC_A15		PG9/FSMC_NE2	- 片选信号	*/	/* GPIOD configuration */	GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);	GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_4  | GPIO_Pin_5  |	                              GPIO_Pin_8  | GPIO_Pin_9  | GPIO_Pin_10 | GPIO_Pin_11 |	                              GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;	GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;	GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_NOPULL;//.........这里部分代码省略.........

void ext_sram_init(void){    FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;    FSMC_NORSRAMTimingInitTypeDef  Timing_read,Timing_write;    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &Timing_read;    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &Timing_write;    FSMC_NORSRAMStructInit(&FSMC_NORSRAMInitStructure);    /*--------------------- read timings configuration ---------------------*/    Timing_read.FSMC_AddressSetupTime = 4;  /* [3:0] F2/F4 1~15 HCLK */    Timing_read.FSMC_AddressHoldTime = 0;   /* [7:4] keep 0x00 in SRAM mode */    Timing_read.FSMC_DataSetupTime = 5;     /* [15:8] F2/F4 0~255 HCLK */    /* [19:16] Time between NEx high to NEx low (BUSTURN HCLK) */    Timing_read.FSMC_BusTurnAroundDuration = 1;    Timing_read.FSMC_CLKDivision = 0; /* [24:20] keep 0x00 in SRAM mode  */    Timing_read.FSMC_DataLatency = 0; /* [27:25] keep 0x00 in SRAM mode  */    Timing_read.FSMC_AccessMode = FSMC_AccessMode_A;    /*--------------------- write timings configuration ---------------------*/    Timing_write.FSMC_AddressSetupTime = 4;  /* [3:0] F2/F4 1~15 HCLK */    Timing_write.FSMC_AddressHoldTime = 0;   /* [7:4] keep 0x00 in SRAM mode */    Timing_write.FSMC_DataSetupTime = 5;     /* [15:8] F2/F4 0~255 HCLK */    /* [19:16] Time between NEx high to NEx low (BUSTURN HCLK) */    Timing_write.FSMC_BusTurnAroundDuration = 1;    Timing_write.FSMC_CLKDivision = 0; /* [24:20] keep 0x00 in SRAM mode  */    Timing_write.FSMC_DataLatency = 0; /* [27:25] keep 0x00 in SRAM mode  */    Timing_write.FSMC_AccessMode = FSMC_AccessMode_A;   /* FSMC 
C++ FSMDEBUG函数代码示例
C++ FSGetCatalogInfo函数代码示例