自学教程：C++ GET_HAL_DATA函数代码示例

s32MPT_InitializeAdapter(	IN	PADAPTER			pAdapter,	IN	u8				Channel	){	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);	s32		rtStatus = _SUCCESS;	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;	u32		ledsetting;	//-------------------------------------------------------------------------	// HW Initialization for 8190 MPT.	//-------------------------------------------------------------------------	//-------------------------------------------------------------------------	// SW Initialization for 8190 MP.	//-------------------------------------------------------------------------	pMptCtx->bMptDrvUnload = _FALSE;	pMptCtx->bMassProdTest = _FALSE;	pMptCtx->bMptIndexEven = _TRUE;	//default gain index is -6.0db	/* Init mpt event. */#if 0 // for Windows	NdisInitializeEvent( &(pMptCtx->MptWorkItemEvent) );	NdisAllocateSpinLock( &(pMptCtx->MptWorkItemSpinLock) );	PlatformInitializeWorkItem(		Adapter,		&(pMptCtx->MptWorkItem),		(RT_WORKITEM_CALL_BACK)MPT_WorkItemCallback,		(PVOID)Adapter,		"MptWorkItem");#endif	pMptCtx->bMptWorkItemInProgress = _FALSE;	pMptCtx->CurrMptAct = NULL;	//-------------------------------------------------------------------------#if 1	// Don't accept any packets	rtw_write32(pAdapter, REG_RCR, 0);#else	// Accept CRC error and destination address	pHalData->ReceiveConfig |= (RCR_ACRC32|RCR_AAP);	rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig);#endif#if 0	// If EEPROM or EFUSE is empty,we assign as RF 2T2R for MP.	if (pHalData->AutoloadFailFlag == TRUE)	{		pHalData->RF_Type = RF_2T2R;	}#endif	ledsetting = rtw_read32(pAdapter, REG_LEDCFG0);	rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS);#ifdef CONFIG_RTL8192C	PHY_IQCalibrate(pAdapter, _FALSE);	dm_CheckTXPowerTracking(pAdapter);	//trigger thermal meter	PHY_LCCalibrate(pAdapter);#endif#ifdef CONFIG_RTL8192D	PHY_IQCalibrate(pAdapter);	dm_CheckTXPowerTracking(pAdapter);	//trigger thermal meter	PHY_LCCalibrate(pAdapter);#endif#ifdef CONFIG_PCI_HCI	PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/);	//Wifi default use Main#else#ifdef CONFIG_RTL8192C#if 1	if (pHalData->BoardType == BOARD_MINICARD)		PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //default use Main#else	if(pAdapter->HalFunc.GetInterfaceSelectionHandler(pAdapter) == INTF_SEL2_MINICARD )		PHY_SetRFPathSwitch(Adapter, pAdapter->MgntInfo.bDefaultAntenna); //default use Main#endif#endif#endif	pMptCtx->backup0xc50 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0);	pMptCtx->backup0xc58 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0);	pMptCtx->backup0xc30 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0);	return	rtStatus;}

int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype){	_adapter	*padapter = pintfhdl->padapter;	struct dvobj_priv  *pdvobjpriv = adapter_to_dvobj(padapter);	struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(pdvobjpriv);	struct usb_device *udev = pdvobjpriv->pusbdev;	unsigned int pipe;	int status = 0;	u32 tmp_buflen = 0;	u8 reqtype;	u8 *pIo_buf;	int vendorreq_times = 0;#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE	u8 *tmp_buf;#else /* use stack memory */	u8 tmp_buf[MAX_USB_IO_CTL_SIZE];#endif	/* RTW_INFO("%s %s:%d/n",__FUNCTION__, current->comm, current->pid); */	if (RTW_CANNOT_IO(padapter)) {		status = -EPERM;		goto exit;	}	if (len > MAX_VENDOR_REQ_CMD_SIZE) {		RTW_INFO("[%s] Buffer len error ,vendor request failed/n", __FUNCTION__);		status = -EINVAL;		goto exit;	}#ifdef CONFIG_USB_VENDOR_REQ_MUTEX	_enter_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL);#endif	/* Acquire IO memory for vendorreq */#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC	pIo_buf = pdvobjpriv->usb_vendor_req_buf;#else	#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE	tmp_buf = rtw_malloc((u32) len + ALIGNMENT_UNIT);	tmp_buflen = (u32)len + ALIGNMENT_UNIT;	#else /* use stack memory */	tmp_buflen = MAX_USB_IO_CTL_SIZE;	#endif	/* Added by Albert 2010/02/09 */	/* For mstar platform, mstar suggests the address for USB IO should be 16 bytes alignment. */	/* Trying to fix it here. */	pIo_buf = (tmp_buf == NULL) ? NULL : tmp_buf + ALIGNMENT_UNIT - ((SIZE_PTR)(tmp_buf) & 0x0f);#endif	if (pIo_buf == NULL) {		RTW_INFO("[%s] pIo_buf == NULL/n", __FUNCTION__);		status = -ENOMEM;		goto release_mutex;	}	while (++vendorreq_times <= MAX_USBCTRL_VENDORREQ_TIMES) {		_rtw_memset(pIo_buf, 0, len);		if (requesttype == 0x01) {			pipe = usb_rcvctrlpipe(udev, 0);/* read_in */			reqtype =  REALTEK_USB_VENQT_READ;		} else {			pipe = usb_sndctrlpipe(udev, 0);/* write_out */			reqtype =  REALTEK_USB_VENQT_WRITE;			_rtw_memcpy(pIo_buf, pdata, len);		}		status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT);		if (status == len) {  /* Success this control transfer. */			rtw_reset_continual_io_error(pdvobjpriv);			if (requesttype == 0x01) {				/* For Control read transfer, we have to copy the read data from pIo_buf to pdata. */				_rtw_memcpy(pdata, pIo_buf,  len);			}		} else { /* error cases */			RTW_INFO("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d/n"				, value, (requesttype == 0x01) ? "read" : "write" , len, status, *(u32 *)pdata, vendorreq_times);			if (status < 0) {				if (status == (-ESHUTDOWN)	|| status == -ENODEV)					rtw_set_surprise_removed(padapter);				else {					#ifdef DBG_CONFIG_ERROR_DETECT					{						HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);						pHalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL;					}					#endif				}			} else { /* status != len && status >= 0 */				if (status > 0) {					if (requesttype == 0x01) {						/* For Control read transfer, we have to copy the read data from pIo_buf to pdata. *///.........这里部分代码省略.........

//.........这里部分代码省略.........		pxmitpriv->beq_cnt++;		pxmitbuf->flags = BE_QUEUE_INX;		break;	case BK_QUEUE_INX:		pxmitpriv->bkq_cnt++;		pxmitbuf->flags = BK_QUEUE_INX;		break;	case HIGH_QUEUE_INX:		pxmitbuf->flags = HIGH_QUEUE_INX;		break;	default:		pxmitbuf->flags = MGT_QUEUE_INX;		break;	}	_exit_critical(&pxmitpriv->lock, &irqL);	purb	= pxmitbuf->pxmit_urb[0];	/* translate DMA FIFO addr to pipehandle */#ifdef RTW_HALMAC	pipe = ffaddr2pipehdl(pdvobj, pxmitbuf->bulkout_id);#else	pipe = ffaddr2pipehdl(pdvobj, addr);#endif#ifdef CONFIG_REDUCE_USB_TX_INT	if ((pxmitpriv->free_xmitbuf_cnt % NR_XMITBUFF == 0)	    || (pxmitbuf->buf_tag > XMITBUF_DATA))		purb->transfer_flags  &= (~URB_NO_INTERRUPT);	else {		purb->transfer_flags  |=  URB_NO_INTERRUPT;		/* RTW_INFO("URB_NO_INTERRUPT "); */	}#endif	usb_fill_bulk_urb(purb, pusbd, pipe,			  pxmitframe->buf_addr, /* = pxmitbuf->pbuf */			  cnt,			  usb_write_port_complete,			  pxmitbuf);/* context is pxmitbuf */#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX	purb->transfer_dma = pxmitbuf->dma_transfer_addr;	purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;	purb->transfer_flags |= URB_ZERO_PACKET;#endif /* CONFIG_USE_USB_BUFFER_ALLOC_TX */#ifdef USB_PACKET_OFFSET_SZ#if (USB_PACKET_OFFSET_SZ == 0)	purb->transfer_flags |= URB_ZERO_PACKET;#endif#endif#if 0	if (bwritezero)		purb->transfer_flags |= URB_ZERO_PACKET;#endif	status = usb_submit_urb(purb, GFP_ATOMIC);	if (!status) {		#ifdef DBG_CONFIG_ERROR_DETECT		{			HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);			pHalData->srestpriv.last_tx_time = rtw_get_current_time();		}		#endif	} else {		rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_WRITE_PORT_ERR);		RTW_INFO("usb_write_port, status=%d/n", status);		switch (status) {		case -ENODEV:			rtw_set_drv_stopped(padapter);			break;		default:			break;		}		goto exit;	}	ret = _SUCCESS;	/* Commented by Albert 2009/10/13	 * We add the URB_ZERO_PACKET flag to urb so that the host will send the zero packet automatically. */	/*		if(bwritezero == _TRUE)		{			usb_bulkout_zero(pintfhdl, addr);		}	*/exit:	if (ret != _SUCCESS)		rtw_free_xmitbuf(pxmitpriv, pxmitbuf);	return ret;}

void rtl823a_phy_rf6052setccktxpower(struct rtw_adapter *Adapter, u8 *pPowerlevel){	struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);	struct dm_priv *pdmpriv = &pHalData->dmpriv;	struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;	u32 TxAGC[2] = {0, 0}, tmpval = 0;	bool TurboScanOff = false;	u8 idx1, idx2;	u8 *ptr;	/*  According to SD3 eechou's suggestion, we need to disable turbo scan for RU. */	/*  Otherwise, external PA will be broken if power index > 0x20. */	if (pHalData->EEPROMRegulatory != 0 || pHalData->ExternalPA)		TurboScanOff = true;	if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {		TxAGC[RF_PATH_A] = 0x3f3f3f3f;		TxAGC[RF_PATH_B] = 0x3f3f3f3f;		TurboScanOff = true;/* disable turbo scan */		if (TurboScanOff) {			for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {				TxAGC[idx1] =					pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |					(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);				/*  2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. */				if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA)					TxAGC[idx1] = 0x20;			}		}	} else {/*  20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. *//*  Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. *//*  In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. */		if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {			TxAGC[RF_PATH_A] = 0x10101010;			TxAGC[RF_PATH_B] = 0x10101010;		} else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) {			TxAGC[RF_PATH_A] = 0x00000000;			TxAGC[RF_PATH_B] = 0x00000000;		} else {			for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {				TxAGC[idx1] =					pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |					(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);			}			if (pHalData->EEPROMRegulatory == 0) {				tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) +						(pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8);				TxAGC[RF_PATH_A] += tmpval;				tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) +						(pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24);				TxAGC[RF_PATH_B] += tmpval;			}		}	}	for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {		ptr = (u8 *)(&TxAGC[idx1]);		for (idx2 = 0; idx2 < 4; idx2++) {			if (*ptr > RF6052_MAX_TX_PWR)				*ptr = RF6052_MAX_TX_PWR;			ptr++;		}	}	/*  rf-A cck tx power */	tmpval = TxAGC[RF_PATH_A]&0xff;	PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);	tmpval = TxAGC[RF_PATH_A]>>8;	PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);	/*  rf-B cck tx power */	tmpval = TxAGC[RF_PATH_B]>>24;	PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);	tmpval = TxAGC[RF_PATH_B]&0x00ffffff;	PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);}	/* PHY_RF6052SetCckTxPower */

static int phy_RF6052_Config_ParaFile(struct rtw_adapter *Adapter){	u32 u4RegValue = 0;	u8 eRFPath;	struct bb_reg_define	*pPhyReg;	int rtStatus = _SUCCESS;	struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);	/* 3----------------------------------------------------------------- */	/* 3 <2> Initialize RF */	/* 3----------------------------------------------------------------- */	for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {		pPhyReg = &pHalData->PHYRegDef[eRFPath];		/*----Store original RFENV control type----*/		switch (eRFPath) {		case RF_PATH_A:			u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);			break;		case RF_PATH_B:			u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16);			break;		}		/*----Set RF_ENV enable----*/		PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);		udelay(1);/* PlatformStallExecution(1); */		/*----Set RF_ENV output high----*/		PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);		udelay(1);/* PlatformStallExecution(1); */		/* Set bit number of Address and Data for RF register */		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);	/*  Set 1 to 4 bits for 8255 */		udelay(1);/* PlatformStallExecution(1); */		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);	/*  Set 0 to 12  bits for 8255 */		udelay(1);/* PlatformStallExecution(1); */		/*----Initialize RF fom connfiguration file----*/		switch (eRFPath) {		case RF_PATH_A:			ODM_ReadAndConfig_RadioA_1T_8723A(&pHalData->odmpriv);			break;		case RF_PATH_B:			break;		}		/*----Restore RFENV control type----*/;		switch (eRFPath) {		case RF_PATH_A:			PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);			break;		case RF_PATH_B:			PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);			break;		}		if (rtStatus != _SUCCESS) {			/* RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); */			goto phy_RF6052_Config_ParaFile_Fail;		}	}phy_RF6052_Config_ParaFile_Fail:	return rtStatus;}

static int phy_RF6052_Config_ParaFile(struct adapter *Adapter){	struct bb_reg_def *pPhyReg;	struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);	u32 u4RegValue = 0;	u8 eRFPath;	int rtStatus = _SUCCESS;	/* 3----------------------------------------------------------------- */	/* 3 <2> Initialize RF */	/* 3----------------------------------------------------------------- */	for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {		pPhyReg = &pHalData->PHYRegDef[eRFPath];		/*----Store original RFENV control type----*/		switch (eRFPath) {		case RF_PATH_A:		case RF_PATH_C:			u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);			break;		case RF_PATH_B:		case RF_PATH_D:			u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16);			break;		}		/*----Set RF_ENV enable----*/		PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);		udelay(1);/* PlatformStallExecution(1); */		/*----Set RF_ENV output high----*/		PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);		udelay(1);/* PlatformStallExecution(1); */		/* Set bit number of Address and Data for RF register */		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);	/*  Set 1 to 4 bits for 8255 */		udelay(1);/* PlatformStallExecution(1); */		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);	/*  Set 0 to 12  bits for 8255 */		udelay(1);/* PlatformStallExecution(1); */		/*----Initialize RF fom connfiguration file----*/		switch (eRFPath) {		case RF_PATH_A:			if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath))				rtStatus = _FAIL;			break;		case RF_PATH_B:		if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath))				rtStatus = _FAIL;			break;		case RF_PATH_C:			break;		case RF_PATH_D:			break;		}		/*----Restore RFENV control type----*/;		switch (eRFPath) {		case RF_PATH_A:		case RF_PATH_C:			PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);			break;		case RF_PATH_B:		case RF_PATH_D:			PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);			break;		}		if (rtStatus != _SUCCESS)			goto phy_RF6052_Config_ParaFile_Fail;	}	return rtStatus;phy_RF6052_Config_ParaFile_Fail:	return rtStatus;}

/* * Notice: *	Before calling this function, *	precvframe->u.hdr.rx_data should be ready! */void rtl8192e_query_rx_phy_status(	union recv_frame	*precvframe,	u8 				*pphy_status){	PADAPTER 			padapter = precvframe->u.hdr.adapter;	struct rx_pkt_attrib	*pattrib = &precvframe->u.hdr.attrib;	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);		PODM_PHY_INFO_T 	pPHYInfo  = (PODM_PHY_INFO_T)(&pattrib->phy_info);	u8					*wlanhdr;	ODM_PACKET_INFO_T	pkt_info;	u8 *sa;	struct sta_priv *pstapriv;	struct sta_info *psta;	//_irqL		irqL;		pkt_info.bPacketMatchBSSID =_FALSE;	pkt_info.bPacketToSelf = _FALSE;	pkt_info.bPacketBeacon = _FALSE;		wlanhdr = get_recvframe_data(precvframe);	pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) &&		!pattrib->icv_err && !pattrib->crc_err &&		_rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN));	pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID && (_rtw_memcmp(get_da(wlanhdr), myid(&padapter->eeprompriv), ETH_ALEN));	pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && (GetFrameSubType(wlanhdr) == WIFI_BEACON);	if(pkt_info.bPacketBeacon){		if(check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){							sa = padapter->mlmepriv.cur_network.network.MacAddress;			#if 0			{									DBG_8192C("==> rx beacon from AP[%02x:%02x:%02x:%02x:%02x:%02x]/n",					sa[0],sa[1],sa[2],sa[3],sa[4],sa[5]);								}			#endif		}		//to do Ad-hoc	}	else{		sa = get_sa(wlanhdr);	}			pstapriv = &padapter->stapriv;	pkt_info.StationID = 0xFF;	psta = rtw_get_stainfo(pstapriv, sa);	if (psta)	{		pkt_info.StationID = psta->mac_id;				//DBG_8192C("%s ==> StationID(%d)/n",__FUNCTION__,pkt_info.StationID);	}				pkt_info.DataRate = pattrib->data_rate;		//rtl8192e_query_rx_phy_status(precvframe, pphy_status);	//_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL);		ODM_PhyStatusQuery(&pHalData->odmpriv,pPHYInfo,pphy_status,&(pkt_info));	//_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL);	precvframe->u.hdr.psta = NULL;	if (pkt_info.bPacketMatchBSSID &&		(check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE))	{				if (psta)		{						precvframe->u.hdr.psta = psta;			process_phy_info(padapter, precvframe);					}			}	else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon)	{		if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)		{					if (psta)			{								precvframe->u.hdr.psta = psta;			}		}		process_phy_info(padapter, precvframe);			}}

//============================================================// functions//============================================================static void Init_ODM_ComInfo_88E(PADAPTER	Adapter){    PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);    struct dm_priv	*pdmpriv = &pHalData->dmpriv;    PDM_ODM_T		pDM_Odm = &(pHalData->odmpriv);    u8	cut_ver,fab_ver;    //    // Init Value    //    _rtw_memset(pDM_Odm,0,sizeof(pDM_Odm));    pDM_Odm->Adapter = Adapter;    ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PLATFORM,ODM_CE);    if(Adapter->interface_type == RTW_GSPI )        ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,ODM_ITRF_SDIO);    else        ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,Adapter->interface_type);//RTL871X_HCI_TYPE    ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE,ODM_RTL8188E);    fab_ver = ODM_TSMC;    cut_ver = ODM_CUT_A;    ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver);    ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver);    ODM_CmnInfoInit(pDM_Odm,	ODM_CMNINFO_MP_TEST_CHIP,IS_NORMAL_CHIP(pHalData->VersionID));#if 0//#ifdef CONFIG_USB_HCI    ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BOARD_TYPE,pHalData->BoardType);    if(pHalData->BoardType == BOARD_USB_High_PA) {        ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA,_TRUE);        ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA,_TRUE);    }#endif    ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PATCH_ID,pHalData->CustomerID);    //	ODM_CMNINFO_BINHCT_TEST only for MP Team    ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BWIFI_TEST,Adapter->registrypriv.wifi_spec);    if(pHalData->rf_type == RF_1T1R) {        ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T1R);    }    else if(pHalData->rf_type == RF_2T2R) {        ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_2T2R);    }    else if(pHalData->rf_type == RF_1T2R) {        ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T2R);    }    ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);#ifdef CONFIG_DISABLE_ODM    pdmpriv->InitODMFlag = 0;#else    pdmpriv->InitODMFlag =	ODM_RF_CALIBRATION		|                            ODM_RF_TX_PWR_TRACK	//|                            ;    //if(pHalData->AntDivCfg)    //	pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;#endif    ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag);}

VOIDrtl8188e_HalDmWatchDog(    IN	PADAPTER	Adapter){    BOOLEAN		bFwCurrentInPSMode = _FALSE;    BOOLEAN		bFwPSAwake = _TRUE;    u8 hw_init_completed = _FALSE;    PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);    struct dm_priv	*pdmpriv = &pHalData->dmpriv;    PDM_ODM_T		pDM_Odm = &(pHalData->odmpriv);#ifdef CONFIG_CONCURRENT_MODE    PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;#endif //CONFIG_CONCURRENT_MODE    _func_enter_;    hw_init_completed = Adapter->hw_init_completed;    if (hw_init_completed == _FALSE)        goto skip_dm;#ifdef CONFIG_LPS#ifdef CONFIG_CONCURRENT_MODE    if (Adapter->iface_type != IFACE_PORT0 && pbuddy_adapter) {        bFwCurrentInPSMode = pbuddy_adapter->pwrctrlpriv.bFwCurrentInPSMode;        rtw_hal_get_hwreg(pbuddy_adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));    } else#endif //CONFIG_CONCURRENT_MODE    {        bFwCurrentInPSMode = Adapter->pwrctrlpriv.bFwCurrentInPSMode;        rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));    }#endif#ifdef CONFIG_P2P_PS    // Fw is under p2p powersaving mode, driver should stop dynamic mechanism.    // modifed by thomas. 2011.06.11.    if(Adapter->wdinfo.p2p_ps_mode)        bFwPSAwake = _FALSE;#endif //CONFIG_P2P_PS    if( (hw_init_completed == _TRUE)            && ((!bFwCurrentInPSMode) && bFwPSAwake))    {        //        // Calculate Tx/Rx statistics.        //        dm_CheckStatistics(Adapter);        //        // Dynamically switch RTS/CTS protection.        //        //dm_CheckProtection(Adapter);#ifdef CONFIG_PCI_HCI        // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.        // Tx Migration settings.        //dm_InterruptMigration(Adapter);        //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))        //	PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));#endif    }    //ODM    if (hw_init_completed == _TRUE)    {        u8	bLinked=_FALSE;#ifdef CONFIG_DISABLE_ODM        pHalData->odmpriv.SupportAbility = 0;#endif        if(rtw_linked_check(Adapter))            bLinked = _TRUE;#ifdef CONFIG_CONCURRENT_MODE        if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter))            bLinked = _TRUE;#endif //CONFIG_CONCURRENT_MODE        ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked);        ODM_DMWatchdog(&pHalData->odmpriv);    }skip_dm:    // Check GPIO to determine current RF on/off and Pbc status.    // Check Hardware Radio ON/OFF or not#ifdef CONFIG_PCI_HCI    if(pHalData->bGpioHwWpsPbc)#endif    {        //temp removed        //dm_CheckPbcGPIO(Adapter);    }//.........这里部分代码省略.........

VOIDODM_TXPowerTrackingCallback_ThermalMeter(#if (DM_ODM_SUPPORT_TYPE & ODM_AP)	IN PDM_ODM_T		pDM_Odm#else	IN PADAPTER	Adapter#endif	){#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)	PDM_ODM_T		pDM_Odm = &pHalData->DM_OutSrc;	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)	PDM_ODM_T		pDM_Odm = &pHalData->odmpriv;	#endif#endif		u1Byte			ThermalValue = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0;	u1Byte			ThermalValue_AVG_count = 0;	u4Byte			ThermalValue_AVG = 0;		u1Byte			OFDM_min_index = 0;  // OFDM BB Swing should be less than +3.0dB, which is required by Arthur	u1Byte			Indexforchannel = 0; // GetRightChnlPlaceforIQK(pHalData->CurrentChannel)	TXPWRTRACK_CFG 	c;	//4 1. The following TWO tables decide the final index of OFDM/CCK swing table.	pu1Byte			deltaSwingTableIdx_TUP_A;	pu1Byte			deltaSwingTableIdx_TDOWN_A;	pu1Byte			deltaSwingTableIdx_TUP_B;	pu1Byte			deltaSwingTableIdx_TDOWN_B;		//4 2. Initilization ( 7 steps in total )	ConfigureTxpowerTrack(pDM_Odm, &c);	(*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A,									  (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B);			pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug	pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE;    #if (MP_DRIVER == 1)#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)	pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // <Kordan> We should keep updating the control variable according to HalData.#endif#if (DM_ODM_SUPPORT_TYPE == ODM_CE)	if (pDM_Odm->mp_mode == TRUE)#endif		// <Kordan> RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files.		pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317;#endif	ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,		("===>ODM_TXPowerTrackingCallback_ThermalMeter, /		 /n pDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase[A]: %d, pDM_Odm->DefaultOfdmIndex: %d/n", 		pDM_Odm->BbSwingIdxCckBase, pDM_Odm->BbSwingIdxOfdmBase[ODM_RF_PATH_A], pDM_Odm->DefaultOfdmIndex));	ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00);	//0x42: RF Reg[15:10] 88E	if( ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl || pHalData->EEPROMThermalMeter == 0 || 		pHalData->EEPROMThermalMeter == 0xFF)        return;	//4 3. Initialize ThermalValues of RFCalibrateInfo	if(pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex)	{		ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch/n"));					}	//4 4. Calculate average thermal meter		pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue;	pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++;	if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum)   //Average times =  c.AverageThermalNum		pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0;	for(i = 0; i < c.AverageThermalNum; i++)	{		if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i])		{			ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i];			ThermalValue_AVG_count++;		}	}	if(ThermalValue_AVG_count)               //Calculate Average ThermalValue after average enough times	{		ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count);		ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,			("AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X/n", ThermalValue, pHalData->EEPROMThermalMeter));						}				//4 5. Calculate delta, delta_LCK, delta_IQK.//.........这里部分代码省略.........

s32 rtw_hal_is_disable_sw_channel_plan(struct adapter *padapter){	return GET_HAL_DATA(padapter)->bDisableSWChannelPlan;}

void update_recvframe_phyinfo(struct recv_frame *precvframe,			      struct phy_stat *pphy_status){	struct rtw_adapter *padapter = precvframe->adapter;	struct rx_pkt_attrib *pattrib = &precvframe->attrib;	struct hal_data_8723a *pHalData = GET_HAL_DATA(padapter);	struct odm_phy_info *pPHYInfo = (struct odm_phy_info *)(&pattrib->phy_info);	struct odm_packet_info pkt_info;	u8 *sa = NULL, *da;	struct sta_priv *pstapriv;	struct sta_info *psta;	struct sk_buff *skb = precvframe->pkt;	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;	u8 *wlanhdr = skb->data;	pkt_info.bPacketMatchBSSID = false;	pkt_info.bPacketToSelf = false;	pkt_info.bPacketBeacon = false;	pkt_info.bPacketMatchBSSID =		(!ieee80211_is_ctl(hdr->frame_control) &&		 !pattrib->icv_err &&		 !pattrib->crc_err &&		 !memcmp(get_hdr_bssid(wlanhdr),			 get_bssid(&padapter->mlmepriv), ETH_ALEN));	da = ieee80211_get_DA(hdr);	pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID &&		(!memcmp(da, myid(&padapter->eeprompriv), ETH_ALEN));	pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID &&		ieee80211_is_beacon(hdr->frame_control);	pkt_info.StationID = 0xFF;	if (pkt_info.bPacketBeacon) {		if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == true)			sa = padapter->mlmepriv.cur_network.network.MacAddress;		/* to do Ad-hoc */	} else {		sa = ieee80211_get_SA(hdr);	}	pstapriv = &padapter->stapriv;	psta = rtw_get_stainfo23a(pstapriv, sa);	if (psta) {		pkt_info.StationID = psta->mac_id;		/* printk("%s ==> StationID(%d)/n", __FUNCTION__, pkt_info.StationID); */	}	pkt_info.Rate = pattrib->mcs_rate;	ODM_PhyStatusQuery23a(&pHalData->odmpriv, pPHYInfo,			   (u8 *)pphy_status, &pkt_info);	precvframe->psta = NULL;	if (pkt_info.bPacketMatchBSSID &&	    (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == true)) {		if (psta) {			precvframe->psta = psta;			rtl8723a_process_phy_info(padapter, precvframe);		}	} else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) {		if (check_fwstate(&padapter->mlmepriv,				  WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) ==		    true) {			if (psta)				precvframe->psta = psta;		}		rtl8723a_process_phy_info(padapter, precvframe);	}}

u1Byte			//bit0 = 1 => Tx OK, bit1 = 1 => Rx OKphy_PathA_IQK_8192C(	IN	PADAPTER	pAdapter,	IN	BOOLEAN		configPathB	){	u4Byte regEAC, regE94, regE9C, regEA4;	u1Byte result = 0x00;	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);	RTPRINT(FINIT, INIT_IQK, ("Path A IQK!/n"));	//path-A IQK setting	RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!/n"));	if(pAdapter->interfaceIndex == 0)	{		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f);		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);	}	else	{		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c22);		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c22);		}	PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102);	PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : 		IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502);	//path-B IQK setting	if(configPathB)	{		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22);		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22);		PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102);		if(IS_HARDWARE_TYPE_8192D(pAdapter))			PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160206);		else			PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202);	}	//LO calibration setting	RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!/n"));	if(IS_HARDWARE_TYPE_8192D(pAdapter))		PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);	else		PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1);	//One shot, path A LOK & IQK	RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!/n"));	PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);	PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);		// delay x ms	RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK./n", IQK_DELAY_TIME));	PlatformStallExecution(IQK_DELAY_TIME*1000);	// Check failed	regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);	RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x/n", regEAC));	regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord);	RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x/n", regE94));	regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord);	RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x/n", regE9C));	regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord);	RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x/n", regEA4));	if(!(regEAC & BIT28) &&				(((regE94 & 0x03FF0000)>>16) != 0x142) &&		(((regE9C & 0x03FF0000)>>16) != 0x42) )		result |= 0x01;	else							//if Tx not OK, ignore Rx		return result;

BOOLEANODM_SwAntDivCheckBeforeLink(	IN		PVOID		pDM_VOID	){#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM)	PDM_ODM_T		pDM_Odm = (PDM_ODM_T)pDM_VOID;	PADAPTER		Adapter = pDM_Odm->Adapter;	HAL_DATA_TYPE*	pHalData = GET_HAL_DATA(Adapter);	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;	pSWAT_T			pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;	pFAT_T	pDM_FatTable = &pDM_Odm->DM_FatTable;	s1Byte			Score = 0;	PRT_WLAN_BSS	pTmpBssDesc, pTestBssDesc;	u1Byte 			power_target = 10, power_target_L = 9, power_target_H = 16;	u1Byte			tmp_power_diff = 0,power_diff = 0,avg_power_diff = 0,max_power_diff = 0,min_power_diff = 0xff;	u2Byte			index, counter = 0;	static u1Byte		ScanChannel;	u8Byte			tStamp_diff = 0;			u4Byte			tmp_SWAS_NoLink_BK_Reg948;	ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ANTA_ON = (( %d )) , ANTB_ON = (( %d )) /n",pDM_Odm->DM_SWAT_Table.ANTA_ON ,pDM_Odm->DM_SWAT_Table.ANTB_ON ));	//if(HP id)	{		if(pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult==TRUE && pDM_Odm->SupportICType == ODM_RTL8723B)		{			ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B RSSI-based Antenna Detection is done/n"));			return FALSE;		}				if(pDM_Odm->SupportICType == ODM_RTL8723B)		{			if(pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 == 0xff)				pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch );		}	}	if (pDM_Odm->Adapter == NULL)  //For BSOD when plug/unplug fast.  //By YJ,120413	{	// The ODM structure is not initialized.		return FALSE;	}	// Retrieve antenna detection registry info, added by Roger, 2012.11.27.	if(!IS_ANT_DETECT_SUPPORT_RSSI(Adapter))	{		return FALSE;	}	else	{		ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Antenna Detection: RSSI Method/n"));		}	// Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF.	PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK);	if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect)	{		PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK);			ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 				("ODM_SwAntDivCheckBeforeLink(): RFChangeInProgress(%x), eRFPowerState(%x)/n", 				pMgntInfo->RFChangeInProgress, pHalData->eRFPowerState));			pDM_SWAT_Table->SWAS_NoLink_State = 0;				return FALSE;	}	else	{		PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK);	}	ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("pDM_SWAT_Table->SWAS_NoLink_State = %d/n", pDM_SWAT_Table->SWAS_NoLink_State));	//1 Run AntDiv mechanism "Before Link" part.	if(pDM_SWAT_Table->SWAS_NoLink_State == 0)	{		//1 Prepare to do Scan again to check current antenna state.		// Set check state to next step.		pDM_SWAT_Table->SWAS_NoLink_State = 1;			// Copy Current Scan list.		pMgntInfo->tmpNumBssDesc = pMgntInfo->NumBssDesc;		PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC);				// Go back to scan function again.		ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Scan one more time/n"));		pMgntInfo->ScanStep=0;		pMgntInfo->bScanAntDetect = TRUE;		ScanChannel = odm_SwAntDivSelectScanChnl(Adapter);				if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821))		{			if(pDM_FatTable->RxIdleAnt == MAIN_ANT)				ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT);			else				ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT);			if(ScanChannel == 0)//.........这里部分代码省略.........

static voidFindMinimumRSSI_8723a(IN	PADAPTER	pAdapter	){	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);	struct dm_priv	*pdmpriv = &pHalData->dmpriv;	struct mlme_priv	*pmlmepriv = &pAdapter->mlmepriv;	//1 1.Determine the minimum RSSI#ifdef CONFIG_CONCURRENT_MODE	//	FindMinimumRSSI()	per-adapter	{		PADAPTER pbuddy_adapter = pAdapter->pbuddy_adapter;		PHAL_DATA_TYPE	pbuddy_HalData = GET_HAL_DATA(pbuddy_adapter);		struct dm_priv *pbuddy_dmpriv = &pbuddy_HalData->dmpriv;		if((pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0) &&                  (pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB != 0))      		{			if(pdmpriv->EntryMinUndecoratedSmoothedPWDB > pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB)				pdmpriv->EntryMinUndecoratedSmoothedPWDB = pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB;             }		else		{			if(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)			      pdmpriv->EntryMinUndecoratedSmoothedPWDB = pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB;		} 		#if 0		if((pdmpriv->UndecoratedSmoothedPWDB != (-1)) &&			 (pbuddy_dmpriv->UndecoratedSmoothedPWDB != (-1)))		{			if((pdmpriv->UndecoratedSmoothedPWDB > pbuddy_dmpriv->UndecoratedSmoothedPWDB) &&				(pbuddy_dmpriv->UndecoratedSmoothedPWDB!=0))			            pdmpriv->UndecoratedSmoothedPWDB = pbuddy_dmpriv->UndecoratedSmoothedPWDB;		}		else		{			if((pdmpriv->UndecoratedSmoothedPWDB == (-1)) && (pbuddy_dmpriv->UndecoratedSmoothedPWDB!=0))			      pdmpriv->UndecoratedSmoothedPWDB = pbuddy_dmpriv->UndecoratedSmoothedPWDB;		}		#endif	}#endif	if((check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) &&		(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))	{		pdmpriv->MinUndecoratedPWDBForDM = 0;		//ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any /n"));	}	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	// Default port	{		#if 0		if((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ||			(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||			(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))		{			pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;			//ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("AP Client PWDB = 0x%x /n", pHalData->MinUndecoratedPWDBForDM));		}		else//for STA mode		{			pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->UndecoratedSmoothedPWDB;			//ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("STA Default Port PWDB = 0x%x /n", pHalData->MinUndecoratedPWDBForDM));		}		#else		pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;		#endif	}	else // associated entry pwdb	{		pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;		//ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("AP Ext Port or disconnet PWDB = 0x%x /n", pHalData->MinUndecoratedPWDBForDM));	}	//odm_FindMinimumRSSI_Dmsp(pAdapter);	//DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)/n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM);	//ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d/n",pHalData->MinUndecoratedPWDBForDM));}

s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt){#ifdef PLATFORM_LINUX	u16 fc;	int rc, len, pipe;		unsigned int bmcst, tid, qsel;	struct sk_buff *skb, *pxmit_skb;	struct urb *urb;	unsigned char *pxmitbuf;	struct tx_desc *ptxdesc;	struct rtw_ieee80211_hdr *tx_hdr;	struct hostapd_priv *phostapdpriv = padapter->phostapdpriv;		struct net_device *pnetdev = padapter->pnetdev;	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);	struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);			//DBG_8192C("%s/n", __FUNCTION__);	skb = pkt;		len = skb->len;	tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data);	fc = le16_to_cpu(tx_hdr->frame_ctl);	bmcst = IS_MCAST(tx_hdr->addr1);	if ((fc & RTW_IEEE80211_FCTL_FTYPE) != RTW_IEEE80211_FTYPE_MGMT)		goto _exit;#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/[email
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