自学教程：C++ HAL_DISABLE_INTERRUPTS函数代码示例

externC void cyg_drv_interrupt_unmask( cyg_vector_t vector ){    CYG_INTERRUPT_STATE old_ints;        CYG_REPORT_FUNCTION();    CYG_REPORT_FUNCARG1("vector=%d", vector);    CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector");        CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector");        HAL_DISABLE_INTERRUPTS(old_ints);    HAL_INTERRUPT_UNMASK( vector );    HAL_RESTORE_INTERRUPTS(old_ints);    CYG_REPORT_RETURN();}

/*******************************************************************************  MCF5272_uart_start_xmit() - Enable the transmitter on the device.  INPUT:    chan - pointer to the serial private data.*/static void MCF5272_uart_start_xmit(serial_channel *chan){    CYG_INTERRUPT_STATE int_state;    MCF5272_uart_info_t * port = (MCF5272_uart_info_t *) chan->dev_priv;    /* Enable the UART transmit. */    MCF5272_UART_WRITE(port->base->ucr, MCF5272_UART_UCR_TXEN);    /* Enable transmit interrupt */    HAL_DISABLE_INTERRUPTS(int_state);    port->imr_mirror |= MCF5272_UART_UIMR_TXRDY;    MCF5272_UART_WRITE(port->base->uisr_uimr, port->imr_mirror);    HAL_RESTORE_INTERRUPTS(int_state);}

//// This routine is called to send data to the hardware.static void s3esk_eth_send(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len,              int total_len, unsigned long key){    struct s3esk_eth_info *qi = (struct s3esk_eth_info *)sc->driver_private;    volatile char *bp;    int i;#ifdef CYGPKG_NET    cyg_uint32 int_state;    HAL_DISABLE_INTERRUPTS(int_state);    // FIXME: closer to Send#endif	//can be send max 1500 bytes	    // Set up buffer	qi->txlength = total_len;	bp = qi->txbuf;	qi->sended = 0;	for (i = 0;  i < sg_len;  i++) 	{        memcpy((void *)bp, (void *)sg_list[i].buf, sg_list[i].len);        bp += sg_list[i].len;    }		cyg_uint32 len = qi->txlength - qi->sended;	if(len > CYGNUM_DEVS_ETH_POWERPC_S3ESK_BUFSIZE) len = CYGNUM_DEVS_ETH_POWERPC_S3ESK_BUFSIZE;		//XEmacLite_SetMacAddress(&qi->dev, qi->enaddr);	if (XEmacLite_Send(&qi->dev, qi->txbuf + qi->sended, len) != XST_SUCCESS) {		deferred = 1;    }	else	{		qi->sended += len;		if(qi->sended >= qi->txlength) deferred = 0;		else deferred = 1;	}    // sg_list can be freed! (maybe deferred)    (sc->funs->eth_drv->tx_done)(sc, key, 0);#ifdef CYGPKG_NET    HAL_RESTORE_INTERRUPTS(int_state);#endif}

static voidtrampoline(unsigned long entry){    typedef void code_fun(void);    code_fun *fun = (code_fun *)entry;    unsigned long oldints;    HAL_DISABLE_INTERRUPTS(oldints);#ifdef HAL_ARCH_PROGRAM_NEW_STACK    HAL_ARCH_PROGRAM_NEW_STACK(fun);#else    (*fun)();#endif    HAL_THREAD_LOAD_CONTEXT(&saved_context);}

void cyg_hal_report_abort_data(HAL_SavedRegisters *frame){#ifdef CYGPKG_HAL_SMP_SUPPORT    HAL_SMP_CPU_TYPE cpu;    cpu  = HAL_SMP_CPU_THIS();#endif    int old;    HAL_DISABLE_INTERRUPTS(old);#ifdef CYGPKG_HAL_SMP_SUPPORT    diag_printf("[ABORT DATA] CPU: %d Frame:/n", cpu);#else    diag_printf("[ABORT DATA] Frame:/n");#endif    dump_frame((unsigned char *)frame);    HAL_RESTORE_INTERRUPTS(old);}

void cyg_hal_report_software_interrupt(HAL_SavedRegisters *frame){#ifdef CYGPKG_HAL_SMP_SUPPORT    HAL_SMP_CPU_TYPE cpu;    cpu  = HAL_SMP_CPU_THIS();#endif    int old;    HAL_DISABLE_INTERRUPTS(old);#ifdef CYGPKG_HAL_SMP_SUPPORT    diag_printf("[SOFTWARE INTERRUPT] CPU: %d Frame:/n", cpu);#else    diag_printf("[SOFTWARE INTERRUPT] Frame:/n");#endif    dump_frame((unsigned char *)frame);    HAL_RESTORE_INTERRUPTS(old);}

// Debug routinesvoid cyg_hal_report_undefined_instruction(HAL_SavedRegisters *frame){#ifdef CYGPKG_HAL_SMP_SUPPORT    HAL_SMP_CPU_TYPE cpu;    cpu  = HAL_SMP_CPU_THIS();#endif    int old;    HAL_DISABLE_INTERRUPTS(old);#ifdef CYGPKG_HAL_SMP_SUPPORT    diag_printf("[UNDEFINED INSTRUCTION] CPU: %d Frame:/n", cpu);#else    diag_printf("[UNDEFINED INSTRUCTION] Frame:/n");#endif    dump_frame((unsigned char *)frame);    HAL_RESTORE_INTERRUPTS(old);}

static void post_dsr( cyg_interrupt *intr ){    CYG_INTERRUPT_STATE old_intr;    CYG_REPORT_FUNCTION();    HAL_DISABLE_INTERRUPTS(old_intr);    if( intr->dsr_count++ == 0 )    {        intr->next_dsr = dsr_list;        dsr_list = intr;    }    HAL_RESTORE_INTERRUPTS(old_intr);    CYG_REPORT_RETURN();    }

/************************************************************************************************** * @fn          halAssertHazardLights * * @brief       Blink LEDs to indicate an error. * * @param       none * * @return      none ************************************************************************************************** */void halAssertHazardLights(void){  /* disable all interrupts before anything else */  HAL_DISABLE_INTERRUPTS();  /*-------------------------------------------------------------------------------   *  Master infinite loop.   */  for (;;)  {      HAL_LED_BLINK_DELAY();      /* toggle LEDS */      HAL_TOGGLE_LED1();      HAL_TOGGLE_LED2();  }}

voidshow_frame_out(HAL_SavedRegisters *frame){#ifdef CYGPKG_HAL_SMP_SUPPORT    HAL_SMP_CPU_TYPE cpu;    cpu  = HAL_SMP_CPU_THIS();#endif    int old;    HAL_DISABLE_INTERRUPTS(old);#ifdef CYGPKG_HAL_SMP_SUPPORT    diag_printf("[OUT] CPU: %d IRQ Frame:/n", cpu);#else    diag_printf("[OUT] IRQ Frame:/n");#endif    dump_frame((unsigned char *)frame);    HAL_RESTORE_INTERRUPTS(old);}

static int flash_run_command(cyg_uint32 address,                   cyg_uint32 command,                   cyg_uint32 timeout) {  cyg_uint32 retcode;  cyg_uint32 fsr;  cyg_uint32 mask;  cyg_uint32 page;    page = ((cyg_uint32) address - (cyg_uint32) flash_info.start) /     flash_info.block_size;    // Wait for the last command to finish  retcode = flash_wait_for_controller(timeout);  if (retcode != FLASH_ERR_OK){    return retcode;  }    HAL_DISABLE_INTERRUPTS(mask);    HAL_WRITE_UINT32(AT91_MC+AT91_MC_FCR,                    command |                   ((page & AT91_MC_FCR_PAGE_MASK) << AT91_MC_FCR_PAGE_SHIFT) |                   AT91_MC_FCR_KEY);  retcode = flash_wait_for_controller(timeout);  HAL_RESTORE_INTERRUPTS(mask);  if (retcode != FLASH_ERR_OK){    return retcode;  }  // Check for an error  HAL_READ_UINT32(AT91_MC+AT91_MC_FSR, fsr);  if ((fsr & AT91_MC_FSR_LOCKE) == AT91_MC_FSR_LOCKE)    return FLASH_ERR_PROTECT;  if ((fsr & AT91_MC_FSR_PROGE) == AT91_MC_FSR_PROGE)    return FLASH_ERR_PROGRAM;  return FLASH_ERR_OK;}

void hal_diag_write_char(char c){  unsigned long __state;  HAL_DISABLE_INTERRUPTS(__state);  if(c == '/n')    {#if defined (CYG_KERNEL_DIAG_SERIAL)      cyg_hal_plf_serial_putc(NULL, '/r');      cyg_hal_plf_serial_putc(NULL, '/n');#endif#if defined(CYG_KERNEL_DIAG_BUFFER)      hal_diag_buffer[hal_diag_buffer_pos++] = c;      if (hal_diag_buffer_pos >= sizeof(hal_diag_buffer) )          hal_diag_buffer_pos = 0;#endif#if defined(CYG_KERNEL_DIAG_GDB)      gdb_diag_write_char(c);#endif    }  else if (c == '/r')    {      // Ignore '/r'    }  else    {#if defined(CYG_KERNEL_DIAG_SERIAL)      cyg_hal_plf_serial_putc(NULL, c);#endif#if defined(CYG_KERNEL_DIAG_BUFFER)      hal_diag_buffer[hal_diag_buffer_pos++] = c;      if (hal_diag_buffer_pos >= sizeof(hal_diag_buffer) )          hal_diag_buffer_pos = 0;#endif#if defined(CYG_KERNEL_DIAG_GDB)      gdb_diag_write_char(c);#endif    }  HAL_RESTORE_INTERRUPTS(__state);}

// Deliver function (ex-DSR) handles the ethernet [logical] processingstatic voidppc405_eth_deliver(struct eth_drv_sc *sc){#ifdef CYGINT_IO_ETH_INT_SUPPORT_REQUIRED    struct ppc405_eth_info *qi = (struct ppc405_eth_info *)sc->driver_private;    cyg_uint32 old_ints;#endif    ppc405_eth_int(sc);#ifdef CYGINT_IO_ETH_INT_SUPPORT_REQUIRED    // Allow interrupts to happen again    HAL_DISABLE_INTERRUPTS(old_ints);    cyg_drv_interrupt_acknowledge(qi->ints);    cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_MAL_SERR);    cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_MAL_TX_EOB);    cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_MAL_RX_EOB);    cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_MAL_TX_DE);    cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_MAL_RX_DE);    cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EMAC0);    HAL_RESTORE_INTERRUPTS(old_ints);#endif}

/************************************************************************************************** * @fn          appForceBoot * * @brief       Force the boot loader to run. * * input parameters * * None. * * output parameters * * None. * * @return      None. */void appForceBoot(void){  uint16 crc[2];  SBL_NVM_GET(SBL_ADDR_CRC, crc, sizeof(crc));  // A simple check if the image is built for a boot loader is a valid CRC & shadow where expected.  if ((crc[0] == 0xFFFF) || (crc[0] == 0x0000) ||      (crc[1] == 0xFFFF) || (crc[1] == 0x0000) ||      (crc[1] != crc[0]))  {    return;  }  HAL_DISABLE_INTERRUPTS();  crc[0] ^= 0xFFFF;  // Only write to zero bits that are not already zero.  crc[1] = 0xFFFF;   // No need to write any bits to zero.  SBL_NVM_SET(SBL_ADDR_CRC, crc, sizeof(crc));  HAL_SYSTEM_RESET();}

void intr_main( void ){    CYG_INTERRUPT_STATE oldints;    cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_RTC, 1,                             ISR_DATA, isr, NULL, &intr_handle, &intr);    cyg_drv_interrupt_attach(intr_handle);    HAL_CLOCK_INITIALIZE( CYGNUM_HAL_RTC_PERIOD );    cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_RTC);    HAL_ENABLE_INTERRUPTS();    while( ticks < 10 )    {            }    HAL_DISABLE_INTERRUPTS(oldints);    CYG_TEST_PASS_FINISH("HAL interrupt test");}

/************************************************************************************************** * @fn          appForceBoot * * @brief       Force the boot loader to run. * * input parameters * * None. * * output parameters * * None. * * @return      None. */void appForceBoot(void){    uint16 crc[2];    // Make sure SBL is present.    HalFlashRead(UBL_PAGE_FIRST, UBL_MD_PG_OFFSET, (uint8 *)crc, 4);    if ((crc[0] == 0xFFFF) || (crc[0] == 0x0000) ||            (crc[1] == 0xFFFF) || (crc[1] == 0x0000) ||            (crc[1] != crc[0]))    {        return;    }    HAL_DISABLE_INTERRUPTS();    crc[1] ^= 0xFFFF;  // Only write to zero bits that are not already zero.    crc[0] = 0xFFFF;    HalFlashWrite(((uint16)&_ublMetaData) / HAL_FLASH_WORD_SIZE, (uint8 *)crc, 1);    HAL_SYSTEM_RESET();}

int main( void ){    halInit();    moduleInit();        HAL_DISABLE_INTERRUPTS();    printf("/r/n****************************************************/r/n");        printf("Simple Application Example - END DEVICE/r/n");      uint16_t vlo = calibrateVlo();    printf("VLO = %u Hz/r/n", vlo);       timerIsr = &handleTimer;      clearLeds();    HAL_ENABLE_INTERRUPTS();        /* Most of the of infoMessage are the same, so we can create most of the message ahead of time. */    hdr.sequence = 0;  //this will be incremented each message    hdr.version = INFO_MESSAGE_VERSION;    hdr.flags = INFO_MESSAGE_FLAGS_NONE;        initializeSensors();    delayMs(100);    stateMachine();}

// Set the priority in the interrupt control register.// Disable all interrupts while we access the hardware registers.static void hal_update_interrupt_controller(int vector){    cyg_uint32 index;    cyg_uint8 level;    cyg_uint32 vec_offset;    cyg_uint32 icr, icr_msk_offset, icr_msk, icr_val, icr_oldval;    CYG_INTERRUPT_STATE intr_state;        HAL_TRANSLATE_VECTOR(vector, index);     level = cyg_hal_IMASK_table[index] ? cyg_hal_ILVL_table[index] : 0;    vec_offset = (vector) - HAL_PROG_INT_VEC_BASE - 1;    icr = vec_offset / 8;    icr_msk_offset = ((8-1)*4) - (vec_offset % 8) * 4;    icr_msk = 0x0F << (icr_msk_offset);    icr_val = (0x08 | (level & 0x07)) << icr_msk_offset;        HAL_DISABLE_INTERRUPTS(intr_state);    HAL_READ_UINT32(&MCF5272_DEVS->intc.icr[icr], icr_oldval);    icr_val |= icr_oldval & 0x77777777 & ~icr_msk;    HAL_WRITE_UINT32(&MCF5272_DEVS->intc.icr[icr], icr_val);    HAL_RESTORE_INTERRUPTS(intr_state);}

static bool MCF5272_uart_putc(serial_channel *chan, unsigned char c){    CYG_INTERRUPT_STATE int_state;    MCF5272_uart_info_t *port = (MCF5272_uart_info_t *)chan->dev_priv;    /* Make sure the transmitter is not full. If it is full, return false. */    if  (!(MCF5272_UART_READ(port->base->usr_ucsr) & MCF5272_UART_USR_TXRDY))        return false;    /* Enable transmit interrupt. */    HAL_DISABLE_INTERRUPTS(int_state);    port->imr_mirror |= MCF5272_UART_UIMR_TXRDY;    MCF5272_UART_WRITE(port->base->uisr_uimr, port->imr_mirror);    HAL_RESTORE_INTERRUPTS(int_state);    /* Enable the UART transmit. */    MCF5272_UART_WRITE(port->base->ucr, MCF5272_UART_UCR_TXRXEN);	/* Send the character */    MCF5272_UART_WRITE(port->base->urb_utb, c);	return true ;}

/****************************************************************************************************** MCF5272_uart_stop_xmit() - Disable the transmitter on the device INPUT:    chan - pointer to the serial private data.*/static void MCF5272_uart_stop_xmit(serial_channel * chan){	   CYG_INTERRUPT_STATE int_state;   MCF5272_uart_info_t * port = (MCF5272_uart_info_t *) chan->dev_priv;   /* Disable transmit interrupt */   HAL_DISABLE_INTERRUPTS(int_state);   port->imr_mirror &= ~MCF5272_UART_UIMR_TXRDY;   MCF5272_UART_WRITE(port->base->uisr_uimr, port->imr_mirror);   HAL_RESTORE_INTERRUPTS(int_state);   /* Disable the UART transmit.      !!!!!!!!!!!!!      !!!WARNING!!!      !!!!!!!!!!!!!      If the transmit the disabe      the diag_printf routines will poll forever to transmit the      a character. Hence, don't ever disable the transmit if      we want it to work with diag_printf.   */   //MCF5272_UART_WRITE(port->base->ucr, MCF5272_UART_UCR_TXDE);}

int main( void ){    halInit();    HAL_DISABLE_INTERRUPTS();    printf("/r/n****************************************************/r/n");        printf("Simple Application Example - END DEVICE - using AFZDO/r/n");#ifdef SEND_MESSAGE_ON_TIMER        unsigned int vlo = calibrateVlo();    printf("VLO = %u Hz/r/n", vlo);       timerIsr = &handleTimer;      printf("Send message on timer enabled./r/n");    #endif    #ifdef SEND_MESSAGE_ON_MOTION    printf("Send message on motion enabled./r/n");        halSpiInitAccelerometer();  //note: this puts the SPI port in a non-ZNP configuration; must init it for ZNP afterwards    writeAccelerometerRegister(ACCEL_CTRL, G_RANGE_2 | I2C_DIS | MODE_MD_10 | MDET_NO_EXIT);    // Configure Accelerometer    delayUs(ACCELEROMETER_DELAY_BETWEEN_OPERATIONS_US);                                         // 11 bit-time delay required when using SPI    readAccelerometerRegister(ACCEL_INT_STATUS);  // clear the interrupt    accelerometerIsr = &handleAccelerometer;    halEnableAccelerometerInterrupt(WAKEUP_AFTER_ACCELEROMETER);#endif        HAL_ENABLE_INTERRUPTS();        //create the infoMessage. Most of these fields are the same, so we can create most of the message ahead of time.     hdr.sequence = 0;  //this will be incremented each message    hdr.version = INFO_MESSAGE_VERSION;    hdr.flags = INFO_MESSAGE_FLAGS_NONE;    im.header = &hdr;  //Note, if you have multiple similar message types then you can use the same header for all    im.deviceType = DEVICETYPE_SMITH_ELECTRONCS_ROUTER_DEMO;    im.deviceSubType = DEVICESUBTYPE_SMITH_ELECTRONCS_ROUTER_DEMO;    im.numParameters = 3;                    //run the state machine    stateMachine();}

void intr_main( void ){    CYG_INTERRUPT_STATE oldints;    cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_RTC, 1,                             ISR_DATA, isr, dsr, &intr_handle, &intr);    cyg_drv_interrupt_attach(intr_handle);    HAL_CLOCK_INITIALIZE( CYGNUM_HAL_RTC_PERIOD );    cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_RTC);    HAL_ENABLE_INTERRUPTS();    while( ticks < 10 )    {            }    CYG_TEST_CHECK( dsr_ticks == 10, "DSR not called sufficient times");        HAL_DISABLE_INTERRUPTS(oldints);    CYG_TEST_PASS_FINISH("HAL interrupt test");}

static voidcyg_hal_diag_mangler_gdb_flush(void* __ch_data){    CYG_INTERRUPT_STATE old;    hal_virtual_comm_table_t* __chan = CYGACC_CALL_IF_DEBUG_PROCS();#if CYGNUM_HAL_DEBUG_GDB_PROTOCOL_RETRIES != 0    int tries = CYGNUM_HAL_DEBUG_GDB_PROTOCOL_RETRIES;#endif    // Nothing to do if mangler buffer is empty.    if (__mangler_pos == 0)        return;    // Disable interrupts. This prevents GDB trying to interrupt us    // while we are in the middle of sending a packet. The serial    // receive interrupt will be seen when we re-enable interrupts    // later.#if defined(CYG_HAL_STARTUP_ROM) /    || !defined(CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION)    HAL_DISABLE_INTERRUPTS(old);#else    CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old);#endif        #if CYGNUM_HAL_DEBUG_GDB_PROTOCOL_RETRIES != 0    // Only wait 500ms for data to arrive - avoid "stuck" connections    CYGACC_COMM_IF_CONTROL(*__chan, __COMMCTL_SET_TIMEOUT, CYGNUM_HAL_DEBUG_GDB_PROTOCOL_TIMEOUT);#endif    while(1)    {	static const char hex[] = "0123456789ABCDEF";	cyg_uint8 csum = 0;	char c1;	int i;        	CYGACC_COMM_IF_PUTC(*__chan, '$');	CYGACC_COMM_IF_PUTC(*__chan, 'O');	csum += 'O';	for( i = 0; i < __mangler_pos; i++ )        {	    char ch = __mangler_line[i];	    char h = hex[(ch>>4)&0xF];	    char l = hex[ch&0xF];	    CYGACC_COMM_IF_PUTC(*__chan, h);	    CYGACC_COMM_IF_PUTC(*__chan, l);	    csum += h;	    csum += l;	}	CYGACC_COMM_IF_PUTC(*__chan, '#');	CYGACC_COMM_IF_PUTC(*__chan, hex[(csum>>4)&0xF]);	CYGACC_COMM_IF_PUTC(*__chan, hex[csum&0xF]);    nak:#if CYGNUM_HAL_DEBUG_GDB_PROTOCOL_RETRIES != 0	if (CYGACC_COMM_IF_GETC_TIMEOUT(*__chan, &c1) == 0) {	    c1 = '-';	    if (tries && (--tries == 0)) c1 = '+';	}#else	c1 = CYGACC_COMM_IF_GETC(*__chan);#endif	if( c1 == '+' ) break;	if( cyg_hal_is_break( &c1 , 1 ) ) {	    // Caller's responsibility to react on this.	    CYGACC_CALL_IF_CONSOLE_INTERRUPT_FLAG_SET(1);	    break;	}	if( c1 != '-' ) goto nak;    }    __mangler_pos = 0;    // And re-enable interrupts#if defined(CYG_HAL_STARTUP_ROM) /    || !defined(CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION)    HAL_RESTORE_INTERRUPTS(old);#else    CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old);#endif}

void hal_diag_write_char(char c){    static char line[100];    static int pos = 0;    // No need to send CRs    if( c == '/r' ) return;    line[pos++] = c;    if( c == '/n' || pos == sizeof(line) )    {        CYG_INTERRUPT_STATE old;        // Disable interrupts. This prevents GDB trying to interrupt us        // while we are in the middle of sending a packet. The serial        // receive interrupt will be seen when we re-enable interrupts        // later.        #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS        CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old);#else        HAL_DISABLE_INTERRUPTS(old);#endif        while(1)        {            static char hex[] = "0123456789ABCDEF";            cyg_uint8 csum = 0;            int i;            char c1;                    cyg_hal_plf_serial_putc(0, '$');            cyg_hal_plf_serial_putc(0, 'O');            csum += 'O';            for( i = 0; i < pos; i++ )            {                char ch = line[i];                char h = hex[(ch>>4)&0xF];                char l = hex[ch&0xF];                cyg_hal_plf_serial_putc(0, h);                cyg_hal_plf_serial_putc(0, l);                csum += h;                csum += l;            }            cyg_hal_plf_serial_putc(0, '#');            cyg_hal_plf_serial_putc(0, hex[(csum>>4)&0xF]);            cyg_hal_plf_serial_putc(0, hex[csum&0xF]);            // Wait for the ACK character '+' from GDB here and handle            // receiving a ^C instead.  This is the reason for this clause            // being a loop.            c1 = cyg_hal_plf_serial_getc(0);            if( c1 == '+' )                break;              // a good acknowledge#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && /    defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)            cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1);            if( c1 == 3 ) {                // Ctrl-C: breakpoint.                cyg_hal_gdb_interrupt (__builtin_return_address(0));                break;            }#endif            // otherwise, loop round again        }                pos = 0;        // And re-enable interrupts#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS        CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old);#else        HAL_RESTORE_INTERRUPTS(old);#endif    }

/************************************************************************************************** * @fn          halAssertHazardLights * * @brief       Blink LEDs to indicate an error. * * @param       none * * @return      none ************************************************************************************************** */void halAssertHazardLights(void){  enum  {    DEBUG_DATA_RSTACK_HIGH_OFS,    DEBUG_DATA_RSTACK_LOW_OFS,    DEBUG_DATA_TX_ACTIVE_OFS,    DEBUG_DATA_RX_ACTIVE_OFS,#if (defined HAL_MCU_AVR) || (defined HAL_MCU_CC2430)    DEBUG_DATA_INT_MASK_OFS,#elif (defined HAL_MCU_CC2530) || (defined HAL_MCU_CC2533)    DEBUG_DATA_INT_MASK0_OFS,    DEBUG_DATA_INT_MASK1_OFS,#endif    DEBUG_DATA_SIZE  };  uint8 buttonHeld;  uint8 debugData[DEBUG_DATA_SIZE];  /* disable all interrupts before anything else */  HAL_DISABLE_INTERRUPTS();  /*-------------------------------------------------------------------------------   *  Initialize LEDs and turn them off.   */  HAL_BOARD_INIT();  HAL_TURN_OFF_LED1();  HAL_TURN_OFF_LED2();  HAL_TURN_OFF_LED3();  HAL_TURN_OFF_LED4();  /*-------------------------------------------------------------------------------   *  Master infinite loop.   */  for (;;)  {    buttonHeld = 0;    /*-------------------------------------------------------------------------------     *  "Hazard lights" loop.  A held keypress will exit this loop.     */    do    {      HAL_LED_BLINK_DELAY();      /* toggle LEDS, the #ifdefs are in case HAL has logically remapped non-existent LEDs */#if (HAL_NUM_LEDS >= 1)      HAL_TOGGLE_LED1();#if (HAL_NUM_LEDS >= 2)      HAL_TOGGLE_LED2();#if (HAL_NUM_LEDS >= 3)      HAL_TOGGLE_LED3();#if (HAL_NUM_LEDS >= 4)      HAL_TOGGLE_LED4();#endif#endif#endif#endif      /* escape hatch to continue execution, set escape to '1' to continue execution */      {        static uint8 escape = 0;        if (escape)        {          escape = 0;          return;        }      }      /* break out of loop if button is held long enough */      if (HAL_PUSH_BUTTON1())      {        buttonHeld++;      }      else      {        buttonHeld = 0;      }    }    while (buttonHeld != 10);  /* loop until button is held specified number of loops */    /*-------------------------------------------------------------------------------     *  Just exited from "hazard lights" loop.     */    /* turn off all LEDs *///.........这里部分代码省略.........

/********************************************************************* * @fn      Onboard_soft_reset * * @brief   Effect a soft reset. * * @param   none * * @return  none * *********************************************************************/void Onboard_soft_reset( void ){  HAL_DISABLE_INTERRUPTS();  asm("MOV &0FFFEh,PC");}

/********************************************************************* * @fn      Onboard_soft_reset * * @brief   Effect a soft reset. * * @param   none * * @return  none * *********************************************************************/__near_func void Onboard_soft_reset( void ){  HAL_DISABLE_INTERRUPTS();  asm("LJMP 0x0");}

/******************************************************************************* * @fn          halSleep * * @brief       This function is called from the OSAL task loop using and *              existing OSAL interface.  It sets the low power mode of the LL *              and the CC2540. * * input parameters * * @param       osal_timeout - Next OSAL timer timeout, in msec. * * output parameters * * @param       None. * * @return      None. */void halSleep( uint32 osal_timeout ){  uint32 timeout;  uint32 llTimeout;  uint32 sleepTimer;  halDriverBegPM();#ifdef DEBUG_GPIO  // TEMP  P1_0 = 1;#endif // DEBUG_GPIO  if (osal_timeout > MAX_16BIT_TIMEOUT)  {    osal_timeout = MAX_16BIT_TIMEOUT;  }  // get LL timeout value already converted to 32kHz ticks  LL_TimeToNextRfEvent( &sleepTimer, &llTimeout );  // check if no OSAL timeout  // Note: If the next wake event is due to an OSAL timeout, then wakeForRF  //       will already be FALSE, and the call to LL_TimeToNExtRfEvent will  //       already have taken a snapshot of the Sleep Timer.  if (osal_timeout == 0)  {    // use common variable    timeout = llTimeout;    // check if there's time before the next radio event    // Note: Since the OSAL timeout is zero, then if the radio timeout is    //       not zero, the next wake (if one) will be due to the radio event.    wakeForRF = (timeout != 0) ? TRUE : FALSE;  }  else // OSAL timeout is non-zero  {    // convet OSAL timeout to sleep time    // Note: Could be early by one 32kHz timer tick due to rounding.    timeout = HAL_SLEEP_MS_TO_32KHZ( osal_timeout );    // so check time to radio event is non-zero, and if so, use shorter value    if ((llTimeout != 0) && (llTimeout < timeout))    {      // use common variable      timeout = llTimeout;      // the next ST wake time is due to radio      wakeForRF = TRUE;    }    else // OSAL timeout will be used to wake    {      // so take a snapshot of the sleep timer for sleep based on OSAL timeout      sleepTimer = halSleepReadTimer();      // the next ST wake time is not due to radio      wakeForRF = FALSE;    }  }  // HAL_SLEEP_PM3 is entered only if the timeout is zero  halPwrMgtMode = (timeout == 0) ? HAL_SLEEP_DEEP : HAL_SLEEP_TIMER;#ifdef DEBUG_GPIO  // TEMP  P1_0 = 0;#endif // DEBUG_GPIO  // check if sleep should be entered  if ( (timeout > PM_MIN_SLEEP_TIME) || (timeout == 0) )  {    halIntState_t ien0, ien1, ien2;#ifdef DEBUG_GPIO    // TEMP    P1_0 = 1;#endif // DEBUG_GPIO    HAL_ASSERT( HAL_INTERRUPTS_ARE_ENABLED() );    HAL_DISABLE_INTERRUPTS();    // check if radio allows sleep, and if so, preps system for shutdown    if ( LL_PowerOffReq(halPwrMgtMode) == LL_SLEEP_REQUEST_ALLOWED )//.........这里部分代码省略.........

static void entry0( cyg_addrword_t data ){    register CYG_INTERRUPT_STATE oldints;#ifdef HAL_CACHE_UNIFIED    HAL_DISABLE_INTERRUPTS(oldints);    HAL_DCACHE_PURGE_ALL();             // rely on above definition    HAL_UCACHE_INVALIDATE_ALL();    HAL_UCACHE_DISABLE();    HAL_RESTORE_INTERRUPTS(oldints);    CYG_TEST_INFO("Cache off");    time1();    HAL_DISABLE_INTERRUPTS(oldints);    HAL_DCACHE_PURGE_ALL();             // rely on above definition    HAL_UCACHE_INVALIDATE_ALL();    HAL_UCACHE_ENABLE();    HAL_RESTORE_INTERRUPTS(oldints);    CYG_TEST_INFO("Cache on");    time1();#ifdef HAL_DCACHE_INVALIDATE_ALL    HAL_DISABLE_INTERRUPTS(oldints);    HAL_DCACHE_PURGE_ALL();    HAL_UCACHE_INVALIDATE_ALL();    HAL_UCACHE_ENABLE();    HAL_RESTORE_INTERRUPTS(oldints);        CYG_TEST_INFO("Cache on: invalidate Cache (expect bogus timing)");    time1DI();#endif#else // HAL_CACHE_UNIFIED    HAL_DISABLE_INTERRUPTS(oldints);    HAL_DCACHE_PURGE_ALL();    HAL_ICACHE_INVALIDATE_ALL();    HAL_DCACHE_INVALIDATE_ALL();    HAL_ICACHE_DISABLE();    HAL_DCACHE_DISABLE();    HAL_RESTORE_INTERRUPTS(oldints);    CYG_TEST_INFO("Dcache off Icache off");    time1();    HAL_DISABLE_INTERRUPTS(oldints);    HAL_DCACHE_PURGE_ALL();    HAL_ICACHE_INVALIDATE_ALL();    HAL_DCACHE_INVALIDATE_ALL();    HAL_ICACHE_DISABLE();    HAL_DCACHE_ENABLE();    HAL_RESTORE_INTERRUPTS(oldints);        CYG_TEST_INFO("Dcache on  Icache off");    time1();    HAL_DISABLE_INTERRUPTS(oldints);    HAL_DCACHE_PURGE_ALL();    HAL_ICACHE_INVALIDATE_ALL();    HAL_DCACHE_INVALIDATE_ALL();    HAL_ICACHE_ENABLE();    HAL_DCACHE_DISABLE();    HAL_RESTORE_INTERRUPTS(oldints);        CYG_TEST_INFO("Dcache off Icache on");    time1();    HAL_DISABLE_INTERRUPTS(oldints);    HAL_DCACHE_PURGE_ALL();    HAL_ICACHE_INVALIDATE_ALL();    HAL_DCACHE_INVALIDATE_ALL();    HAL_ICACHE_ENABLE();    HAL_DCACHE_ENABLE();    HAL_RESTORE_INTERRUPTS(oldints);        CYG_TEST_INFO("Dcache on Icache on");    time1();    HAL_DISABLE_INTERRUPTS(oldints);    HAL_DCACHE_PURGE_ALL();    HAL_ICACHE_INVALIDATE_ALL();    HAL_DCACHE_INVALIDATE_ALL();    HAL_ICACHE_DISABLE();    HAL_DCACHE_DISABLE();    HAL_RESTORE_INTERRUPTS(oldints);        CYG_TEST_INFO("Dcache off Icache off (again)");    time1();#if defined(HAL_DCACHE_INVALIDATE_ALL) || defined(HAL_ICACHE_INVALIDATE_ALL)    HAL_DISABLE_INTERRUPTS(oldints);    HAL_DCACHE_PURGE_ALL();    HAL_ICACHE_INVALIDATE_ALL();    HAL_DCACHE_INVALIDATE_ALL();    HAL_ICACHE_ENABLE();    HAL_DCACHE_ENABLE();    HAL_RESTORE_INTERRUPTS(oldints);        CYG_TEST_INFO("Dcache on Icache on (again)");    time1();#if defined(CYGPKG_HAL_MIPS)    // In some architectures, the time taken for the next two tests is    // very long, partly because HAL_XCACHE_INVALIDATE_ALL() is implemented    // with a loop over the cache. Hence these tests take longer than the//.........这里部分代码省略.........