自学教程：C++ AT91C_PIN_PA函数代码示例

void at91_spi0_hw_init(void){	/* Configure spi0 PINs */	const struct pio_desc spi0_pins[] = {		{"MISO",	AT91C_PIN_PA(0),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"MOSI",	AT91C_PIN_PA(1),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPCK",	AT91C_PIN_PA(2),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"NPCS",	CONFIG_SYS_SPI_PCS,	1, PIO_PULLUP, PIO_OUTPUT},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	/* Configure the spi0 pins */	pio_configure(spi0_pins);#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)	pmc_enable_periph_clock(AT91C_ID_PIOA);#endif#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)	pmc_enable_periph_clock(AT91C_ID_PIOA);	pmc_enable_periph_clock(AT91C_ID_PIOC);#endif	/* Enable the spi0 clock */	pmc_enable_periph_clock(AT91C_ID_SPI0);}

/*------------------------------------------------------------------------------*/static void nand_recovery(void){    /*     * Configure PIOs      */    const struct pio_desc bp4_pio[] = {        {"BP4", AT91C_PIN_PA(31), 0, PIO_PULLUP, PIO_INPUT},        {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},    };    /*     * Configure the PIO controller      */    writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);    pio_setup(bp4_pio);    /*     * If BP4 is pressed during Boot sequence      */    /*     * Erase NandFlash block 0     */    if (!pio_get_value(AT91C_PIN_PA(31)))        AT91F_NandEraseBlock0();}

/*------------------------------------------------------------------------------*/void df_recovery(AT91PS_DF pDf){#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)    /*     * Configure PIOs      */    const struct pio_desc bp4_pio[] = {        {"BP4", AT91C_PIN_PA(31), 0, PIO_PULLUP, PIO_INPUT},        {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},    };    /*     * Configure the PIO controller      */    writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);    pio_setup(bp4_pio);    /*     * If BP4 is pressed during Boot sequence      */    /*     * Erase NandFlash block 0     */    if (!pio_get_value(AT91C_PIN_PA(31)))        df_page_erase(pDf, 0);#endif}

void df_cs_deactive(int cs){	switch (cs) {	case 0:		pio_set_value(AT91C_PIN_PA(14), 1);		break;	case 1:		pio_set_value(AT91C_PIN_PA(7), 1);		break;	}}

static void gmac1_hw_init(void){	const struct pio_desc macb_pins[] = {		{"G1_MDC",	AT91C_PIN_PA(22), 0, PIO_DEFAULT, PIO_PERIPH_B},		{"G1_MDIO",	AT91C_PIN_PA(23), 0, PIO_DEFAULT, PIO_PERIPH_B},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	pio_configure(macb_pins);	pmc_enable_periph_clock(AT91C_ID_PIOA);}

static void at91_dbgu_hw_init(void){	/* Configure DBGU pins */	const struct pio_desc dbgu_pins[] = {		{"RXD", AT91C_PIN_PA(9), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"TXD", AT91C_PIN_PA(10), 0, PIO_DEFAULT, PIO_PERIPH_A},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	pmc_enable_periph_clock(AT91C_ID_PIOA_B);	pio_configure(dbgu_pins);}

static void at91_dbgu_hw_init(void){	/* Configure DBGU pins */	const struct pio_desc dbgu_pins[] = {		{"RXD", AT91C_PIN_PA(9), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"TXD", AT91C_PIN_PA(10), 0, PIO_DEFAULT, PIO_PERIPH_A},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	pio_configure(dbgu_pins);	writel((1 << AT91C_ID_PIOA_B), (PMC_PCER + AT91C_BASE_PMC));}

static void at91_twi0_hw_init(void){	const struct pio_desc twi_pins[] = {		{"TWD0", AT91C_PIN_PA(30), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"TWCK0", AT91C_PIN_PA(31), 0, PIO_DEFAULT, PIO_PERIPH_A},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	pmc_enable_periph_clock(AT91C_ID_PIOA);	pio_configure(twi_pins);	pmc_enable_periph_clock(AT91C_ID_TWI0);}

void at91_spi0_hw_init(void){	const struct pio_desc spi_pins[] = {		{"SPI0_SPCK",	AT91C_PIN_PA(14), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPI0_MOSI",	AT91C_PIN_PA(15), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPI0_MISO",	AT91C_PIN_PA(16), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPI0_NPCS",	CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	pio_configure(spi_pins);	pmc_sam9x5_enable_periph_clk(CONFIG_SYS_ID_SPI);}

void at91_spi0_hw_init(void){	/* Configure PINs for SPI0 */	const struct pio_desc spi0_pins[] = {		{"MISO",	AT91C_PIN_PA(11),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"MOSI",	AT91C_PIN_PA(12),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPCK",	AT91C_PIN_PA(13),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"NPCS",	CONFIG_SYS_SPI_PCS,	1, PIO_DEFAULT, PIO_OUTPUT},		{(char *)0,	0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	pmc_enable_periph_clock(AT91C_ID_PIOA_B);	pio_configure(spi0_pins);	pmc_enable_periph_clock(AT91C_ID_SPI0);}

void at91_spi0_hw_init(void){	/* Configure PINs for SPI0 */	const struct pio_desc spi0_pins[] = {		{"MISO",	AT91C_PIN_PA(11),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"MOSI",	AT91C_PIN_PA(12),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPCK",	AT91C_PIN_PA(13),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"NPCS",	CONFIG_SYS_SPI_PCS,	1, PIO_DEFAULT, PIO_OUTPUT},		{(char *)0,	0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	writel((1 << AT91C_ID_PIOA_B), (PMC_PCER + AT91C_BASE_PMC));	pio_configure(spi0_pins);	writel((1 << AT91C_ID_SPI0), (PMC_PCER + AT91C_BASE_PMC));}

unsigned int at91_twi0_hw_init(void){	unsigned int base_addr = AT91C_BASE_TWI0;	const struct pio_desc twi_pins[] = {		{"TWD0", AT91C_PIN_PA(30), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"TWCK0", AT91C_PIN_PA(31), 0, PIO_DEFAULT, PIO_PERIPH_A},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	pmc_enable_periph_clock(AT91C_ID_PIOA);	pio_configure(twi_pins);	pmc_enable_periph_clock(AT91C_ID_TWI0);	return base_addr;}

unsigned int at91_eth1_hw_init(void){	unsigned int base_addr = AT91C_BASE_GMAC1;	const struct pio_desc macb_pins[] = {		{"G1_MDC",	AT91C_PIN_PA(22), 0, PIO_DEFAULT, PIO_PERIPH_B},		{"G1_MDIO",	AT91C_PIN_PA(23), 0, PIO_DEFAULT, PIO_PERIPH_B},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	pio_configure(macb_pins);	pmc_enable_periph_clock(AT91C_ID_PIOA);	pmc_enable_periph_clock(AT91C_ID_GMAC1);	return base_addr;}

void nandflash_hw_init(void){	const struct pio_desc nand_pins[] = {		{"NANDOE", CONFIG_SYS_NAND_OE_PIN, 0, PIO_PULLUP, PIO_PERIPH_F},		{"NANDWE", CONFIG_SYS_NAND_WE_PIN, 0, PIO_PULLUP, PIO_PERIPH_F},		{"NANDALE", CONFIG_SYS_NAND_ALE_PIN, 0, PIO_PULLUP, PIO_PERIPH_F},		{"NANDCLE", CONFIG_SYS_NAND_CLE_PIN, 0, PIO_PULLUP, PIO_PERIPH_F},		{"NANDCS", CONFIG_SYS_NAND_ENABLE_PIN, 1, PIO_DEFAULT, PIO_OUTPUT},		{"D0", AT91C_PIN_PA(0), 0, PIO_PULLUP, PIO_PERIPH_F},		{"D1", AT91C_PIN_PA(1), 0, PIO_PULLUP, PIO_PERIPH_F},		{"D2", AT91C_PIN_PA(2), 0, PIO_PULLUP, PIO_PERIPH_F},		{"D3", AT91C_PIN_PA(3), 0, PIO_PULLUP, PIO_PERIPH_F},		{"D4", AT91C_PIN_PA(4), 0, PIO_PULLUP, PIO_PERIPH_F},		{"D5", AT91C_PIN_PA(5), 0, PIO_PULLUP, PIO_PERIPH_F},		{"D6", AT91C_PIN_PA(6), 0, PIO_PULLUP, PIO_PERIPH_F},		{"D7", AT91C_PIN_PA(7), 0, PIO_PULLUP, PIO_PERIPH_F},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	pio_configure(nand_pins);	pmc_sam9x5_enable_periph_clk(AT91C_ID_HSMC);	/* EBI Configuration Register */	writel((AT91C_EBICFG_DRIVE0_HIGH |		AT91C_EBICFG_PULL0_NONE |		AT91C_EBICFG_DRIVE1_HIGH |		AT91C_EBICFG_PULL1_NONE), SFR_EBICFG + AT91C_BASE_SFR);	/* Configure SMC CS3 for NAND/SmartMedia */	writel(AT91C_SMC_SETUP_NWE(1) |	       AT91C_SMC_SETUP_NCS_WR(1) |	       AT91C_SMC_SETUP_NRD(1) |	       AT91C_SMC_SETUP_NCS_RD(1), (ATMEL_BASE_SMC + SMC_SETUP3));	writel(AT91C_SMC_PULSE_NWE(2) |	       AT91C_SMC_PULSE_NCS_WR(3) |	       AT91C_SMC_PULSE_NRD(2) |	       AT91C_SMC_PULSE_NCS_RD(3), (ATMEL_BASE_SMC + SMC_PULSE3));	writel(AT91C_SMC_CYCLE_NWE(5) |	       AT91C_SMC_CYCLE_NRD(5), (ATMEL_BASE_SMC + SMC_CYCLE3));	writel(AT91C_SMC_TIMINGS_TCLR(2) |	       AT91C_SMC_TIMINGS_TADL(7) |	       AT91C_SMC_TIMINGS_TAR(2) |	       AT91C_SMC_TIMINGS_TRR(3) |	       AT91C_SMC_TIMINGS_TWB(7) |	       AT91C_SMC_TIMINGS_RBNSEL(2) |	       AT91C_SMC_TIMINGS_NFSEL, (ATMEL_BASE_SMC + SMC_TIMINGS3));	writel(AT91C_SMC_MODE_READMODE_NRD_CTRL |	       AT91C_SMC_MODE_WRITEMODE_NWE_CTRL |	       AT91C_SMC_MODE_DBW_8 |	       AT91C_SMC_MODE_TDF_CYCLES(1), (ATMEL_BASE_SMC + SMC_MODE3));}

void at91_spi0_hw_init(void){#if defined(CONFIG_SPI_BUS0)#if defined(CONFIG_SPI0_IOSET_1)	const struct pio_desc spi_pins[] = {		{"SPI0_SPCK",	AT91C_PIN_PA(14), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPI0_MOSI",	AT91C_PIN_PA(15), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPI0_MISO",	AT91C_PIN_PA(16), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPI0_NPCS",	CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};#elif defined(CONFIG_SPI0_IOSET_2)	const struct pio_desc spi_pins[] = {		{"SPI0_SPCK",	AT91C_PIN_PB(1), 0, PIO_DEFAULT, PIO_PERIPH_C},		{"SPI0_MOSI",	AT91C_PIN_PB(0), 0, PIO_DEFAULT, PIO_PERIPH_C},		{"SPI0_MISO",	AT91C_PIN_PA(31), 0, PIO_DEFAULT, PIO_PERIPH_C},		{"SPI0_NPCS",	CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};#else#error "No SPI0 IOSET defined"#endif#elif defined(CONFIG_SPI_BUS1)#if defined(CONFIG_SPI1_IOSET_1)	const struct pio_desc spi_pins[] = {		{"SPI1_SPCK",	AT91C_PIN_PC(1), 0, PIO_DEFAULT, PIO_PERIPH_D},		{"SPI1_MOSI",	AT91C_PIN_PC(2), 0, PIO_DEFAULT, PIO_PERIPH_D},		{"SPI1_MISO",	AT91C_PIN_PC(3), 0, PIO_DEFAULT, PIO_PERIPH_D},		{"SPI1_NPCS",	CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};#elif defined(CONFIG_SPI1_IOSET_2)	const struct pio_desc spi_pins[] = {		{"SPI1_SPCK",	AT91C_PIN_PA(22), 0, PIO_DEFAULT, PIO_PERIPH_D},		{"SPI1_MOSI",	AT91C_PIN_PA(23), 0, PIO_DEFAULT, PIO_PERIPH_D},		{"SPI1_MISO",	AT91C_PIN_PA(24), 0, PIO_DEFAULT, PIO_PERIPH_D},		{"SPI1_NPCS",	CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};#elif defined(CONFIG_SPI1_IOSET_3)	const struct pio_desc spi_pins[] = {		{"SPI1_SPCK",	AT91C_PIN_PD(25), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPI1_MOSI",	AT91C_PIN_PD(26), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPI1_MISO",	AT91C_PIN_PD(27), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPI1_NPCS",	CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};#else#error "No SPI1 IOSET defined"#endif#else#error "No SPI Bus defined"#endif	pio_configure(spi_pins);	pmc_sam9x5_enable_periph_clk(CONFIG_SYS_ID_SPI);}

void at91_spi0_hw_init(void){	/* Configure spi0 PINs */	const struct pio_desc spi0_pins[] = {		{"MISO",	AT91C_PIN_PA(25),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"MOSI",	AT91C_PIN_PA(26),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPCK",	AT91C_PIN_PA(27),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"NPCS",	CONFIG_SYS_SPI_PCS,	1, PIO_PULLUP, PIO_OUTPUT},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	/* Configure the spi0 pins */	pmc_enable_periph_clock(AT91C_ID_PIOA);	pio_configure(spi0_pins);	/* Enable the spi0 clock */	pmc_enable_periph_clock(AT91C_ID_SPI);}

/*------------------------------------------------------------------------------*/void df_hw_init(void){    /*     * Configure PIOs      */    const struct pio_desc df_pio[] = {        {"MISO", AT91C_PIN_PA(25), 0, PIO_DEFAULT, PIO_PERIPH_A},        {"MOSI", AT91C_PIN_PA(26), 0, PIO_DEFAULT, PIO_PERIPH_A},        {"SPCK", AT91C_PIN_PA(27), 0, PIO_DEFAULT, PIO_PERIPH_A},        {"NPCS0", AT91C_PIN_PA(28), 0, PIO_DEFAULT, PIO_PERIPH_A},        {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},    };    /*     * Configure the PIO controller      */    pio_setup(df_pio);}

void at91_spi0_hw_init(void){	/* Configure spi0 PINs */	const struct pio_desc spi0_pins[] = {		{"MISO",	AT91C_PIN_PA(0),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"MOSI",	AT91C_PIN_PA(1),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"SPCK",	AT91C_PIN_PA(2),	0, PIO_DEFAULT, PIO_PERIPH_A},		{"NPCS",	CONFIG_SYS_SPI_PCS,	1, PIO_PULLUP, PIO_OUTPUT},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	/* Configure the spi0 pins */	pio_configure(spi0_pins);	writel(((1 << AT91C_ID_PIOA) | (1 << AT91C_ID_PIOC)), (PMC_PCER + AT91C_BASE_PMC));	/* Enable the spi0 clock */	writel((1 << AT91C_ID_SPI0), (PMC_PCER + AT91C_BASE_PMC));}

/*---------------------------------------------------------------------------*/void df_hw_init(void){    /*     * Configure PIOs for SPI0     */    const struct pio_desc df_pio[] = {	{"MISO", AT91C_PIN_PA(11), 0, PIO_DEFAULT, PIO_PERIPH_A},	{"MOSI", AT91C_PIN_PA(12), 0, PIO_DEFAULT, PIO_PERIPH_A},	{"SPCK", AT91C_PIN_PA(13), 0, PIO_DEFAULT, PIO_PERIPH_A},	{"NPCS0", AT91C_PIN_PA(14), 1, PIO_DEFAULT, PIO_OUTPUT}, /* Using GPIO as cs pin, set 1 is disable */	{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},    };    /*     * Configure the PIO controller     */    writel((1 << AT91C_ID_PIOA_B), (PMC_PCER + AT91C_BASE_PMC));    pio_setup(df_pio);}

/*------------------------------------------------------------------------------*/void df_hw_init(void){    /*     * Configure PIOs      */    const struct pio_desc df_pio[] = {        {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},        {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},        {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)        {"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},#endif#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)        {"NPCS1", AT91C_PIN_PC(11), 0, PIO_DEFAULT, PIO_PERIPH_B},#endif        {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},    };    /*     * Configure the PIO controller      */    pio_setup(df_pio);}

void at91_mci0_hw_init(void){	const struct pio_desc mci_pins[] = {		{"MCCK",AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B},		{"MCCDA", AT91C_PIN_PA(1), 0, PIO_PULLUP, PIO_PERIPH_B},		{"MCDA0", AT91C_PIN_PA(0), 0, PIO_PULLUP, PIO_PERIPH_B},		{"MCDA1", AT91C_PIN_PA(4), 0, PIO_PULLUP, PIO_PERIPH_B},		{"MCDA2", AT91C_PIN_PA(5), 0, PIO_PULLUP, PIO_PERIPH_B},		{"MCDA3", AT91C_PIN_PA(6), 0, PIO_PULLUP, PIO_PERIPH_B},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_B},	};	pmc_enable_periph_clock(AT91C_ID_PIOA);	pio_configure(mci_pins);	/* Enable the clock */	pmc_enable_periph_clock(AT91C_ID_MCI);}

void at91_mci0_hw_init(void){	const struct pio_desc mci_pins[] = {		{"MCCK",AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B},		{"MCCDA", AT91C_PIN_PA(1), 0, PIO_PULLUP, PIO_PERIPH_B},		{"MCDA0", AT91C_PIN_PA(0), 0, PIO_PULLUP, PIO_PERIPH_B},		{"MCDA1", AT91C_PIN_PA(4), 0, PIO_PULLUP, PIO_PERIPH_B},		{"MCDA2", AT91C_PIN_PA(5), 0, PIO_PULLUP, PIO_PERIPH_B},		{"MCDA3", AT91C_PIN_PA(6), 0, PIO_PULLUP, PIO_PERIPH_B},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_B},	};	pio_configure(mci_pins);	writel((1 << AT91C_ID_PIOA), (PMC_PCER + AT91C_BASE_PMC));	/* Enable the clock */	writel((1 << AT91C_ID_MCI), (PMC_PCER + AT91C_BASE_PMC));}

void at91_mci0_hw_init(void){	const struct pio_desc mci_pins[] = {		{"MCCK", AT91C_PIN_PA(17), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCCDA", AT91C_PIN_PA(16), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA0", AT91C_PIN_PA(15), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA1", AT91C_PIN_PA(18), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA2", AT91C_PIN_PA(19), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA3", AT91C_PIN_PA(20), 0, PIO_PULLUP, PIO_PERIPH_A},		{(char *)0,	0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	/* Configure the PIO controller */	writel((1 << AT91C_ID_PIOA_B), (PMC_PCER + AT91C_BASE_PMC));	pio_configure(mci_pins);	/* Enable the clock */	writel((1 << AT91C_ID_MCI), (PMC_PCER + AT91C_BASE_PMC));}

void at91_mci0_hw_init(void){	const struct pio_desc mci_pins[] = {		{"MCCK", AT91C_PIN_PA(17), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCCDA", AT91C_PIN_PA(16), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA0", AT91C_PIN_PA(15), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA1", AT91C_PIN_PA(18), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA2", AT91C_PIN_PA(19), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA3", AT91C_PIN_PA(20), 0, PIO_PULLUP, PIO_PERIPH_A},		{(char *)0,	0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	/* Configure the PIO controller */	pmc_enable_periph_clock(AT91C_ID_PIOA_B);	pio_configure(mci_pins);	/* Enable the clock */	pmc_enable_periph_clock(AT91C_ID_HSMCI0);}

void at91_mci0_hw_init(void){	const struct pio_desc mci_pins[] = {		{"MCCK", 	AT91C_PIN_PA(0), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCCDA",	AT91C_PIN_PA(1), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA0",	AT91C_PIN_PA(2), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA1",	AT91C_PIN_PA(3), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA2",	AT91C_PIN_PA(4), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA3",	AT91C_PIN_PA(5), 0, PIO_PULLUP, PIO_PERIPH_A},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	/* Configure the PIO controller */	writel((1 << AT91C_ID_PIOA), (PMC_PCER + AT91C_BASE_PMC));	pio_configure(mci_pins);	/* Enable the clock */	writel((1 << AT91C_ID_MCI0), (PMC_PCER + AT91C_BASE_PMC));	/* Set of name function pointer */	sdcard_set_of_name = &sdcard_set_of_name_board;}

void at91_mci0_hw_init(void){	const struct pio_desc mci_pins[] = {		{"MCCK",	AT91C_PIN_PA(8), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCCDA",	AT91C_PIN_PA(7), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA0",	AT91C_PIN_PA(6), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA1",	AT91C_PIN_PA(9), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA2",	AT91C_PIN_PA(10), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCDA3",	AT91C_PIN_PA(11), 0, PIO_PULLUP, PIO_PERIPH_A},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	/* Configure the PIO controller */	pmc_enable_periph_clock(AT91C_ID_PIOA);	pio_configure(mci_pins);	/* Enable the clock */	pmc_enable_periph_clock(AT91C_ID_MCI);	/* Set of name function pointer */	sdcard_set_of_name = &sdcard_set_of_name_board;}

void at91_mci0_hw_init(void){	/* Note: For at91sam9263ek, using MCI1 instead of MCI0 as SD Card booting */	/* Configure the MCI1 pins */	const struct pio_desc mci_pins[] = {		{"MCI1_CK",	AT91C_PIN_PA(6), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCI1_CDA",	AT91C_PIN_PA(7), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCI1_DA0",	AT91C_PIN_PA(8), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCI1_DA1",	AT91C_PIN_PA(9), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCI1_DA2",	AT91C_PIN_PA(10), 0, PIO_PULLUP, PIO_PERIPH_A},		{"MCI1_DA3",	AT91C_PIN_PA(11), 0, PIO_PULLUP, PIO_PERIPH_A},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	pmc_enable_periph_clock(AT91C_ID_PIOA);	pio_configure(mci_pins);	/* Enable the clock */	pmc_enable_periph_clock(AT91C_ID_MCI1);	/* Set of name function pointer */	sdcard_set_of_name = &sdcard_set_of_name_board;}

void at91_sdhc_hw_init(void){#ifdef CONFIG_SDHC0	const struct pio_desc sdmmc_pins[] = {		{"SDMMC0_CK",   AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_CMD",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_DAT0", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_DAT1", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_DAT2", AT91C_PIN_PA(4), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_DAT3", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_DAT4", AT91C_PIN_PA(6), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_DAT5", AT91C_PIN_PA(7), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_DAT6", AT91C_PIN_PA(8), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_DAT7", AT91C_PIN_PA(9), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_RSTN", AT91C_PIN_PA(10), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"SDMMC0_VDDSEL", AT91C_PIN_PA(11), 0, PIO_DEFAULT, PIO_PERIPH_A},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};#endif#ifdef CONFIG_SDHC1	const struct pio_desc sdmmc_pins[] = {		{"SDMMC1_CD",	AT91C_PIN_PA(30), 0, PIO_DEFAULT, PIO_PERIPH_E},		{"SDMMC1_CMD",	AT91C_PIN_PA(28), 0, PIO_DEFAULT, PIO_PERIPH_E},		{"SDMMC1_CK",	AT91C_PIN_PA(22), 0, PIO_DEFAULT, PIO_PERIPH_E},		{"SDMMC1_DAT0",	AT91C_PIN_PA(18), 0, PIO_DEFAULT, PIO_PERIPH_E},		{"SDMMC1_DAT1",	AT91C_PIN_PA(19), 0, PIO_DEFAULT, PIO_PERIPH_E},		{"SDMMC1_DAT2",	AT91C_PIN_PA(20), 0, PIO_DEFAULT, PIO_PERIPH_E},		{"SDMMC1_DAT3",	AT91C_PIN_PA(21), 0, PIO_DEFAULT, PIO_PERIPH_E},		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};#endif	pio_configure(sdmmc_pins);	pmc_sam9x5_enable_periph_clk(CONFIG_SYS_ID_SDHC);	pmc_enable_periph_generated_clk(CONFIG_SYS_ID_SDHC,					GCK_CSS_UPLL_CLK,					ATMEL_SDHC_GCKDIV_VALUE);}

/*------------------------------------------------------------------------------*/void hw_init(void){    unsigned int cp15;    /*     * Configure PIOs      */    const struct pio_desc hw_pio[] = {#ifdef CONFIG_DEBUG        {"RXD", AT91C_PIN_PA(21), 0, PIO_DEFAULT, PIO_PERIPH_A},        {"TXD", AT91C_PIN_PA(22), 0, PIO_DEFAULT, PIO_PERIPH_A},#endif        {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},    };    /*     * Disable watchdog      */    writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);    /*     * At this stage the main oscillator is supposed to be enabled     * * PCK = MCK = MOSC      */    /*     * Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA      */    pmc_cfg_plla(PLL_SETTINGS, PLL_LOCK_TIMEOUT);    /*     * PCK = PLL = 2 * MCK      */    pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);    /*     * Switch MCK on PLLA output      */    pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);    /*     * Enable External Reset      */    writel(AT91C_RSTC_KEY_UNLOCK           || AT91C_RSTC_URSTEN, AT91C_BASE_RSTC + RSTC_RMR);    /*     * Configure CP15      */    cp15 = get_cp15();    //cp15 |= I_CACHE;    set_cp15(cp15);#ifdef CONFIG_SCLK    sclk_enable();#endif    /*     * Configure the PIO controller to output PCK0      */    pio_setup(hw_pio);#ifdef CONFIG_DEBUG    /*     * Enable Debug messages on the DBGU      */    dbgu_init(BAUDRATE(MASTER_CLOCK, 115200));    dbgu_print("Start AT91Bootstrap.../n/r");#endif                          /* CONFIG_VERBOSE */    /*     * Configure the EBI Slave Slot Cycle to 64      */    writel((readl((AT91C_MATRIX_SCFG4)) & ~0xFF) | 0x40, AT91C_MATRIX_SCFG4);    /*     * Initialize the matrix Slave 0 & Slave 4 (SRAM & EBI)     */    writel(readl(AT91C_MATRIX_SCFG0) | AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR |           AT91C_MATRIX_FIXED_DEFMSTR0_ARM926D, AT91C_MATRIX_SCFG0);    writel(readl(AT91C_MATRIX_SCFG4) | AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR |           AT91C_MATRIX_FIXED_DEFMSTR0_ARM926D, AT91C_MATRIX_SCFG4);#ifdef CONFIG_SDRAM    /*     * Initialize the matrix      */    writel(readl(AT91C_CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_CCFG_EBICSA);#ifdef MCK_100    /*     * Configure SDRAM Controller      */    sdram_init(AT91C_SDRAMC_NC_9 | AT91C_SDRAMC_NR_13 | AT91C_SDRAMC_CAS_2 | AT91C_SDRAMC_NB_4_BANKS | AT91C_SDRAMC_DBW_32_BITS | AT91C_SDRAMC_TWR_2 | AT91C_SDRAMC_TRC_7 | AT91C_SDRAMC_TRP_2 | AT91C_SDRAMC_TRCD_2 | AT91C_SDRAMC_TRAS_5 | AT91C_SDRAMC_TXSR_8,       /* Control Register */               (MASTER_CLOCK * 7) / 1000000,    /* Refresh Timer Register */               AT91C_SDRAMC_MD_SDRAM);  /* SDRAM (no low power)   */#else                           /* 133 MHz */    /*     * Configure SDRAM Controller      *///.........这里部分代码省略.........

/*----------------------------------------------------------------------------*/void hw_init(void){    unsigned int cp15;    /*     * Configure PIOs      */    const struct pio_desc hw_pio[] = {#ifdef CONFIG_DEBUG        {"RXD", AT91C_PIN_PA(9), 0, PIO_DEFAULT, PIO_PERIPH_A},        {"TXD", AT91C_PIN_PA(10), 0, PIO_DEFAULT, PIO_PERIPH_A},#endif        {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},    };    /*     * Disable watchdog      */    writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);    /*     * At this stage the main oscillator is supposed to be enabled     * * PCK = MCK = MOSC      */    writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);    /*     * Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA      */    pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);    /*     * PCK = PLLA/2 = 3 * MCK      */    pmc_cfg_mck(BOARD_PRESCALER_MAIN_CLOCK, PLL_LOCK_TIMEOUT);    /*     * Switch MCK on PLLA output      */    pmc_cfg_mck(BOARD_PRESCALER_PLLA, PLL_LOCK_TIMEOUT);    /*     * Enable External Reset      */    writel(AT91C_RSTC_KEY_UNLOCK           || AT91C_RSTC_URSTEN, AT91C_BASE_RSTC + RSTC_RMR);    /*     * Configure CP15      */    cp15 = get_cp15();    cp15 |= I_CACHE;    set_cp15(cp15);#ifdef CONFIG_SCLK    sclk_enable();#endif    /*     * Configure the PIO controller      */    writel((1 << AT91C_ID_PIOA_B), (PMC_PCER + AT91C_BASE_PMC));    pio_setup(hw_pio);    /*     * Enable Debug messages on the DBGU      */#ifdef CONFIG_DEBUG    dbgu_init(BAUDRATE(MASTER_CLOCK, 115200));    dbgu_print("Start AT91Bootstrap.../n/r");#endif#ifdef CONFIG_DDR2    /*     * Configure DDRAM Controller      */    dbg_log(1, "Init DDR... ");    ddramc_hw_init();    dbg_log(1, "Done!/n/r");#endif                          /* CONFIG_DDR2 */}