自学教程：C++ BEGIN_CS函数代码示例

void r300_emit_vertex_stream_state(struct r300_context* r300,                                   unsigned size, void* state){    struct r300_vertex_stream_state *streams =        (struct r300_vertex_stream_state*)state;    unsigned i;    CS_LOCALS(r300);    if (DBG_ON(r300, DBG_PSC)) {        fprintf(stderr, "r300: PSC emit:/n");        for (i = 0; i < streams->count; i++) {            fprintf(stderr, "    : prog_stream_cntl%d: 0x%08x/n", i,                   streams->vap_prog_stream_cntl[i]);        }        for (i = 0; i < streams->count; i++) {            fprintf(stderr, "    : prog_stream_cntl_ext%d: 0x%08x/n", i,                   streams->vap_prog_stream_cntl_ext[i]);        }    }    BEGIN_CS(size);    OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);    OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);    OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);    OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);    END_CS;}

void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state){    struct r300_fragment_shader *fs = r300_fs(r300);    struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;    unsigned count = fs->shader->externals_count;    unsigned i, j;    CS_LOCALS(r300);    if (count == 0)        return;    BEGIN_CS(size);    OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count * 4);    if (buf->remap_table){        for (i = 0; i < count; i++) {            float *data = (float*)&buf->ptr[buf->remap_table[i]*4];            for (j = 0; j < 4; j++)                OUT_CS(pack_float24(data[j]));        }    } else {        for (i = 0; i < count; i++)            for (j = 0; j < 4; j++)                OUT_CS(pack_float24(*(float*)&buf->ptr[i*4+j]));    }    END_CS;}

void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state){    struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;    struct pipe_framebuffer_state* fb =        (struct pipe_framebuffer_state*)r300->fb_state.state;    boolean is_r500 = r300->screen->caps.is_r500;    CS_LOCALS(r300);    uint32_t alpha_func = dsa->alpha_function;    /* Choose the alpha ref value between 8-bit (FG_ALPHA_FUNC.AM_VAL) and     * 16-bit (FG_ALPHA_VALUE). */    if (is_r500 && (alpha_func & R300_FG_ALPHA_FUNC_ENABLE)) {        struct pipe_surface *cb = fb->nr_cbufs ? r300_get_nonnull_cb(fb, 0) : NULL;        if (cb &&            (cb->format == PIPE_FORMAT_R16G16B16A16_FLOAT ||             cb->format == PIPE_FORMAT_R16G16B16X16_FLOAT)) {            alpha_func |= R500_FG_ALPHA_FUNC_FP16_ENABLE;        } else {            alpha_func |= R500_FG_ALPHA_FUNC_8BIT;        }    }    /* Setup alpha-to-coverage. */    if (r300->alpha_to_coverage && r300->msaa_enable) {        /* Always set 3/6, it improves precision even for 2x and 4x MSAA. */        alpha_func |= R300_FG_ALPHA_FUNC_MASK_ENABLE |                      R300_FG_ALPHA_FUNC_CFG_3_OF_6;    }    BEGIN_CS(size);    OUT_CS_REG(R300_FG_ALPHA_FUNC, alpha_func);    OUT_CS_TABLE(fb->zsbuf ? &dsa->cb_begin : dsa->cb_zb_no_readwrite, size-2);    END_CS;}

void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state){    struct r300_fragment_shader *fs = r300_fs(r300);    struct rc_constant_list *constants = &fs->shader->code.constants;    unsigned i;    unsigned count = fs->shader->rc_state_count;    unsigned first = fs->shader->externals_count;    unsigned end = constants->Count;    unsigned j;    CS_LOCALS(r300);    if (count == 0)        return;    BEGIN_CS(size);    for(i = first; i < end; ++i) {        if (constants->Constants[i].Type == RC_CONSTANT_STATE) {            float data[4];            get_rc_constant_state(data, r300, &constants->Constants[i]);            OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);            for (j = 0; j < 4; j++)                OUT_CS(pack_float24(data[j]));        }    }    END_CS;}

static void r300_render_draw_arrays(struct vbuf_render* render,                                    unsigned start,                                    unsigned count){    struct r300_render* r300render = r300_render(render);    struct r300_context* r300 = r300render->r300;    uint8_t* ptr;    unsigned i;    unsigned dwords = 6;    CS_LOCALS(r300);    (void) i; (void) ptr;    assert(start == 0);    assert(count < (1 << 16));    DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)/n", count);    if (!r300_prepare_for_rendering(r300,                                    PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL,                                    NULL, dwords, 0, 0, -1)) {        return;    }    BEGIN_CS(dwords);    OUT_CS_REG(R300_GA_COLOR_CONTROL,            r300_provoking_vertex_fixes(r300, r300render->prim));    OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);    OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);    OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |           r300render->hwprim);    END_CS;}

void r300_emit_vertex_arrays_swtcl(struct r300_context *r300, boolean indexed){    CS_LOCALS(r300);    DBG(r300, DBG_SWTCL, "r300: Preparing vertex buffer %p for render, "            "vertex size %d/n", r300->vbo,            r300->vertex_info.size);    /* Set the pointer to our vertex buffer. The emitted values are this:     * PACKET3 [3D_LOAD_VBPNTR]     * COUNT   [1]     * FORMAT  [size | stride << 8]     * OFFSET  [offset into BO]     * VBPNTR  [relocated BO]     */    BEGIN_CS(7);    OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);    OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));    OUT_CS(r300->vertex_info.size |            (r300->vertex_info.size << 8));    OUT_CS(r300->draw_vbo_offset);    OUT_CS(0);    assert(r300->vbo_cs);    OUT_CS(0xc0001000); /* PKT3_NOP */    OUT_CS(r300->rws->cs_get_reloc(r300->cs, r300->vbo_cs) * 4);    END_CS;}

void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state){    struct r300_fragment_shader *fs = r300_fs(r300);    struct rc_constant_list *constants = &fs->shader->code.constants;    unsigned i;    unsigned count = fs->shader->rc_state_count;    unsigned first = fs->shader->externals_count;    unsigned end = constants->Count;    CS_LOCALS(r300);    if (count == 0)        return;    BEGIN_CS(size);    for(i = first; i < end; ++i) {        if (constants->Constants[i].Type == RC_CONSTANT_STATE) {            float data[4];            get_rc_constant_state(data, r300, &constants->Constants[i]);            OUT_CS_REG(R500_GA_US_VECTOR_INDEX,                       R500_GA_US_VECTOR_INDEX_TYPE_CONST |                       (i & R500_GA_US_VECTOR_INDEX_MASK));            OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);            OUT_CS_TABLE(data, 4);        }    }    END_CS;}

static void r300_emit_draw_arrays(struct r300_context *r300,                                  unsigned mode,                                  unsigned count){    boolean alt_num_verts = count > 65535;    CS_LOCALS(r300);    if (count >= (1 << 24)) {        fprintf(stderr, "r300: Got a huge number of vertices: %i, "                "refusing to render./n", count);        return;    }    r300_emit_draw_init(r300, mode, count-1);    BEGIN_CS(2 + (alt_num_verts ? 2 : 0));    if (alt_num_verts) {        OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);    }    OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);    OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |           r300_translate_primitive(mode) |           (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));    END_CS;}

void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state){    CS_LOCALS(r300);    BEGIN_CS(size);    OUT_CS_REG(R300_TX_INVALTAGS, 0);    END_CS;}

void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state){    CS_LOCALS(r300);    BEGIN_CS(size);    OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);    END_CS;}

void r500_emit_index_bias(struct r300_context *r300, int index_bias){    CS_LOCALS(r300);    BEGIN_CS(2);    OUT_CS_REG(R500_VAP_INDEX_OFFSET,               (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0));    END_CS;}

void r300_emit_ztop_state(struct r300_context* r300,                          unsigned size, void* state){    struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;    CS_LOCALS(r300);    BEGIN_CS(size);    OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);    END_CS;}

static void r300_render_draw_arrays(struct vbuf_render* render,                                    unsigned start,                                    unsigned count){    struct r300_render* r300render = r300_render(render);    struct r300_context* r300 = r300render->r300;    uint8_t* ptr;    unsigned i;    unsigned dwords = 6;    CS_LOCALS(r300);    (void) i; (void) ptr;    DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)/n", count);    if (r300->draw_first_emitted) {        if (!r300_prepare_for_rendering(r300,                PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL,                NULL, 6, 0, 0))            return;    } else {        if (!r300_emit_states(r300,                PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL,                NULL, 0, 0))            return;    }    /* Uncomment to dump all VBOs rendered through this interface.     * Slow and noisy!    ptr = pipe_buffer_map(&r300render->r300->context,                          r300render->vbo, PIPE_TRANSFER_READ,                          &r300render->vbo_transfer);    for (i = 0; i < count; i++) {        printf("r300: Vertex %d/n", i);        draw_dump_emitted_vertex(&r300->vertex_info, ptr);        ptr += r300->vertex_info.size * 4;        printf("/n");    }    pipe_buffer_unmap(&r300render->r300->context, r300render->vbo,        r300render->vbo_transfer);    */    BEGIN_CS(dwords);    OUT_CS_REG(R300_GA_COLOR_CONTROL,            r300_provoking_vertex_fixes(r300, r300render->prim));    OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);    OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);    OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |           r300render->hwprim);    END_CS;    r300->draw_first_emitted = TRUE;}

void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state){    struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;    struct r300_vertex_program_code* code = &vs->code;    struct r300_screen* r300screen = r300->screen;    unsigned instruction_count = code->length / 4;    unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;    unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);    unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);    unsigned temp_count = MAX2(code->num_temporaries, 1);    unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,                                  vtx_mem_size / output_count, 10);    unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 5);    CS_LOCALS(r300);    BEGIN_CS(size);    /* R300_VAP_PVS_CODE_CNTL_0     * R300_VAP_PVS_CONST_CNTL     * R300_VAP_PVS_CODE_CNTL_1     * See the r5xx docs for instructions on how to use these. */    OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) |	       R300_PVS_XYZW_VALID_INST(instruction_count - 1) |	       R300_PVS_LAST_INST(instruction_count - 1));    OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, instruction_count - 1);    OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);    OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);    OUT_CS_TABLE(code->body.d, code->length);    OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |            R300_PVS_NUM_CNTLRS(pvs_num_controllers) |            R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |            R300_PVS_VF_MAX_VTX_NUM(12) |            (r300->clip_halfz ? R300_DX_CLIP_SPACE_DEF : 0) |            (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));    /* Emit flow control instructions.  Even if there are no fc instructions,     * we still need to write the registers to make sure they are cleared. */    OUT_CS_REG(R300_VAP_PVS_FLOW_CNTL_OPC, code->fc_ops);    if (r300screen->caps.is_r500) {        OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, R300_VS_MAX_FC_OPS * 2);        OUT_CS_TABLE(code->fc_op_addrs.r500, R300_VS_MAX_FC_OPS * 2);    } else {        OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_ADDRS_0, R300_VS_MAX_FC_OPS);        OUT_CS_TABLE(code->fc_op_addrs.r300, R300_VS_MAX_FC_OPS);    }    OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_LOOP_INDEX_0, R300_VS_MAX_FC_OPS);    OUT_CS_TABLE(code->fc_loop_index, R300_VS_MAX_FC_OPS);    END_CS;}

void r300_emit_sample_mask(struct r300_context *r300,                           unsigned size, void *state){    unsigned mask = (*(unsigned*)state) & ((1 << 6)-1);    CS_LOCALS(r300);    BEGIN_CS(size);    OUT_CS_REG(R300_SC_SCREENDOOR,               mask | (mask << 6) | (mask << 12) | (mask << 18));    END_CS;}

void r300_emit_rs_block_state(struct r300_context* r300,                              unsigned size, void* state){    struct r300_rs_block* rs = (struct r300_rs_block*)state;    unsigned i;    /* It's the same for both INST and IP tables */    unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;    CS_LOCALS(r300);    if (DBG_ON(r300, DBG_RS_BLOCK)) {        r500_dump_rs_block(rs);        fprintf(stderr, "r300: RS emit:/n");        for (i = 0; i < count; i++)            fprintf(stderr, "    : ip %d: 0x%08x/n", i, rs->ip[i]);        for (i = 0; i < count; i++)            fprintf(stderr, "    : inst %d: 0x%08x/n", i, rs->inst[i]);        fprintf(stderr, "    : count: 0x%08x inst_count: 0x%08x/n",            rs->count, rs->inst_count);    }    BEGIN_CS(size);    OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);    OUT_CS(rs->vap_vtx_state_cntl);    OUT_CS(rs->vap_vsm_vtx_assm);    OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);    OUT_CS(rs->vap_out_vtx_fmt[0]);    OUT_CS(rs->vap_out_vtx_fmt[1]);    OUT_CS_REG_SEQ(R300_GB_ENABLE, 1);    OUT_CS(rs->gb_enable);    if (r300->screen->caps.is_r500) {        OUT_CS_REG_SEQ(R500_RS_IP_0, count);    } else {        OUT_CS_REG_SEQ(R300_RS_IP_0, count);    }    OUT_CS_TABLE(rs->ip, count);    OUT_CS_REG_SEQ(R300_RS_COUNT, 2);    OUT_CS(rs->count);    OUT_CS(rs->inst_count);    if (r300->screen->caps.is_r500) {        OUT_CS_REG_SEQ(R500_RS_INST_0, count);    } else {        OUT_CS_REG_SEQ(R300_RS_INST_0, count);    }    OUT_CS_TABLE(rs->inst, count);    END_CS;}

static void rv530_emit_query_end_single_z(struct r300_context *r300,                                          struct r300_query *query){    CS_LOCALS(r300);    BEGIN_CS(8);    OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);    OUT_CS_REG(R300_ZB_ZPASS_ADDR, query->num_results * 4);    OUT_CS_RELOC(r300->query_current);    OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);    END_CS;}

void r300_emit_viewport_state(struct r300_context* r300,                              unsigned size, void* state){    struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;    CS_LOCALS(r300);    BEGIN_CS(size);    OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);    OUT_CS_TABLE(&viewport->xscale, 6);    OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);    END_CS;}

static void r300_end_query(struct pipe_context* pipe,                           struct pipe_query* query){    struct r300_context* r300 = r300_context(pipe);    struct r300_query* q = (struct r300_query*)query;    CS_LOCALS(r300);    BEGIN_CS(4);    OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);    OUT_CS_RELOC(q->buf, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);    END_CS;}

static void r300_emit_query_end_frag_pipes(struct r300_context *r300,                                           struct r300_query *query){    struct r300_capabilities* caps = &r300->screen->caps;    uint32_t gb_pipes = r300->screen->info.r300_num_gb_pipes;    CS_LOCALS(r300);    assert(gb_pipes);    BEGIN_CS(6 * gb_pipes + 2);    /* I'm not so sure I like this switch, but it's hard to be elegant     * when there's so many special cases...     *     * So here's the basic idea. For each pipe, enable writes to it only,     * then put out the relocation for ZPASS_ADDR, taking into account a     * 4-byte offset for each pipe. RV380 and older are special; they have     * only two pipes, and the second pipe's enable is on bit 3, not bit 1,     * so there's a chipset cap for that. */    switch (gb_pipes) {        case 4:            /* pipe 3 only */            OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);            OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 3) * 4);            OUT_CS_RELOC(r300->query_current);        case 3:            /* pipe 2 only */            OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);            OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 2) * 4);            OUT_CS_RELOC(r300->query_current);        case 2:            /* pipe 1 only */            /* As mentioned above, accommodate RV380 and older. */            OUT_CS_REG(R300_SU_REG_DEST,                    1 << (caps->high_second_pipe ? 3 : 1));            OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 1) * 4);            OUT_CS_RELOC(r300->query_current);        case 1:            /* pipe 0 only */            OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);            OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 0) * 4);            OUT_CS_RELOC(r300->query_current);            break;        default:            fprintf(stderr, "r300: Implementation error: Chipset reports %d"                    " pixel pipes!/n", gb_pipes);            abort();    }    /* And, finally, reset it to normal... */    OUT_CS_REG(R300_SU_REG_DEST, 0xF);    END_CS;}

static void r300_emit_draw_arrays(struct r300_context *r300,                                  unsigned mode,                                  unsigned count){    CS_LOCALS(r300);    BEGIN_CS(4);    OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count);    OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);    OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |           r300_translate_primitive(mode));    END_CS;}

static void r300_emit_draw_init(struct r300_context *r300, unsigned mode,                                unsigned max_index){    CS_LOCALS(r300);    assert(max_index < (1 << 24));    BEGIN_CS(5);    OUT_CS_REG(R300_GA_COLOR_CONTROL,            r300_provoking_vertex_fixes(r300, mode));    OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);    OUT_CS(max_index);    OUT_CS(0);    END_CS;}

static void r300_render_unmap_vertices(struct vbuf_render* render,                                             ushort min,                                             ushort max){    struct r300_render* r300render = r300_render(render);    struct pipe_screen* screen = r300render->r300->context.screen;    CS_LOCALS(r300render->r300);    BEGIN_CS(2);    OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);    END_CS;    r300render->vbo_max_used = MAX2(r300render->vbo_max_used,                                    r300render->vertex_size * (max + 1));    pipe_buffer_unmap(screen, r300render->vbo);}

static void r300_emit_draw_elements(struct r300_context *r300,                                    struct pipe_buffer* indexBuffer,                                    unsigned indexSize,                                    unsigned minIndex,                                    unsigned maxIndex,                                    unsigned mode,                                    unsigned start,                                    unsigned count){    uint32_t count_dwords;    uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);    CS_LOCALS(r300);    /* XXX most of these are stupid */    assert(indexSize == 4 || indexSize == 2);    assert((start * indexSize)  % 4 == 0);    assert(offset_dwords == 0);    BEGIN_CS(10);    OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, maxIndex);    OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);    if (indexSize == 4) {        count_dwords = count + start;        OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |               R300_VAP_VF_CNTL__INDEX_SIZE_32bit |               r300_translate_primitive(mode));    } else {        count_dwords = (count + start + 1) / 2;        OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |               r300_translate_primitive(mode));    }    /* INDX_BUFFER is a truly special packet3.     * Unlike most other packet3, where the offset is after the count,     * the order is reversed, so the relocation ends up carrying the     * size of the indexbuf instead of the offset.     *     * XXX Fix offset     */    OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);    OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |           (0 << R300_INDX_BUFFER_SKIP_SHIFT));    OUT_CS(offset_dwords);    OUT_CS_RELOC(indexBuffer, count_dwords,        RADEON_GEM_DOMAIN_GTT, 0, 0);    END_CS;}

static void r300_begin_query(struct pipe_context* pipe,                             struct pipe_query* query){    uint32_t* map;    struct r300_context* r300 = r300_context(pipe);    struct r300_query* q = (struct r300_query*)query;    CS_LOCALS(r300);    map = pipe_buffer_map(pipe->screen, q->buf, PIPE_BUFFER_USAGE_CPU_WRITE);    *map = ~0;    pipe_buffer_unmap(pipe->screen, q->buf);    BEGIN_CS(2);    OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);    END_CS;}

void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state){    struct r300_rs_state* rs = state;    CS_LOCALS(r300);    BEGIN_CS(size);    OUT_CS_TABLE(rs->cb_main, RS_STATE_MAIN_SIZE);    if (rs->polygon_offset_enable) {        if (r300->zbuffer_bpp == 16) {            OUT_CS_TABLE(rs->cb_poly_offset_zb16, 5);        } else {            OUT_CS_TABLE(rs->cb_poly_offset_zb24, 5);        }    }    END_CS;}

void r300_emit_aa_state(struct r300_context *r300, unsigned size, void *state){    struct r300_aa_state *aa = (struct r300_aa_state*)state;    CS_LOCALS(r300);    BEGIN_CS(size);    OUT_CS_REG(R300_GB_AA_CONFIG, aa->aa_config);    if (aa->dest) {        OUT_CS_REG(R300_RB3D_AARESOLVE_OFFSET, aa->dest->offset);        OUT_CS_RELOC(aa->dest);        OUT_CS_REG(R300_RB3D_AARESOLVE_PITCH, aa->dest->pitch);    }    OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, aa->aaresolve_ctl);    END_CS;}

void r300_emit_vs_constants(struct r300_context* r300,                            unsigned size, void *state){    unsigned count =        ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;    struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;    struct r300_vertex_shader *vs = (struct r300_vertex_shader*)r300->vs_state.state;    unsigned i;    int imm_first = vs->externals_count;    int imm_end = vs->code.constants.Count;    int imm_count = vs->immediates_count;    CS_LOCALS(r300);    BEGIN_CS(size);    OUT_CS_REG(R300_VAP_PVS_CONST_CNTL,               R300_PVS_CONST_BASE_OFFSET(buf->buffer_base) |               R300_PVS_MAX_CONST_ADDR(MAX2(imm_end - 1, 0)));    if (vs->externals_count) {        OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,                   (r300->screen->caps.is_r500 ?                   R500_PVS_CONST_START : R300_PVS_CONST_START) + buf->buffer_base);        OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);        if (buf->remap_table){            for (i = 0; i < count; i++) {                uint32_t *data = &buf->ptr[buf->remap_table[i]*4];                OUT_CS_TABLE(data, 4);            }        } else {            OUT_CS_TABLE(buf->ptr, count * 4);        }    }    /* Emit immediates. */    if (imm_count) {        OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,                   (r300->screen->caps.is_r500 ?                   R500_PVS_CONST_START : R300_PVS_CONST_START) +                   buf->buffer_base + imm_first);        OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);        for (i = imm_first; i < imm_end; i++) {            const float *data = vs->code.constants.Constants[i].u.Immediate;            OUT_CS_TABLE(data, 4);        }    }    END_CS;}

static void r300_render_draw_elements(struct vbuf_render* render,                                      const ushort* indices,                                      uint count){    struct r300_render* r300render = r300_render(render);    struct r300_context* r300 = r300render->r300;    unsigned max_index = (r300->vbo->size - r300->draw_vbo_offset) /                         (r300render->r300->vertex_info.size * 4) - 1;    struct pipe_resource *index_buffer = NULL;    unsigned index_buffer_offset;    CS_LOCALS(r300);    DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)/n", count);    u_upload_data(r300->uploader, 0, count * 2, indices,                  &index_buffer_offset, &index_buffer);    if (!index_buffer) {        return;    }    if (!r300_prepare_for_rendering(r300,                                    PREP_EMIT_STATES |                                    PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,                                    index_buffer, 12, 0, 0, -1)) {        pipe_resource_reference(&index_buffer, NULL);        return;    }    BEGIN_CS(12);    OUT_CS_REG(R300_GA_COLOR_CONTROL,               r300_provoking_vertex_fixes(r300, r300render->prim));    OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);    OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);    OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |           r300render->hwprim);    OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);    OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2));    OUT_CS(index_buffer_offset);    OUT_CS((count + 1) / 2);    OUT_CS_RELOC(r300_resource(index_buffer));    END_CS;    pipe_resource_reference(&index_buffer, NULL);}

void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state){    struct r300_query *query = r300->query_current;    CS_LOCALS(r300);    if (!query)	return;    BEGIN_CS(size);    if (r300->screen->caps.family == CHIP_RV530) {        OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);    } else {        OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);    }    OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);    END_CS;    query->begin_emitted = TRUE;}