自学教程：C++ BEGIN_DMA函数代码示例

static void mga_dma_dispatch_blit(struct drm_device *dev, drm_mga_blit_t *blit){	drm_mga_private_t *dev_priv = dev->dev_private;	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;	struct drm_clip_rect *pbox = sarea_priv->boxes;	int nbox = sarea_priv->nbox;	u32 scandir = 0, i;	DMA_LOCALS;	DRM_DEBUG("/n");	BEGIN_DMA(4 + nbox);	DMA_BLOCK(MGA_DMAPAD, 0x00000000,		  MGA_DMAPAD, 0x00000000,		  MGA_DWGSYNC, 0x00007100, MGA_DWGSYNC, 0x00007000);	DMA_BLOCK(MGA_DWGCTL, MGA_DWGCTL_COPY,		  MGA_PLNWT, blit->planemask,		  MGA_SRCORG, blit->srcorg, MGA_DSTORG, blit->dstorg);	DMA_BLOCK(MGA_SGN, scandir,		  MGA_MACCESS, dev_priv->maccess,		  MGA_AR5, blit->ydir * blit->src_pitch,		  MGA_PITCH, blit->dst_pitch);	for (i = 0; i < nbox; i++) {		int srcx = pbox[i].x1 + blit->delta_sx;		int srcy = pbox[i].y1 + blit->delta_sy;		int dstx = pbox[i].x1 + blit->delta_dx;		int dsty = pbox[i].y1 + blit->delta_dy;		int h = pbox[i].y2 - pbox[i].y1;		int w = pbox[i].x2 - pbox[i].x1 - 1;		int start;		if (blit->ydir == -1)			srcy = blit->height - srcy - 1;		start = srcy * blit->src_pitch + srcx;		DMA_BLOCK(MGA_AR0, start + w,			  MGA_AR3, start,			  MGA_FXBNDRY, ((dstx + w) << 16) | (dstx & 0xffff),			  MGA_YDSTLEN + MGA_EXEC, (dsty << 16) | h);	}		DMA_BLOCK(MGA_DMAPAD, 0x00000000,		  MGA_PLNWT, ctx->plnwt,		  MGA_PITCH, dev_priv->front_pitch, MGA_DWGCTL, ctx->dwgctl);	ADVANCE_DMA();}

static void mga_dma_dispatch_swap(struct drm_device *dev){	drm_mga_private_t *dev_priv = dev->dev_private;	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;	struct drm_clip_rect *pbox = sarea_priv->boxes;	int nbox = sarea_priv->nbox;	int i;	DMA_LOCALS;	DRM_DEBUG("/n");	sarea_priv->last_frame.head = dev_priv->prim.tail;	sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap;	BEGIN_DMA(4 + nbox);	DMA_BLOCK(MGA_DMAPAD, 0x00000000,		  MGA_DMAPAD, 0x00000000,		  MGA_DWGSYNC, 0x00007100, MGA_DWGSYNC, 0x00007000);	DMA_BLOCK(MGA_DSTORG, dev_priv->front_offset,		  MGA_MACCESS, dev_priv->maccess,		  MGA_SRCORG, dev_priv->back_offset,		  MGA_AR5, dev_priv->front_pitch);	DMA_BLOCK(MGA_DMAPAD, 0x00000000,		  MGA_DMAPAD, 0x00000000,		  MGA_PLNWT, 0xffffffff, MGA_DWGCTL, MGA_DWGCTL_COPY);	for (i = 0; i < nbox; i++) {		struct drm_clip_rect *box = &pbox[i];		u32 height = box->y2 - box->y1;		u32 start = box->y1 * dev_priv->front_pitch;		DRM_DEBUG("   from=%d,%d to=%d,%d/n",			  box->x1, box->y1, box->x2, box->y2);		DMA_BLOCK(MGA_AR0, start + box->x2 - 1,			  MGA_AR3, start + box->x1,			  MGA_FXBNDRY, ((box->x2 - 1) << 16) | box->x1,			  MGA_YDSTLEN + MGA_EXEC, (box->y1 << 16) | height);	}	DMA_BLOCK(MGA_DMAPAD, 0x00000000,		  MGA_PLNWT, ctx->plnwt,		  MGA_SRCORG, dev_priv->front_offset, MGA_DWGCTL, ctx->dwgctl);	ADVANCE_DMA();	FLUSH_DMA();	DRM_DEBUG("... done./n");}

/* This copies a 64 byte aligned agp region to the frambuffer with a * standard blit, the ioctl needs to do checking. */static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf,                                    unsigned int dstorg, unsigned int length ){    drm_mga_private_t *dev_priv = dev->dev_private;    drm_mga_buf_priv_t *buf_priv = buf->dev_private;    drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state;    u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM;    u32 y2;    DMA_LOCALS;    DRM_DEBUG( "%s: buf=%d used=%d/n",               __FUNCTION__, buf->idx, buf->used );    y2 = length / 64;    BEGIN_DMA( 5 );    DMA_BLOCK( MGA_DMAPAD,	0x00000000,               MGA_DMAPAD,	0x00000000,               MGA_DWGSYNC,	0x00007100,               MGA_DWGSYNC,	0x00007000 );    DMA_BLOCK( MGA_DSTORG,	dstorg,               MGA_MACCESS,	0x00000000,               MGA_SRCORG,	srcorg,               MGA_AR5,	64 );    DMA_BLOCK( MGA_PITCH,	64,               MGA_PLNWT,	0xffffffff,               MGA_DMAPAD,	0x00000000,               MGA_DWGCTL,	MGA_DWGCTL_COPY );    DMA_BLOCK( MGA_AR0,	63,               MGA_AR3,	0,               MGA_FXBNDRY,	(63 << 16) | 0,               MGA_YDSTLEN + MGA_EXEC, y2 );    DMA_BLOCK( MGA_PLNWT,	ctx->plnwt,               MGA_SRCORG,	dev_priv->front_offset,               MGA_PITCH,	dev_priv->front_pitch,               MGA_DWGSYNC,	0x00007000 );    ADVANCE_DMA();    AGE_BUFFER( buf_priv );    buf->pending = 0;    buf->used = 0;    buf_priv->dispatched = 0;    mga_freelist_put( dev, buf );    FLUSH_DMA();}

static __inline__ void mga_g200_emit_context(drm_mga_private_t *dev_priv){	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;	DMA_LOCALS;	BEGIN_DMA(3);	DMA_BLOCK(MGA_DSTORG, ctx->dstorg,		  MGA_MACCESS, ctx->maccess,		  MGA_PLNWT, ctx->plnwt, MGA_DWGCTL, ctx->dwgctl);	DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl,		  MGA_FOGCOL, ctx->fogcolor,		  MGA_WFLAG, ctx->wflag, MGA_ZORG, dev_priv->depth_offset);	DMA_BLOCK(MGA_FCOL, ctx->fcol,		  MGA_DMAPAD, 0x00000000,		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);	ADVANCE_DMA();}

static __inline__ void mga_g400_emit_pipe(drm_mga_private_t *dev_priv){	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;	unsigned int pipe = sarea_priv->warp_pipe;	DMA_LOCALS;/*	printk("mga_g400_emit_pipe %x/n", pipe); */	BEGIN_DMA(10);	DMA_BLOCK(MGA_WIADDR2, MGA_WMODE_SUSPEND,		  MGA_DMAPAD, 0x00000000,		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);	if (pipe & MGA_T2) {		DMA_BLOCK(MGA_WVRTXSZ, 0x00001e09,			  MGA_DMAPAD, 0x00000000,			  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);		DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000,			  MGA_WACCEPTSEQ, 0x00000000,			  MGA_WACCEPTSEQ, 0x00000

static void mga_emit_clip_rect(drm_mga_private_t *dev_priv,			       struct drm_clip_rect *box){	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;	unsigned int pitch = dev_priv->front_pitch;	DMA_LOCALS;	BEGIN_DMA(2);	if (dev_priv->chipset >= MGA_CARD_TYPE_G400) {		DMA_BLOCK(MGA_DWGCTL, ctx->dwgctl,			  MGA_LEN + MGA_EXEC, 0x80000000,			  MGA_DWGCTL, ctx->dwgctl,			  MGA_LEN + MGA_EXEC, 0x80000000);	}	DMA_BLOCK(MGA_DMAPAD, 0x00000000,		  MGA_CXBNDRY, ((box->x2 - 1) << 16) | box->x1,		  MGA_YTOP, box->y1 * pitch, MGA_YBOT, (box->y2 - 1) * pitch);	ADVANCE_DMA();}

static inline void mga_g400_emit_tex1( drm_mga_private_t *dev_priv ){    drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;    drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];    DMA_LOCALS;    BEGIN_DMA( 5 );    DMA_BLOCK( MGA_TEXCTL2,		(tex->texctl2 |                                 MGA_MAP1_ENABLE |                                 MGA_G400_TC2_MAGIC),               MGA_TEXCTL,		tex->texctl,               MGA_TEXFILTER,	tex->texfilter,               MGA_TEXBORDERCOL,	tex->texbordercol );    DMA_BLOCK( MGA_TEXORG,		tex->texorg,               MGA_TEXORG1,		tex->texorg1,               MGA_TEXORG2,		tex->texorg2,               MGA_TEXORG3,		tex->texorg3 );    DMA_BLOCK( MGA_TEXORG4,		tex->texorg4,               MGA_TEXWIDTH,	tex->texwidth,               MGA_TEXHEIGHT,	tex->texheight,               MGA_WR49,		0x00000000 );    DMA_BLOCK( MGA_WR57,		0x00000000,               MGA_WR53,		0x00000000,               MGA_WR61,		0x00000000,               MGA_WR52,		tex->texwidth | MGA_G400_WR_MAGIC );    DMA_BLOCK( MGA_WR60,		tex->texheight | MGA_G400_WR_MAGIC,               MGA_TEXTRANS,	0x0000ffff,               MGA_TEXTRANSHIGH,	0x0000ffff,               MGA_TEXCTL2,		tex->texctl2 | MGA_G400_TC2_MAGIC );    ADVANCE_DMA();}

static __inline__ void mga_g200_emit_pipe(drm_mga_private_t *dev_priv){	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;	unsigned int pipe = sarea_priv->warp_pipe;	DMA_LOCALS;	BEGIN_DMA(3);	DMA_BLOCK(MGA_WIADDR, MGA_WMODE_SUSPEND,		  MGA_WVRTXSZ, 0x00000007,		  MGA_WFLAG, 0x00000000, MGA_WR24, 0x00000000);	DMA_BLOCK(MGA_WR25, 0x00000100,		  MGA_WR34, 0x00000000,		  MGA_WR42, 0x0000ffff, MGA_WR60, 0x0000ffff);	DMA_BLOCK(MGA_DMAPAD, 0xffffffff,		  MGA_DMAPAD, 0xffffffff,		  MGA_DMAPAD, 0xffffffff,		  MGA_WIADDR, (dev_priv->warp_pipe_phys[pipe] |			       MGA_WMODE_START | dev_priv->wagp_enable));	ADVANCE_DMA();}

static __inline__ void mga_g400_emit_pipe(drm_mga_private_t *dev_priv){	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;	unsigned int pipe = sarea_priv->warp_pipe;	DMA_LOCALS;	BEGIN_DMA(10);	DMA_BLOCK(MGA_WIADDR2, MGA_WMODE_SUSPEND,		  MGA_DMAPAD, 0x00000000,		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);	if (pipe & MGA_T2) {		DMA_BLOCK(MGA_WVRTXSZ, 0x00001e09,			  MGA_DMAPAD, 0x00000000,			  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);		DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000,			  MGA_WACCEPTSEQ, 0x00000000,			  MGA_WACCEPTSEQ, 0x00000000,			  MGA_WACCEPTSEQ, 0x1e000000);	} else {		if (dev_priv->warp_pipe & MGA_T2) {						DMA_BLOCK(MGA_YDST, 0x00000000,				  MGA_FXLEFT, 0x00000000,				  MGA_FXRIGHT, 0x00000001,				  MGA_DWGCTL, MGA_DWGCTL_FLUSH);			DMA_BLOCK(MGA_LEN + MGA_EXEC, 0x00000001,				  MGA_DWGSYNC, 0x00007000,				  MGA_TEXCTL2, MGA_G400_TC2_MAGIC,				  MGA_LEN + MGA_EXEC, 0x00000000);			DMA_BLOCK(MGA_TEXCTL2, (MGA_DUALTEX |						MGA_G400_TC2_MAGIC),				  MGA_LEN + MGA_EXEC, 0x00000000,				  MGA_TEXCTL2, MGA_G400_TC2_MAGIC,				  MGA_DMAPAD, 0x00000000);		}		DMA_BLOCK(MGA_WVRTXSZ, 0x00001807,			  MGA_DMAPAD, 0x00000000,			  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);		DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000,			  MGA_WACCEPTSEQ, 0x00000000,			  MGA_WACCEPTSEQ, 0x00000000,			  MGA_WACCEPTSEQ, 0x18000000);	}	DMA_BLOCK(MGA_WFLAG, 0x00000000,		  MGA_WFLAG1, 0x00000000,		  MGA_WR56, MGA_G400_WR56_MAGIC, MGA_DMAPAD, 0x00000000);	DMA_BLOCK(MGA_WR49, 0x00000000,			  MGA_WR57, 0x00000000,			  MGA_WR53, 0x00000000,			  MGA_WR61, 0x00000000);		DMA_BLOCK(MGA_WR54, MGA_G400_WR_MAGIC,			  MGA_WR62, MGA_G400_WR_MAGIC,			  MGA_WR52, MGA_G400_WR_MAGIC,			  MGA_WR60, MGA_G400_WR_MAGIC);			DMA_BLOCK(MGA_DMAPAD, 0xffffffff,		  MGA_DMAPAD, 0xffffffff,		  MGA_DMAPAD, 0xffffffff,		  MGA_WIADDR2, (dev_priv->warp_pipe_phys[pipe] |				MGA_WMODE_START | dev_priv->wagp_enable));	ADVANCE_DMA();}