自学教程：C++ CyIntDisable函数代码示例

    /*******************************************************************************    * Function Name: UART_Debug_UartInit    ********************************************************************************    *    * Summary:    *  Configures the SCB for the UART operation.    *    * Parameters:    *  None    *    * Return:    *  None    *    *******************************************************************************/    void UART_Debug_UartInit(void)    {        /* Configure UART interface */        UART_Debug_CTRL_REG = UART_Debug_UART_DEFAULT_CTRL;        /* Configure sub-mode: UART, SmartCard or IrDA */        UART_Debug_UART_CTRL_REG = UART_Debug_UART_DEFAULT_UART_CTRL;        /* Configure RX direction */        UART_Debug_UART_RX_CTRL_REG = UART_Debug_UART_DEFAULT_UART_RX_CTRL;        UART_Debug_RX_CTRL_REG      = UART_Debug_UART_DEFAULT_RX_CTRL;        UART_Debug_RX_FIFO_CTRL_REG = UART_Debug_UART_DEFAULT_RX_FIFO_CTRL;        UART_Debug_RX_MATCH_REG     = UART_Debug_UART_DEFAULT_RX_MATCH_REG;        /* Configure TX direction */        UART_Debug_UART_TX_CTRL_REG = UART_Debug_UART_DEFAULT_UART_TX_CTRL;        UART_Debug_TX_CTRL_REG      = UART_Debug_UART_DEFAULT_TX_CTRL;        UART_Debug_TX_FIFO_CTRL_REG = UART_Debug_UART_DEFAULT_TX_FIFO_CTRL;    #if !(UART_Debug_CY_SCBIP_V0 || UART_Debug_CY_SCBIP_V1)        UART_Debug_UART_FLOW_CTRL_REG = UART_Debug_UART_DEFAULT_FLOW_CTRL;    #endif /* !(UART_Debug_CY_SCBIP_V0 || UART_Debug_CY_SCBIP_V1) */        /* Configure interrupt with UART handler but do not enable it */    #if(UART_Debug_SCB_IRQ_INTERNAL)        CyIntDisable    (UART_Debug_ISR_NUMBER);        CyIntSetPriority(UART_Debug_ISR_NUMBER, UART_Debug_ISR_PRIORITY);        (void) CyIntSetVector(UART_Debug_ISR_NUMBER, &UART_Debug_SPI_UART_ISR);    #endif /* (UART_Debug_SCB_IRQ_INTERNAL) */        /* Configure WAKE interrupt */    #if(UART_Debug_UART_RX_WAKEUP_IRQ)        CyIntDisable    (UART_Debug_RX_WAKE_ISR_NUMBER);        CyIntSetPriority(UART_Debug_RX_WAKE_ISR_NUMBER, UART_Debug_RX_WAKE_ISR_PRIORITY);        (void) CyIntSetVector(UART_Debug_RX_WAKE_ISR_NUMBER, &UART_Debug_UART_WAKEUP_ISR);    #endif /* (UART_Debug_UART_RX_WAKEUP_IRQ) */        /* Configure interrupt sources */        UART_Debug_INTR_I2C_EC_MASK_REG = UART_Debug_UART_DEFAULT_INTR_I2C_EC_MASK;        UART_Debug_INTR_SPI_EC_MASK_REG = UART_Debug_UART_DEFAULT_INTR_SPI_EC_MASK;        UART_Debug_INTR_SLAVE_MASK_REG  = UART_Debug_UART_DEFAULT_INTR_SLAVE_MASK;        UART_Debug_INTR_MASTER_MASK_REG = UART_Debug_UART_DEFAULT_INTR_MASTER_MASK;        UART_Debug_INTR_RX_MASK_REG     = UART_Debug_UART_DEFAULT_INTR_RX_MASK;        UART_Debug_INTR_TX_MASK_REG     = UART_Debug_UART_DEFAULT_INTR_TX_MASK;    #if(UART_Debug_INTERNAL_RX_SW_BUFFER_CONST)        UART_Debug_rxBufferHead     = 0u;        UART_Debug_rxBufferTail     = 0u;        UART_Debug_rxBufferOverflow = 0u;    #endif /* (UART_Debug_INTERNAL_RX_SW_BUFFER_CONST) */    #if(UART_Debug_INTERNAL_TX_SW_BUFFER_CONST)        UART_Debug_txBufferHead = 0u;        UART_Debug_txBufferTail = 0u;    #endif /* (UART_Debug_INTERNAL_TX_SW_BUFFER_CONST) */    }

/******************************************************************************** Function Name: SPIM_DisableInt********************************************************************************** Summary:*  Disable internal interrupt generation.** Parameters:*  None.** Return:*  None.** Theory:*  Disable the internal interrupt output -or- the interrupt component itself.********************************************************************************/void SPIM_DisableInt(void) {    #if(SPIM_InternalTxInterruptEnabled)            CyIntDisable(SPIM_TX_ISR_NUMBER);    #endif /* SPIM_InternalTxInterruptEnabled */        #if(SPIM_InternalRxInterruptEnabled)                   CyIntDisable(SPIM_RX_ISR_NUMBER);    #endif /* SPIM_InternalRxInterruptEnabled */}

/******************************************************************************** Function Name: emFile_SPI0_DisableInt********************************************************************************** Summary:*  Disable internal interrupt generation.** Parameters:*  None.** Return:*  None.** Theory:*  Disable the internal interrupt output -or- the interrupt component itself.********************************************************************************/void emFile_SPI0_DisableInt(void) {    #if(emFile_SPI0_InternalTxInterruptEnabled)            CyIntDisable(emFile_SPI0_TX_ISR_NUMBER);    #endif /* emFile_SPI0_InternalTxInterruptEnabled */        #if(emFile_SPI0_InternalRxInterruptEnabled)                   CyIntDisable(emFile_SPI0_RX_ISR_NUMBER);    #endif /* emFile_SPI0_InternalRxInterruptEnabled */}

/******************************************************************************** Function Name: USBFS_1_Stop********************************************************************************** Summary:*  This function shuts down the USB function including to release*  the D+ Pullup and disabling the SIE.** Parameters:*  None.** Return:*  None.** Global variables:*   USBFS_1_configuration: Contains current configuration number*       which is set by the Host using SET_CONFIGURATION request.*       Initialized to zero in this API.*   USBFS_1_deviceAddress: Contains current device address. This*       variable is initialized to zero in this API. Host starts to communicate*      to device with address 0 and then set it to whatever value using*      SET_ADDRESS request.*   USBFS_1_deviceStatus: initialized to 0.*       This is two bit variable which contain power status in first bit*       (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote*       wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.*   USBFS_1_configurationChanged: This variable is set to one after*       SET_CONFIGURATION request and cleared in this function.*   USBFS_1_intiVar variable is set to zero********************************************************************************/void USBFS_1_Stop(void) {    #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)        USBFS_1_Stop_DMA(USBFS_1_MAX_EP);     /* Stop all DMAs */    #endif   /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */    /* Disable the SIE */    USBFS_1_CR0_REG &= (uint8)(~USBFS_1_CR0_ENABLE);    /* Disable the d+ pullup */    USBFS_1_USBIO_CR1_REG &= (uint8)(~USBFS_1_USBIO_CR1_USBPUEN);    /* Disable USB in ACT PM */    USBFS_1_PM_ACT_CFG_REG &= (uint8)(~USBFS_1_PM_ACT_EN_FSUSB);    /* Disable USB block for Standby Power Mode */    USBFS_1_PM_STBY_CFG_REG &= (uint8)(~USBFS_1_PM_STBY_EN_FSUSB);    /* Disable the reset and EP interrupts */    CyIntDisable(USBFS_1_BUS_RESET_VECT_NUM);    CyIntDisable(USBFS_1_EP_0_VECT_NUM);    #if(USBFS_1_EP1_ISR_REMOVE == 0u)        CyIntDisable(USBFS_1_EP_1_VECT_NUM);    #endif   /* End USBFS_1_EP1_ISR_REMOVE */    #if(USBFS_1_EP2_ISR_REMOVE == 0u)        CyIntDisable(USBFS_1_EP_2_VECT_NUM);    #endif   /* End USBFS_1_EP2_ISR_REMOVE */    #if(USBFS_1_EP3_ISR_REMOVE == 0u)        CyIntDisable(USBFS_1_EP_3_VECT_NUM);    #endif   /* End USBFS_1_EP3_ISR_REMOVE */    #if(USBFS_1_EP4_ISR_REMOVE == 0u)        CyIntDisable(USBFS_1_EP_4_VECT_NUM);    #endif   /* End USBFS_1_EP4_ISR_REMOVE */    #if(USBFS_1_EP5_ISR_REMOVE == 0u)        CyIntDisable(USBFS_1_EP_5_VECT_NUM);    #endif   /* End USBFS_1_EP5_ISR_REMOVE */    #if(USBFS_1_EP6_ISR_REMOVE == 0u)        CyIntDisable(USBFS_1_EP_6_VECT_NUM);    #endif   /* End USBFS_1_EP6_ISR_REMOVE */    #if(USBFS_1_EP7_ISR_REMOVE == 0u)        CyIntDisable(USBFS_1_EP_7_VECT_NUM);    #endif   /* End USBFS_1_EP7_ISR_REMOVE */    #if(USBFS_1_EP8_ISR_REMOVE == 0u)        CyIntDisable(USBFS_1_EP_8_VECT_NUM);    #endif   /* End USBFS_1_EP8_ISR_REMOVE */    /* Clear all of the component data */    USBFS_1_configuration = 0u;    USBFS_1_interfaceNumber = 0u;    USBFS_1_configurationChanged = 0u;    USBFS_1_deviceAddress  = 0u;    USBFS_1_deviceStatus = 0u;    USBFS_1_initVar = 0u;}

    /*******************************************************************************    * Function Name: SERIAL_UartInit    ********************************************************************************    *    * Summary:    *  Configures the SCB for the UART operation.    *    * Parameters:    *  None    *    * Return:    *  None    *    *******************************************************************************/    void SERIAL_UartInit(void)    {        /* Configure UART interface */        SERIAL_CTRL_REG = SERIAL_UART_DEFAULT_CTRL;        /* Configure sub-mode: UART, SmartCard or IrDA */        SERIAL_UART_CTRL_REG = SERIAL_UART_DEFAULT_UART_CTRL;        /* Configure RX direction */        SERIAL_UART_RX_CTRL_REG = SERIAL_UART_DEFAULT_UART_RX_CTRL;        SERIAL_RX_CTRL_REG      = SERIAL_UART_DEFAULT_RX_CTRL;        SERIAL_RX_FIFO_CTRL_REG = SERIAL_UART_DEFAULT_RX_FIFO_CTRL;        SERIAL_RX_MATCH_REG     = SERIAL_UART_DEFAULT_RX_MATCH_REG;        /* Configure TX direction */        SERIAL_UART_TX_CTRL_REG = SERIAL_UART_DEFAULT_UART_TX_CTRL;        SERIAL_TX_CTRL_REG      = SERIAL_UART_DEFAULT_TX_CTRL;        SERIAL_TX_FIFO_CTRL_REG = SERIAL_UART_DEFAULT_TX_FIFO_CTRL;        /* Configure interrupt with UART handler but do not enable it */    #if(SERIAL_SCB_IRQ_INTERNAL)        CyIntDisable    (SERIAL_ISR_NUMBER);        CyIntSetPriority(SERIAL_ISR_NUMBER, SERIAL_ISR_PRIORITY);        (void) CyIntSetVector(SERIAL_ISR_NUMBER, &SERIAL_SPI_UART_ISR);    #endif /* (SERIAL_SCB_IRQ_INTERNAL) */        /* Configure WAKE interrupt */    #if(SERIAL_UART_RX_WAKEUP_IRQ)        CyIntDisable    (SERIAL_RX_WAKE_ISR_NUMBER);        CyIntSetPriority(SERIAL_RX_WAKE_ISR_NUMBER, SERIAL_RX_WAKE_ISR_PRIORITY);        (void) CyIntSetVector(SERIAL_RX_WAKE_ISR_NUMBER, &SERIAL_UART_WAKEUP_ISR);    #endif /* (SERIAL_UART_RX_WAKEUP_IRQ) */        /* Configure interrupt sources */        SERIAL_INTR_I2C_EC_MASK_REG = SERIAL_UART_DEFAULT_INTR_I2C_EC_MASK;        SERIAL_INTR_SPI_EC_MASK_REG = SERIAL_UART_DEFAULT_INTR_SPI_EC_MASK;        SERIAL_INTR_SLAVE_MASK_REG  = SERIAL_UART_DEFAULT_INTR_SLAVE_MASK;        SERIAL_INTR_MASTER_MASK_REG = SERIAL_UART_DEFAULT_INTR_MASTER_MASK;        SERIAL_INTR_RX_MASK_REG     = SERIAL_UART_DEFAULT_INTR_RX_MASK;        SERIAL_INTR_TX_MASK_REG     = SERIAL_UART_DEFAULT_INTR_TX_MASK;    #if(SERIAL_INTERNAL_RX_SW_BUFFER_CONST)        SERIAL_rxBufferHead     = 0u;        SERIAL_rxBufferTail     = 0u;        SERIAL_rxBufferOverflow = 0u;    #endif /* (SERIAL_INTERNAL_RX_SW_BUFFER_CONST) */    #if(SERIAL_INTERNAL_TX_SW_BUFFER_CONST)        SERIAL_txBufferHead = 0u;        SERIAL_txBufferTail = 0u;    #endif /* (SERIAL_INTERNAL_TX_SW_BUFFER_CONST) */    }

/******************************************************************************** Function Name: quaddec_right_SetCounter********************************************************************************** Summary:*  Sets the current value of the counter.** Parameters:  *  value:  The new value. Parameter type is signed and per the counter size  *  setting.  ** Return: *  None.** Global variables:*  quaddec_right_count32SoftPart - modified to set hi 16 bit for current value *  of the 32-bit counter, when Counter size equal 32-bit.** Reentrant:*  No.********************************************************************************/void quaddec_right_SetCounter(int32 value){        #if ((quaddec_right_COUNTER_SIZE == 8u) || (quaddec_right_COUNTER_SIZE == 16u))                uint16 count;             #endif  /* (quaddec_right_COUNTER_SIZE == 8u) || (quaddec_right_COUNTER_SIZE == 16u) */           #if (quaddec_right_COUNTER_SIZE == 8u)                 count = (value ^ 0x80u);        quaddec_right_Cnt8_WriteCounter(count);            #endif  /* quaddec_right_COUNTER_SIZE == 8u */        #if (quaddec_right_COUNTER_SIZE == 16u)             count = (value ^ 0x8000u);        quaddec_right_Cnt16_WriteCounter(count);            #endif  /* quaddec_right_COUNTER_SIZE == 16u */        #if (quaddec_right_COUNTER_SIZE == 32u)            CyIntDisable(quaddec_right_ISR_NUMBER);                quaddec_right_Cnt16_WriteCounter(0x8000u);        quaddec_right_count32SoftPart = value;                CyIntEnable(quaddec_right_ISR_NUMBER);            #endif  /* quaddec_right_COUNTER_SIZE == 32u */}

    /*******************************************************************************    * Function Name: I2C_1_I2CInit    ********************************************************************************    *    * Summary:    *  Configures the SCB for the I2C operation.    *    * Parameters:    *  None    *    * Return:    *  None    *    *******************************************************************************/    void I2C_1_I2CInit(void)    {        /* Configure I2C interface */        I2C_1_CTRL_REG     = I2C_1_I2C_DEFAULT_CTRL;        I2C_1_I2C_CTRL_REG = I2C_1_I2C_DEFAULT_I2C_CTRL;    #if(I2C_1_CY_SCBIP_V0)        /* Adjust SDA filter settings. Ticket ID#150521 */        I2C_1_SET_I2C_CFG_SDA_FILT_TRIM(I2C_1_EC_AM_I2C_CFG_SDA_FILT_TRIM);    #endif /* (I2C_1_CY_SCBIP_V0) */        /* Configure RX direction */        I2C_1_RX_CTRL_REG      = I2C_1_I2C_DEFAULT_RX_CTRL;        I2C_1_RX_FIFO_CTRL_REG = I2C_1_I2C_DEFAULT_RX_FIFO_CTRL;        /* Set default address and mask */        I2C_1_RX_MATCH_REG     = I2C_1_I2C_DEFAULT_RX_MATCH;        /* Configure TX direction */        I2C_1_TX_CTRL_REG      = I2C_1_I2C_DEFAULT_TX_CTRL;        I2C_1_TX_FIFO_CTRL_REG = I2C_1_I2C_DEFAULT_TX_FIFO_CTRL;        /* Configure interrupt with I2C handler but do not enable it */        CyIntDisable    (I2C_1_ISR_NUMBER);        CyIntSetPriority(I2C_1_ISR_NUMBER, I2C_1_ISR_PRIORITY);    #if(!I2C_1_I2C_EXTERN_INTR_HANDLER)        (void) CyIntSetVector(I2C_1_ISR_NUMBER, &I2C_1_I2C_ISR);    #endif /* (I2C_1_I2C_EXTERN_INTR_HANDLER) */        /* Configure interrupt sources */    #if(!I2C_1_CY_SCBIP_V1_I2C_ONLY)        I2C_1_INTR_SPI_EC_MASK_REG = I2C_1_I2C_DEFAULT_INTR_SPI_EC_MASK;    #endif /* (!I2C_1_CY_SCBIP_V1_I2C_ONLY) */        I2C_1_INTR_I2C_EC_MASK_REG = I2C_1_I2C_DEFAULT_INTR_I2C_EC_MASK;        I2C_1_INTR_SLAVE_MASK_REG  = I2C_1_I2C_DEFAULT_INTR_SLAVE_MASK;        I2C_1_INTR_MASTER_MASK_REG = I2C_1_I2C_DEFAULT_INTR_MASTER_MASK;        I2C_1_INTR_RX_MASK_REG     = I2C_1_I2C_DEFAULT_INTR_RX_MASK;        I2C_1_INTR_TX_MASK_REG     = I2C_1_I2C_DEFAULT_INTR_TX_MASK;        /* Configure global variables */        I2C_1_state = I2C_1_I2C_FSM_IDLE;    #if(I2C_1_I2C_SLAVE)        /* Internal slave variable */        I2C_1_slStatus        = 0u;        I2C_1_slRdBufIndex    = 0u;        I2C_1_slWrBufIndex    = 0u;        I2C_1_slOverFlowCount = 0u;    #endif /* (I2C_1_I2C_SLAVE) */    #if(I2C_1_I2C_MASTER)    /* Internal master variable */        I2C_1_mstrStatus     = 0u;        I2C_1_mstrRdBufIndex = 0u;        I2C_1_mstrWrBufIndex = 0u;    #endif /* (I2C_1_I2C_MASTER) */    }

/******************************************************************************** Function Name: USBUART_Resume********************************************************************************** Summary:*  This function enables the USBFS block after power down mode.** Parameters:*  None.** Return:*  None.** Global variables:*  USBUART_backup - checked.** Reentrant:*  No.********************************************************************************/void USBUART_Resume(void) {    uint8 enableInterrupts;    enableInterrupts = CyEnterCriticalSection();    if(USBUART_backup.enableState != 0u)    {        #if(USBUART_DP_ISR_REMOVE == 0u)            CyIntDisable(USBUART_DP_INTC_VECT_NUM);        #endif /*  USBUART_DP_ISR_REMOVE */        /* Enable USB block */        USBUART_PM_ACT_CFG_REG |= USBUART_PM_ACT_EN_FSUSB;        /* Enable USB block for Standby Power Mode */        USBUART_PM_STBY_CFG_REG |= USBUART_PM_STBY_EN_FSUSB;        /* Enable core clock */        USBUART_USB_CLK_EN_REG |= USBUART_USB_CLK_ENABLE;        /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/        USBUART_PM_USB_CR0_REG |= USBUART_PM_USB_CR0_REF_EN;        /* The reference will be available ~40us after power restored */        CyDelayUs(40u);        /* Return VRegulator*/        USBUART_CR1_REG |= USBUART_backup.mode;        CyDelayUs(0u);  /*~50ns delay */        /* Enable USBIO */        USBUART_PM_USB_CR0_REG |= USBUART_PM_USB_CR0_PD_N;        CyDelayUs(2u);        /* Set the USBIO pull-up enable */        USBUART_PM_USB_CR0_REG |= USBUART_PM_USB_CR0_PD_PULLUP_N;        /* Re-init Arbiter configuration for DMA transfers */        #if(USBUART_EP_MM != USBUART__EP_MANUAL)            /* Usb arb interrupt enable */            USBUART_ARB_INT_EN_REG = USBUART_ARB_INT_MASK;            #if(USBUART_EP_MM == USBUART__EP_DMAMANUAL)                USBUART_ARB_CFG_REG = USBUART_ARB_CFG_MANUAL_DMA;            #endif   /*  USBUART_EP_MM == USBUART__EP_DMAMANUAL */            #if(USBUART_EP_MM == USBUART__EP_DMAAUTO)                /*Set cfg cmplt this rises DMA request when the full configuration is done */                USBUART_ARB_CFG_REG = USBUART_ARB_CFG_AUTO_DMA | USBUART_ARB_CFG_AUTO_MEM;            #endif   /*  USBUART_EP_MM == USBUART__EP_DMAAUTO */        #endif   /*  USBUART_EP_MM != USBUART__EP_MANUAL */        /* STALL_IN_OUT */        CY_SET_REG8(USBUART_EP0_CR_PTR, USBUART_MODE_STALL_IN_OUT);        /* Enable the SIE with a last address */        USBUART_CR0_REG |= USBUART_CR0_ENABLE;        CyDelayCycles(1u);        /* Finally, Enable d+ pullup and select iomode to USB mode*/        CY_SET_REG8(USBUART_USBIO_CR1_PTR, USBUART_USBIO_CR1_USBPUEN);        /* Restore USB register settings */        USBUART_RestoreConfig();    }    CyExitCriticalSection(enableInterrupts);}

/******************************************************************************** Function Name: SPI_Init********************************************************************************** Summary:*  Inits/Restores default SPIM configuration provided with customizer.** Parameters:*  None.** Return:*  None.** Side Effects:*  When this function is called it initializes all of the necessary parameters*  for execution. i.e. setting the initial interrupt mask, configuring the*  interrupt service routine, configuring the bit-counter parameters and*  clearing the FIFO and Status Register.** Reentrant:*  No.********************************************************************************/void SPI_Init(void) {    /* Initialize the Bit counter */    SPI_COUNTER_PERIOD_REG = SPI_BITCTR_INIT;    /* Init TX ISR  */    #if(0u != SPI_INTERNAL_TX_INT_ENABLED)        CyIntDisable         (SPI_TX_ISR_NUMBER);        CyIntSetPriority     (SPI_TX_ISR_NUMBER,  SPI_TX_ISR_PRIORITY);        (void) CyIntSetVector(SPI_TX_ISR_NUMBER, &SPI_TX_ISR);    #endif /* (0u != SPI_INTERNAL_TX_INT_ENABLED) */    /* Init RX ISR  */    #if(0u != SPI_INTERNAL_RX_INT_ENABLED)        CyIntDisable         (SPI_RX_ISR_NUMBER);        CyIntSetPriority     (SPI_RX_ISR_NUMBER,  SPI_RX_ISR_PRIORITY);        (void) CyIntSetVector(SPI_RX_ISR_NUMBER, &SPI_RX_ISR);    #endif /* (0u != SPI_INTERNAL_RX_INT_ENABLED) */    /* Clear any stray data from the RX and TX FIFO */    SPI_ClearFIFO();    #if(SPI_RX_SOFTWARE_BUF_ENABLED)        SPI_rxBufferFull  = 0u;        SPI_rxBufferRead  = 0u;        SPI_rxBufferWrite = 0u;    #endif /* (SPI_RX_SOFTWARE_BUF_ENABLED) */    #if(SPI_TX_SOFTWARE_BUF_ENABLED)        SPI_txBufferFull  = 0u;        SPI_txBufferRead  = 0u;        SPI_txBufferWrite = 0u;    #endif /* (SPI_TX_SOFTWARE_BUF_ENABLED) */    (void) SPI_ReadTxStatus(); /* Clear Tx status and swStatusTx */    (void) SPI_ReadRxStatus(); /* Clear Rx status and swStatusRx */    /* Configure TX and RX interrupt mask */    SPI_TX_STATUS_MASK_REG = SPI_TX_INIT_INTERRUPTS_MASK;    SPI_RX_STATUS_MASK_REG = SPI_RX_INIT_INTERRUPTS_MASK;}

/******************************************************************************** Function Name: emFile_SPI0_Stop********************************************************************************** Summary:*  Disable the SPI Master component.** Parameters:*  None.** Return:*  None.** Theory:*  Disable the clock input to enable operation.********************************************************************************/void emFile_SPI0_Stop(void) {    uint8 enableInterrupts = 0u;            enableInterrupts = CyEnterCriticalSection();        emFile_SPI0_TX_STATUS_ACTL_REG &= ~emFile_SPI0_INT_ENABLE;    emFile_SPI0_RX_STATUS_ACTL_REG &= ~emFile_SPI0_INT_ENABLE;        CyExitCriticalSection(enableInterrupts);        #if(emFile_SPI0_InternalClockUsed)            emFile_SPI0_IntClock_Disable();            #endif /* emFile_SPI0_InternalClockUsed */        #if(emFile_SPI0_InternalTxInterruptEnabled)            CyIntDisable(emFile_SPI0_TX_ISR_NUMBER);            #endif /* emFile_SPI0_InternalTxInterruptEnabled */        #if(emFile_SPI0_InternalRxInterruptEnabled)            CyIntDisable(emFile_SPI0_RX_ISR_NUMBER);            #endif /* emFile_SPI0_InternalRxInterruptEnabled */}

/******************************************************************************** Function Name: SPIM_Stop********************************************************************************** Summary:*  Disable the SPI Master component.** Parameters:*  None.** Return:*  None.** Theory:*  Disable the clock input to enable operation.********************************************************************************/void SPIM_Stop(void) {    uint8 enableInterrupts = 0u;            enableInterrupts = CyEnterCriticalSection();        SPIM_TX_STATUS_ACTL_REG &= ~SPIM_INT_ENABLE;    SPIM_RX_STATUS_ACTL_REG &= ~SPIM_INT_ENABLE;        CyExitCriticalSection(enableInterrupts);        #if(SPIM_InternalClockUsed)            SPIM_IntClock_Disable();            #endif /* SPIM_InternalClockUsed */        #if(SPIM_InternalTxInterruptEnabled)            CyIntDisable(SPIM_TX_ISR_NUMBER);            #endif /* SPIM_InternalTxInterruptEnabled */        #if(SPIM_InternalRxInterruptEnabled)            CyIntDisable(SPIM_RX_ISR_NUMBER);            #endif /* SPIM_InternalRxInterruptEnabled */}

/******************************************************************************** Function Name: quaddec_right_Init********************************************************************************** Summary:   *  Inits/Restores default QuadDec configuration provided with customizer.** Parameters:  *  None.** Return: *  None.********************************************************************************/void quaddec_right_Init(void) {          #if (quaddec_right_COUNTER_SIZE == 32u)              /* Disable Interrupt. */        CyIntDisable(quaddec_right_ISR_NUMBER);                /* Set the ISR to point to the quaddec_right_isr Interrupt. */        CyIntSetVector(quaddec_right_ISR_NUMBER, quaddec_right_ISR);                /* Set the priority. */        CyIntSetPriority(quaddec_right_ISR_NUMBER, quaddec_right_ISR_PRIORITY);                   #endif /* quaddec_right_COUNTER_SIZE == 32u */    }

/******************************************************************************** Function Name: CapSense_CSD_Sleep********************************************************************************** Summary:*  Disables the Active mode power.** Parameters:*  None** Return:*  None** Global Variables:*  CapSense_CSD_backup - used to save the component state before entering the sleep *  mode.********************************************************************************/void CapSense_CSD_Sleep(void){	CapSense_CSD_SaveConfig();			/* Disable interrupt */	CyIntDisable(CapSense_CSD_ISR_NUMBER);		CapSense_CSD_CSD_CFG_REG &= ~(CapSense_CSD_CSD_CFG_SENSE_COMP_EN | CapSense_CSD_CSD_CFG_SENSE_EN);		#if(CapSense_CSD_IDAC_CNT == 2u)		CapSense_CSD_CSD_CFG_REG &= ~(CapSense_CSD_CSD_CFG_ENABLE);	#endif /* (CapSense_CSD_IDAC_CNT == 2u) */		/* Disable Clocks */    CapSense_CSD_SenseClk_Stop();    CapSense_CSD_SampleClk_Stop();}

    /*******************************************************************************    * Function Name: SPI_SpiInit    ********************************************************************************    *    * Summary:    *  Configures the SCB for the SPI operation.    *    * Parameters:    *  None    *    * Return:    *  None    *    *******************************************************************************/    void SPI_SpiInit(void)    {        /* Configure SPI interface */        SPI_CTRL_REG     = SPI_SPI_DEFAULT_CTRL;        SPI_SPI_CTRL_REG = SPI_SPI_DEFAULT_SPI_CTRL;        /* Configure TX and RX direction */        SPI_RX_CTRL_REG      = SPI_SPI_DEFAULT_RX_CTRL;        SPI_RX_FIFO_CTRL_REG = SPI_SPI_DEFAULT_RX_FIFO_CTRL;        /* Configure TX and RX direction */        SPI_TX_CTRL_REG      = SPI_SPI_DEFAULT_TX_CTRL;        SPI_TX_FIFO_CTRL_REG = SPI_SPI_DEFAULT_TX_FIFO_CTRL;        /* Configure interrupt with SPI handler but do not enable it */    #if(SPI_SCB_IRQ_INTERNAL)            CyIntDisable    (SPI_ISR_NUMBER);            CyIntSetPriority(SPI_ISR_NUMBER, SPI_ISR_PRIORITY);            (void) CyIntSetVector(SPI_ISR_NUMBER, &SPI_SPI_UART_ISR);    #endif /* (SPI_SCB_IRQ_INTERNAL) */        /* Configure interrupt sources */        SPI_INTR_I2C_EC_MASK_REG = SPI_SPI_DEFAULT_INTR_I2C_EC_MASK;        SPI_INTR_SPI_EC_MASK_REG = SPI_SPI_DEFAULT_INTR_SPI_EC_MASK;        SPI_INTR_SLAVE_MASK_REG  = SPI_SPI_DEFAULT_INTR_SLAVE_MASK;        SPI_INTR_MASTER_MASK_REG = SPI_SPI_DEFAULT_INTR_MASTER_MASK;        SPI_INTR_RX_MASK_REG     = SPI_SPI_DEFAULT_INTR_RX_MASK;        SPI_INTR_TX_MASK_REG     = SPI_SPI_DEFAULT_INTR_TX_MASK;        /* Set active SS0 for master */    #if (SPI_SPI_MASTER_CONST)        SPI_SpiSetActiveSlaveSelect(SPI_SPI_SLAVE_SELECT0);    #endif /* (SPI_SPI_MASTER_CONST) */    #if(SPI_INTERNAL_RX_SW_BUFFER_CONST)        SPI_rxBufferHead     = 0u;        SPI_rxBufferTail     = 0u;        SPI_rxBufferOverflow = 0u;    #endif /* (SPI_INTERNAL_RX_SW_BUFFER_CONST) */    #if(SPI_INTERNAL_TX_SW_BUFFER_CONST)        SPI_txBufferHead = 0u;        SPI_txBufferTail = 0u;    #endif /* (SPI_INTERNAL_TX_SW_BUFFER_CONST) */    }

/******************************************************************************** Function Name: CapSense_Sleep********************************************************************************** Summary:*  Disables Active mode power.** Parameters:*  None** Return:*  None** Global Variables:*  CapSense_backup - used to save component state before enter sleep *  mode.********************************************************************************/void CapSense_Sleep(void){	CapSense_SaveConfig();			/* Disable interrupt */	CyIntDisable(CapSense_ISR_NUMBER);		CapSense_CSD_CFG_REG &= ~(CapSense_CSD_CFG_SENSE_EN);	CyDelayUs(100u);	CapSense_CSD_CFG_REG &= ~(CapSense_CSD_CFG_SENSE_COMP_EN);		CapSense_CSD_CFG_REG &= ~(CapSense_CSD_CFG_ENABLE);		/* Disable the Clocks */    CapSense_CSD_Clk1_Stop();    CapSense_CSD_Clk2_Stop();		/* Clear all sensors */    CapSense_ClearSensors();}

/******************************************************************************** Function Name: quaddec_right_Stop********************************************************************************** Summary:*  Turns off UDBs and other relevant hardware.** Parameters:  *  None.  ** Return: *  None.********************************************************************************/void quaddec_right_Stop(void) {                            uint8 enableInterrupts = 0u;        #if (quaddec_right_COUNTER_SIZE == 8u)        quaddec_right_Cnt8_Stop();    #else /* (quaddec_right_COUNTER_SIZE == 16u) || (quaddec_right_COUNTER_SIZE == 32u) */        quaddec_right_Cnt16_Stop();                                          /* counter disable */    #endif /* (quaddec_right_COUNTER_SIZE == 8u) */        enableInterrupts = CyEnterCriticalSection();        /* Disable interrupts interrupts from Statusi register */    quaddec_right_SR_AUX_CONTROL &= ~quaddec_right_INTERRUPTS_ENABLE;        CyExitCriticalSection(enableInterrupts);        #if (quaddec_right_COUNTER_SIZE == 32u)        CyIntDisable(quaddec_right_ISR_NUMBER);                              /* interrupt disable */    #endif /* quaddec_right_COUNTER_SIZE == 32u */}

/******************************************************************************** Function Name: quaddec_right_GetCounter********************************************************************************** Summary:*  Reports the current value of the counter.** Parameters:  *  None.  ** Return: *  The counter value. Return type is signed and per *  the counter size setting. A positive value indicates *  clockwise movement (B before A).** Global variables:*  quaddec_right_count32SoftPart - used to get hi 16 bit for current value *  of the 32-bit counter, when Counter size equal 32-bit.********************************************************************************/int32 quaddec_right_GetCounter(void) {    int32 count;    uint16 tmpCnt;           #if (quaddec_right_COUNTER_SIZE == 32u)              int16 hwCount;               #endif /* quaddec_right_COUNTER_SIZE == 32u */        #if (quaddec_right_COUNTER_SIZE == 8u)            tmpCnt = quaddec_right_Cnt8_ReadCounter();        count = tmpCnt ^ 0x80u;            #endif /* quaddec_right_COUNTER_SIZE == 8u */        #if (quaddec_right_COUNTER_SIZE == 16u)            tmpCnt = quaddec_right_Cnt16_ReadCounter();        count = tmpCnt ^ 0x8000u;                #endif /* quaddec_right_COUNTER_SIZE == 16u */         #if (quaddec_right_COUNTER_SIZE == 32u)            CyIntDisable(quaddec_right_ISR_NUMBER);                tmpCnt = quaddec_right_Cnt16_ReadCounter();        hwCount = tmpCnt ^ 0x8000u;        count = quaddec_right_count32SoftPart + hwCount;                CyIntEnable(quaddec_right_ISR_NUMBER);            #endif /* quaddec_right_COUNTER_SIZE == 32u */            return(count);    }

/****************************************************************************** Function Name: WatchdogTimer_Sync()******************************************************************************* Summary:* Synchronizes the watchdog timestamp to the current system time.** Parameters:* None** Return:* None** Theory:* Updates the watchdog timestamp to the current value.** Side Effects:* None** Note:******************************************************************************/void WatchdogTimer_Sync(void){    uint32 wdtIntState;    uint16 wdtCounter;    uint16 wdtPreviousMatch;    uint16 wdtCurrentMatch;    uint16 ticksElapsed;        /* Capture the WDT interrupt enable and disable the WDT interrupt. */    wdtIntState = CyIntGetState(WDT_INTERRUPT_NUM);    CyIntDisable(WDT_INTERRUPT_NUM);        wdtCounter = CY_GET_REG32(CYREG_WDT_CTRLOW);    wdtCurrentMatch = CY_GET_REG32(CYREG_WDT_MATCH);        /* Find time elapsed since last WDT interrupt */    wdtPreviousMatch = wdtCurrentMatch - nextTicks;    ticksElapsed = wdtCounter - wdtPreviousMatch;    watchdogTimestamp += ticksElapsed / WATCHDOG_TICKS_PER_MS;        /* Add slow timer period to match register for next interrupt */    WatchdogTimer_Unlock();        UPDATE_WDT_MATCH((uint16)(wdtCounter + nextTicks -                                   (ticksElapsed % WATCHDOG_TICKS_PER_MS)));    /* Clear pending WDT interrupt */    CY_SET_REG32(CYREG_WDT_CONTROL, CY_GET_REG32(CYREG_WDT_CONTROL) | WDT_CONTROL_WDT_INT0);    CyIntClearPending(WDT_INTERRUPT_NUM);    WatchdogTimer_Lock();        /* Restore WDT interrupt enable */    if(wdtIntState)    {        CyIntEnable(WDT_INTERRUPT_NUM);    }    }

/******************************************************************************** Function Name: EzI2C_Init********************************************************************************** Summary:*  Initializes or restores the component according to the Configure dialog*  settings. It is not necessary to call EZI2C_Init() because the EZI2C_Start()*  API calls this function, which is the preferred method to begin component*  operation.** Parameters:*  None.** Return:*  None.** Global variables:*  EzI2C_initVar - It is used to indicate the initial configuration*  of this component.  The variable is initialized to zero and set to 1*  the first time EzI2C_Start() is called. This allows component  !*  initialization without re-initialization in all subsequent calls*  to the EzI2C_Start() routine.**  EzI2C_curStatus - Stores the current status of the component.**  EzI2C_curState- Stores the current state of an I2C state machine.**  EzI2C_rwOffsetS1 - The global variable which stores an offset for read*  and write operations, is set at each write sequence of the first slave*  address is reset if EzI2C_initVar is 0, by*  EzI2C_initVar function call.**  EzI2C_rwIndexS1 - The global variable which stores a pointer to the*  next value to be read or written for the first slave address is reset if*  EzI2C_initVar is 0, by EzI2C_initVar function call.** EzI2C_wrProtectS1 - The global variable which stores an offset where data*  is read only for the first slave address is reset if*  EzI2C_initVar is 0, by EzI2C_initVar function call.**  EzI2C_rwOffsetS2 - The global variable, which stores an offset for read*  and write operations, is set at each write sequence of the second slave*  device is reset if EzI2C_initVar is 0, by EzI2C_initVar*  function call.**  EzI2C_rwIndexS2 - The global variable which stores a pointer to the*  next value to be read or written for the second slave address is reset if*  EzI2C_initVar is 0, by EzI2C_initVar function call.** EzI2C_wrProtectS2 - The global variable which stores an offset where data*  is read only for the second slave address is reset if*  EzI2C_initVar is 0, by EzI2C_initVar function call.** Reentrant:*  No.********************************************************************************/void EzI2C_Init(void) {    /* Configure fixed function block */    EzI2C_CFG_REG  = EzI2C_DEFAULT_CFG;    EzI2C_XCFG_REG = EzI2C_DEFAULT_XCFG;    EzI2C_ADDR_REG = EzI2C_DEFAULT_ADDR;    EzI2C_CLKDIV1_REG = EzI2C_DEFAULT_CLKDIV1;    EzI2C_CLKDIV2_REG = EzI2C_DEFAULT_CLKDIV2;#if (EzI2C_TWO_ADDRESSES == EzI2C_ADDRESSES)    /* Set address variables */    EzI2C_SetAddress1(EzI2C_DEFAULT_ADDR1);    EzI2C_SetAddress2(EzI2C_DEFAULT_ADDR2);#endif /* #if (EzI2C_TWO_ADDRESSES == EzI2C_ADDRESSES) */    /* Configure interrupt */    CyIntDisable         (EzI2C_ISR_NUMBER);    CyIntSetPriority     (EzI2C_ISR_NUMBER, EzI2C_ISR_PRIORITY);    (void) CyIntSetVector(EzI2C_ISR_NUMBER, &EzI2C_ISR);     /* Reset state and status to default */    EzI2C_curState  = EzI2C_SM_IDLE;    EzI2C_curStatus = 0u;    /* Reset all buffer 1 indexes (primary address) */    EzI2C_rwOffsetS1  = 0u;    EzI2C_rwIndexS1   = 0u;    EzI2C_wrProtectS1 = 0u;#if (EzI2C_ADDRESSES == EzI2C_TWO_ADDRESSES)    /* Reset all buffer 2 indexes (secondary address) */    EzI2C_rwOffsetS2  = 0u;    EzI2C_rwIndexS2   = 0u;    EzI2C_wrProtectS2 = 0u;#endif  /* (EzI2C_ADDRESSES == EzI2C_TWO_ADDRESSES) */}

/******************************************************************************** Function Name: I2C_Init********************************************************************************** Summary:*  Initializes I2C registers with initial values provided from customizer.** Parameters:*  None.** Return:*  None.** Global variables:*  None.** Reentrant:*  No.********************************************************************************/void I2C_Init(void) {#if (I2C_FF_IMPLEMENTED)    /* Configure fixed function block */    I2C_CFG_REG  = I2C_DEFAULT_CFG;    I2C_XCFG_REG = I2C_DEFAULT_XCFG;    I2C_ADDR_REG = I2C_DEFAULT_ADDR;    I2C_CLKDIV1_REG = LO8(I2C_DEFAULT_DIVIDE_FACTOR);    I2C_CLKDIV2_REG = HI8(I2C_DEFAULT_DIVIDE_FACTOR);#else    uint8 intState;    /* Configure control and interrupt sources */    I2C_CFG_REG      = I2C_DEFAULT_CFG;    I2C_INT_MASK_REG = I2C_DEFAULT_INT_MASK;    /* Enable interrupt generation in status */    intState = CyEnterCriticalSection();    I2C_INT_ENABLE_REG |= I2C_INTR_ENABLE;    CyExitCriticalSection(intState);    /* Configure bit counter */    #if (I2C_MODE_SLAVE_ENABLED)        I2C_PERIOD_REG = I2C_DEFAULT_PERIOD;    #endif  /* (I2C_MODE_SLAVE_ENABLED) */    /* Configure clock generator */    #if (I2C_MODE_MASTER_ENABLED)        I2C_MCLK_PRD_REG = I2C_DEFAULT_MCLK_PRD;        I2C_MCLK_CMP_REG = I2C_DEFAULT_MCLK_CMP;    #endif /* (I2C_MODE_MASTER_ENABLED) */#endif /* (I2C_FF_IMPLEMENTED) */#if (I2C_TIMEOUT_ENABLED)    I2C_TimeoutInit();#endif /* (I2C_TIMEOUT_ENABLED) */    /* Configure internal interrupt */    CyIntDisable    (I2C_ISR_NUMBER);    CyIntSetPriority(I2C_ISR_NUMBER, I2C_ISR_PRIORITY);    #if (I2C_INTERN_I2C_INTR_HANDLER)        (void) CyIntSetVector(I2C_ISR_NUMBER, &I2C_ISR);    #endif /* (I2C_INTERN_I2C_INTR_HANDLER) */    /* Set FSM to default state */    I2C_state = I2C_SM_IDLE;#if (I2C_MODE_SLAVE_ENABLED)    /* Clear status and buffers index */    I2C_slStatus = 0u;    I2C_slRdBufIndex = 0u;    I2C_slWrBufIndex = 0u;    /* Configure matched address */    I2C_SlaveSetAddress(I2C_DEFAULT_ADDR);#endif /* (I2C_MODE_SLAVE_ENABLED) */#if (I2C_MODE_MASTER_ENABLED)    /* Clear status and buffers index */    I2C_mstrStatus = 0u;    I2C_mstrRdBufIndex = 0u;    I2C_mstrWrBufIndex = 0u;#endif /* (I2C_MODE_MASTER_ENABLED) */}

/******************************************************************************** Function Name: emFile_1_SPI0_DisableRxInt********************************************************************************** Summary:*  Disable internal Rx interrupt generation.** Parameters:*  None.** Return:*  None.** Theory:*  Disable the internal Rx interrupt output -or- the interrupt component itself.********************************************************************************/void emFile_1_SPI0_DisableRxInt(void){#if(0u != emFile_1_SPI0_INTERNAL_RX_INT_ENABLED)    CyIntDisable(emFile_1_SPI0_RX_ISR_NUMBER);#endif /* (0u != emFile_1_SPI0_INTERNAL_RX_INT_ENABLED) */}

/******************************************************************************** Function Name: USB_Bootloader_Resume********************************************************************************** Summary:*  This function enables the USBFS block after power down mode.** Parameters:*  None.** Return:*  None.** Global variables:*  USB_Bootloader_backup - checked.** Reentrant:*  No.********************************************************************************/void USB_Bootloader_Resume(void) {    uint8 enableInterrupts;    enableInterrupts = CyEnterCriticalSection();    if(USB_Bootloader_backup.enableState != 0u)    {        #if(USB_Bootloader_DP_ISR_REMOVE == 0u)            CyIntDisable(USB_Bootloader_DP_INTC_VECT_NUM);        #endif /* End USB_Bootloader_DP_ISR_REMOVE */        #if(CY_PSOC3_ES2 || CY_PSOC5_ES1)            /* Enable USBIO for TO3 */            USB_Bootloader_PM_AVAIL_CR_REG |= USB_Bootloader_PM_AVAIL_EN_FSUSBIO;            /* Bus Reset Length, It has correct default value in ES3 */            USB_Bootloader_BUS_RST_CNT_REG = USB_Bootloader_BUS_RST_COUNT;        #endif /* End CY_PSOC3_ES2 || CY_PSOC5_ES1 */        /* Enable USB block */        USB_Bootloader_PM_ACT_CFG_REG |= USB_Bootloader_PM_ACT_EN_FSUSB;        /* Enable USB block for Standby Power Mode */        USB_Bootloader_PM_STBY_CFG_REG |= USB_Bootloader_PM_STBY_EN_FSUSB;        /* Enable core clock */        USB_Bootloader_USB_CLK_EN_REG |= USB_Bootloader_USB_CLK_ENABLE;        /* USBIO Wakeup Sequencing for TO4 */        #if (CY_PSOC3_ES3 || CY_PSOC5_ES2)            /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/            USB_Bootloader_PM_USB_CR0_REG |= USB_Bootloader_PM_USB_CR0_REF_EN;            /* The reference will be available ~40us after power restored */            CyDelayUs(40);            /* Return VRegulator*/            USB_Bootloader_CR1_REG |= USB_Bootloader_backup.mode;            CyDelayUs(0);  /*~50ns delay */            /* Enable USBIO */            USB_Bootloader_PM_USB_CR0_REG |= USB_Bootloader_PM_USB_CR0_PD_N;            CyDelayUs(2);            /* Set the USBIO pull-up enable */            USB_Bootloader_PM_USB_CR0_REG |= USB_Bootloader_PM_USB_CR0_PD_PULLUP_N;        #endif /* End CY_PSOC3_ES3 || CY_PSOC5_ES2 */        /* Reinit Arbiter congiguration for DMA transfers */        #if(USB_Bootloader_EP_MM != USB_Bootloader__EP_MANUAL)            /* usb arb interrupt enable */            USB_Bootloader_ARB_INT_EN_REG = USB_Bootloader_ARB_INT_MASK;            #if(USB_Bootloader_EP_MM == USB_Bootloader__EP_DMAMANUAL)                USB_Bootloader_ARB_CFG_REG = USB_Bootloader_ARB_CFG_MANUAL_DMA;            #endif   /* End USB_Bootloader_EP_MM == USB_Bootloader__EP_DMAMANUAL */            #if(USB_Bootloader_EP_MM == USB_Bootloader__EP_DMAAUTO)                /*Set cfg cmplt this rises DMA request when the full configuration is done */                USB_Bootloader_ARB_CFG_REG = USB_Bootloader_ARB_CFG_AUTO_DMA | USB_Bootloader_ARB_CFG_AUTO_MEM;            #endif   /* End USB_Bootloader_EP_MM == USB_Bootloader__EP_DMAAUTO */        #endif   /* End USB_Bootloader_EP_MM != USB_Bootloader__EP_MANUAL */        /* STALL_IN_OUT */        CY_SET_REG8(USB_Bootloader_EP0_CR_PTR, USB_Bootloader_MODE_STALL_IN_OUT);        /* Enable the SIE with a last address */        USB_Bootloader_CR0_REG |= USB_Bootloader_CR0_ENABLE;        /* Finally, Enable d+ pullup and select iomode to USB mode*/        CY_SET_REG8(USB_Bootloader_USBIO_CR1_PTR, USB_Bootloader_USBIO_CR1_USBPUEN);    }    CyExitCriticalSection(enableInterrupts);}

/******************************************************************************** FUNCTION NAME: void UART_DisableTxInt(void)** Summary:* Disable TX interrupt generation** Parameters:* -None-** Return:* -None-** Theory:* Disable the interrupt output -or- the interrupt component itself** Side Effects:* -None-*******************************************************************************/void UART_DisableTxInt(void){	CyIntDisable(UART_TX_VECT_NUM);}

/******************************************************************************** Function Name: SPI_DisableRxInt********************************************************************************** Summary:*  Disable internal Rx interrupt generation.** Parameters:*  None.** Return:*  None.** Theory:*  Disable the internal Rx interrupt output -or- the interrupt component itself.********************************************************************************/void SPI_DisableRxInt(void) {    #if(0u != SPI_INTERNAL_RX_INT_ENABLED)        CyIntDisable(SPI_RX_ISR_NUMBER);    #endif /* (0u != SPI_INTERNAL_RX_INT_ENABLED) */}

/******************************************************************************** Function Name: ST7528_1_SPI_DisableTxInt********************************************************************************** Summary:*  Disable internal Tx interrupt generation.** Parameters:*  None.** Return:*  None.** Theory:*  Disable the internal Tx interrupt output -or- the interrupt component itself.********************************************************************************/void ST7528_1_SPI_DisableTxInt(void) {    #if(0u != ST7528_1_SPI_INTERNAL_TX_INT_ENABLED)        CyIntDisable(ST7528_1_SPI_TX_ISR_NUMBER);    #endif /* (0u != ST7528_1_SPI_INTERNAL_TX_INT_ENABLED) */}

//.........这里部分代码省略.........            UART_1_txBuffer      =         config->txBuffer;            UART_1_txDataBits    = (uint8) config->dataBits;            UART_1_txBufferSize  = (uint8) config->txBufferSize;            /* Configure UART interface */            if(UART_1_UART_MODE_IRDA == config->mode)            {                /* OVS settings: IrDA */                UART_1_CTRL_REG  = ((0u != config->enableIrdaLowPower) ?                                                (UART_1_UART_GET_CTRL_OVS_IRDA_LP(config->oversample)) :                                                (UART_1_CTRL_OVS_IRDA_OVS16));            }            else            {                /* OVS settings: UART and SmartCard */                UART_1_CTRL_REG  = UART_1_GET_CTRL_OVS(config->oversample);            }            UART_1_CTRL_REG     |= UART_1_GET_CTRL_BYTE_MODE  (config->enableByteMode)      |                                             UART_1_GET_CTRL_ADDR_ACCEPT(config->multiprocAcceptAddr) |                                             UART_1_CTRL_UART;            /* Configure sub-mode: UART, SmartCard or IrDA */            UART_1_UART_CTRL_REG = UART_1_GET_UART_CTRL_MODE(config->mode);            /* Configure RX direction */            UART_1_UART_RX_CTRL_REG = UART_1_GET_UART_RX_CTRL_MODE(config->stopBits)              |                                        UART_1_GET_UART_RX_CTRL_POLARITY(config->enableInvertedRx)          |                                        UART_1_GET_UART_RX_CTRL_MP_MODE(config->enableMultiproc)            |                                        UART_1_GET_UART_RX_CTRL_DROP_ON_PARITY_ERR(config->dropOnParityErr) |                                        UART_1_GET_UART_RX_CTRL_DROP_ON_FRAME_ERR(config->dropOnFrameErr);            if(UART_1_UART_PARITY_NONE != config->parity)            {               UART_1_UART_RX_CTRL_REG |= UART_1_GET_UART_RX_CTRL_PARITY(config->parity) |                                                    UART_1_UART_RX_CTRL_PARITY_ENABLED;            }            UART_1_RX_CTRL_REG      = UART_1_GET_RX_CTRL_DATA_WIDTH(config->dataBits)       |                                                UART_1_GET_RX_CTRL_MEDIAN(config->enableMedianFilter) |                                                UART_1_GET_UART_RX_CTRL_ENABLED(config->direction);            UART_1_RX_FIFO_CTRL_REG = UART_1_GET_RX_FIFO_CTRL_TRIGGER_LEVEL(config->rxTriggerLevel);            /* Configure MP address */            UART_1_RX_MATCH_REG     = UART_1_GET_RX_MATCH_ADDR(config->multiprocAddr) |                                                UART_1_GET_RX_MATCH_MASK(config->multiprocAddrMask);            /* Configure RX direction */            UART_1_UART_TX_CTRL_REG = UART_1_GET_UART_TX_CTRL_MODE(config->stopBits) |                                                UART_1_GET_UART_TX_CTRL_RETRY_NACK(config->enableRetryNack);            if(UART_1_UART_PARITY_NONE != config->parity)            {               UART_1_UART_TX_CTRL_REG |= UART_1_GET_UART_TX_CTRL_PARITY(config->parity) |                                                    UART_1_UART_TX_CTRL_PARITY_ENABLED;            }            UART_1_TX_CTRL_REG      = UART_1_GET_TX_CTRL_DATA_WIDTH(config->dataBits)    |                                                UART_1_GET_UART_TX_CTRL_ENABLED(config->direction);            UART_1_TX_FIFO_CTRL_REG = UART_1_GET_TX_FIFO_CTRL_TRIGGER_LEVEL(config->txTriggerLevel);        #if !(UART_1_CY_SCBIP_V0 || UART_1_CY_SCBIP_V1)            UART_1_UART_FLOW_CTRL_REG = UART_1_GET_UART_FLOW_CTRL_CTS_ENABLE(config->enableCts) | /                                            UART_1_GET_UART_FLOW_CTRL_CTS_POLARITY (config->ctsPolarity)  | /                                            UART_1_GET_UART_FLOW_CTRL_RTS_POLARITY (config->rtsPolarity)  | /                                            UART_1_GET_UART_FLOW_CTRL_TRIGGER_LEVEL(config->rtsRxFifoLevel);        #endif /* !(UART_1_CY_SCBIP_V0 || UART_1_CY_SCBIP_V1) */            /* Configure interrupt with UART handler but do not enable it */            CyIntDisable    (UART_1_ISR_NUMBER);            CyIntSetPriority(UART_1_ISR_NUMBER, UART_1_ISR_PRIORITY);            (void) CyIntSetVector(UART_1_ISR_NUMBER, &UART_1_SPI_UART_ISR);            /* Configure WAKE interrupt */        #if(UART_1_UART_RX_WAKEUP_IRQ)            CyIntDisable    (UART_1_RX_WAKE_ISR_NUMBER);            CyIntSetPriority(UART_1_RX_WAKE_ISR_NUMBER, UART_1_RX_WAKE_ISR_PRIORITY);            (void) CyIntSetVector(UART_1_RX_WAKE_ISR_NUMBER, &UART_1_UART_WAKEUP_ISR);        #endif /* (UART_1_UART_RX_WAKEUP_IRQ) */            /* Configure interrupt sources */            UART_1_INTR_I2C_EC_MASK_REG = UART_1_NO_INTR_SOURCES;            UART_1_INTR_SPI_EC_MASK_REG = UART_1_NO_INTR_SOURCES;            UART_1_INTR_SLAVE_MASK_REG  = UART_1_NO_INTR_SOURCES;            UART_1_INTR_MASTER_MASK_REG = UART_1_NO_INTR_SOURCES;            UART_1_INTR_RX_MASK_REG     = config->rxInterruptMask;            UART_1_INTR_TX_MASK_REG     = config->txInterruptMask;            /* Clear RX buffer indexes */            UART_1_rxBufferHead     = 0u;            UART_1_rxBufferTail     = 0u;            UART_1_rxBufferOverflow = 0u;            /* Clear TX buffer indexes */            UART_1_txBufferHead = 0u;            UART_1_txBufferTail = 0u;        }    }

    /*******************************************************************************    * Function Name: I2C_MASTER_I2CInit    ********************************************************************************    *    * Summary:    *  Configures the SCB for I2C operation.    *    * Parameters:    *  config:  Pointer to a structure that contains the following ordered list of    *           fields. These fields match the selections available in the    *           customizer.    *    * Return:    *  None    *    *******************************************************************************/    void I2C_MASTER_I2CInit(const I2C_MASTER_I2C_INIT_STRUCT *config)    {        uint32 medianFilter;        uint32 locEnableWake;        if(NULL == config)        {            CYASSERT(0u != 0u); /* Halt execution due to bad function parameter */        }        else        {            /* Configure pins */            I2C_MASTER_SetPins(I2C_MASTER_SCB_MODE_I2C, I2C_MASTER_DUMMY_PARAM,                                                                    I2C_MASTER_DUMMY_PARAM);            /* Store internal configuration */            I2C_MASTER_scbMode       = (uint8) I2C_MASTER_SCB_MODE_I2C;            I2C_MASTER_scbEnableWake = (uint8) config->enableWake;            I2C_MASTER_scbEnableIntr = (uint8) I2C_MASTER_SCB_IRQ_INTERNAL;            I2C_MASTER_mode          = (uint8) config->mode;            I2C_MASTER_acceptAddr    = (uint8) config->acceptAddr;        #if (I2C_MASTER_CY_SCBIP_V0)            /* Adjust SDA filter settings. Ticket ID#150521 */            I2C_MASTER_SET_I2C_CFG_SDA_FILT_TRIM(I2C_MASTER_EC_AM_I2C_CFG_SDA_FILT_TRIM);        #endif /* (I2C_MASTER_CY_SCBIP_V0) */            /* Adjust AF and DF filter settings. Ticket ID#176179 */            if (((I2C_MASTER_I2C_MODE_SLAVE != config->mode) &&                 (config->dataRate <= I2C_MASTER_I2C_DATA_RATE_FS_MODE_MAX)) ||                 (I2C_MASTER_I2C_MODE_SLAVE == config->mode))            {                /* AF = 1, DF = 0 */                I2C_MASTER_I2C_CFG_ANALOG_FITER_ENABLE;                medianFilter = I2C_MASTER_DIGITAL_FILTER_DISABLE;            }            else            {                /* AF = 0, DF = 1 */                I2C_MASTER_I2C_CFG_ANALOG_FITER_DISABLE;                medianFilter = I2C_MASTER_DIGITAL_FILTER_ENABLE;            }        #if (!I2C_MASTER_CY_SCBIP_V0)            locEnableWake = (I2C_MASTER_I2C_MULTI_MASTER_SLAVE) ? (0u) : (config->enableWake);        #else            locEnableWake = config->enableWake;        #endif /* (!I2C_MASTER_CY_SCBIP_V0) */            /* Configure I2C interface */            I2C_MASTER_CTRL_REG     = I2C_MASTER_GET_CTRL_BYTE_MODE  (config->enableByteMode) |                                            I2C_MASTER_GET_CTRL_ADDR_ACCEPT(config->acceptAddr)     |                                            I2C_MASTER_GET_CTRL_EC_AM_MODE (locEnableWake);            I2C_MASTER_I2C_CTRL_REG = I2C_MASTER_GET_I2C_CTRL_HIGH_PHASE_OVS(config->oversampleHigh) |                                            I2C_MASTER_GET_I2C_CTRL_LOW_PHASE_OVS (config->oversampleLow)  |                                            I2C_MASTER_GET_I2C_CTRL_SL_MSTR_MODE  (config->mode)           |                                            I2C_MASTER_I2C_CTRL;            /* Configure RX direction */            I2C_MASTER_RX_CTRL_REG      = I2C_MASTER_GET_RX_CTRL_MEDIAN(medianFilter) |                                                I2C_MASTER_I2C_RX_CTRL;            I2C_MASTER_RX_FIFO_CTRL_REG = I2C_MASTER_CLEAR_REG;            /* Set default address and mask */            I2C_MASTER_RX_MATCH_REG    = ((I2C_MASTER_I2C_SLAVE) ?                                                (I2C_MASTER_GET_I2C_8BIT_ADDRESS(config->slaveAddr) |                                                 I2C_MASTER_GET_RX_MATCH_MASK(config->slaveAddrMask)) :                                                (I2C_MASTER_CLEAR_REG));            /* Configure TX direction */            I2C_MASTER_TX_CTRL_REG      = I2C_MASTER_I2C_TX_CTRL;            I2C_MASTER_TX_FIFO_CTRL_REG = I2C_MASTER_CLEAR_REG;            /* Configure interrupt with I2C handler but do not enable it */            CyIntDisable    (I2C_MASTER_ISR_NUMBER);            CyIntSetPriority(I2C_MASTER_ISR_NUMBER, I2C_MASTER_ISR_PRIORITY);            (void) CyIntSetVector(I2C_MASTER_ISR_NUMBER, &I2C_MASTER_I2C_ISR);            /* Configure interrupt sources *///.........这里部分代码省略.........

/******************************************************************************** Function Name: Sensirion_I2C_Init********************************************************************************** Summary:*  Initializes I2C registers with initial values provided from customizer.** Parameters:*  None** Return:*  None** Global variables:*  None** Reentrant:*  No********************************************************************************/void Sensirion_I2C_Init(void) {    #if(Sensirion_I2C_FF_IMPLEMENTED)        Sensirion_I2C_CFG_REG  = Sensirion_I2C_DEFAULT_CFG;        Sensirion_I2C_XCFG_REG = Sensirion_I2C_DEFAULT_XCFG;        #if(CY_PSOC5A)            Sensirion_I2C_CLKDIV_REG  = LO8(Sensirion_I2C_DEFAULT_DIVIDE_FACTOR);        #else            Sensirion_I2C_CLKDIV1_REG = LO8(Sensirion_I2C_DEFAULT_DIVIDE_FACTOR);            Sensirion_I2C_CLKDIV2_REG = HI8(Sensirion_I2C_DEFAULT_DIVIDE_FACTOR);        #endif /* (CY_PSOC5A) */    #else        uint8 enableInterrupts;        Sensirion_I2C_CFG_REG      = Sensirion_I2C_DEFAULT_CFG;      /* control  */        Sensirion_I2C_INT_MASK_REG = Sensirion_I2C_DEFAULT_INT_MASK; /* int_mask */        /* Enable interrupts from block */        enableInterrupts = CyEnterCriticalSection();        Sensirion_I2C_INT_ENABLE_REG |= Sensirion_I2C_INTR_ENABLE; /* aux_ctl */        CyExitCriticalSection(enableInterrupts);        #if(Sensirion_I2C_MODE_MASTER_ENABLED)            Sensirion_I2C_MCLK_PRD_REG = Sensirion_I2C_DEFAULT_MCLK_PRD;            Sensirion_I2C_MCLK_CMP_REG = Sensirion_I2C_DEFAULT_MCLK_CMP;         #endif /* (Sensirion_I2C_MODE_MASTER_ENABLED) */        #if(Sensirion_I2C_MODE_SLAVE_ENABLED)            Sensirion_I2C_PERIOD_REG = Sensirion_I2C_DEFAULT_PERIOD;        #endif  /* (Sensirion_I2C_MODE_SLAVE_ENABLED) */    #endif /* (Sensirion_I2C_FF_IMPLEMENTED) */    #if(Sensirion_I2C_TIMEOUT_ENABLED)        Sensirion_I2C_TimeoutInit();    #endif /* (Sensirion_I2C_TIMEOUT_ENABLED) */    /* Disable Interrupt and set vector and priority */    CyIntDisable    (Sensirion_I2C_ISR_NUMBER);    CyIntSetPriority(Sensirion_I2C_ISR_NUMBER, Sensirion_I2C_ISR_PRIORITY);    #if(Sensirion_I2C_INTERN_I2C_INTR_HANDLER)        (void) CyIntSetVector(Sensirion_I2C_ISR_NUMBER, &Sensirion_I2C_ISR);    #endif /* (Sensirion_I2C_INTERN_I2C_INTR_HANDLER) */    /* Put state machine in idle state */    Sensirion_I2C_state = Sensirion_I2C_SM_IDLE;    #if(Sensirion_I2C_MODE_SLAVE_ENABLED)        /* Reset status and buffers index */        Sensirion_I2C_SlaveClearReadBuf();        Sensirion_I2C_SlaveClearWriteBuf();        Sensirion_I2C_slStatus = 0u; /* Reset slave status */        /* Set default address */        Sensirion_I2C_SlaveSetAddress(Sensirion_I2C_DEFAULT_ADDR);    #endif /* (Sensirion_I2C_MODE_SLAVE_ENABLED) */    #if(Sensirion_I2C_MODE_MASTER_ENABLED)        /* Reset status and buffers index */        Sensirion_I2C_MasterClearReadBuf();        Sensirion_I2C_MasterClearWriteBuf();        (void) Sensirion_I2C_MasterClearStatus();    #endif /* (Sensirion_I2C_MODE_MASTER_ENABLED) */}