自学教程：C++ CyIntSetPriority函数代码示例

/******************************************************************************** Function Name: SPIM_Init********************************************************************************** Summary:*  Inits/Restores default SPIM configuration provided with customizer.** Parameters:*  None.** Return:*  None.** Side Effects:*  When this function is called it initializes all of the necessary parameters*  for execution. i.e. setting the initial interrupt mask, configuring the *  interrupt service routine, configuring the bit-counter parameters and *  clearing the FIFO and Status Register.** Reentrant:*  No.********************************************************************************/void SPIM_Init(void){        /* Initialize the Bit counter */    SPIM_COUNTER_PERIOD_REG = SPIM_BITCTR_INIT;        /* ISR initialization  */      #if(SPIM_InternalTxInterruptEnabled)            CyIntDisable(SPIM_TX_ISR_NUMBER);        /* Set the ISR to point to the SPIM_isr Interrupt. */        CyIntSetVector(SPIM_TX_ISR_NUMBER, SPIM_TX_ISR);        /* Set the priority. */        CyIntSetPriority(SPIM_TX_ISR_NUMBER, SPIM_TX_ISR_PRIORITY);            #endif /* SPIM_InternalTxInterruptEnabled */                                        #if(SPIM_InternalRxInterruptEnabled)            CyIntDisable(SPIM_RX_ISR_NUMBER);        /* Set the ISR to point to the SPIM_isr Interrupt. */        CyIntSetVector(SPIM_RX_ISR_NUMBER, SPIM_RX_ISR);        /* Set the priority. */        CyIntSetPriority(SPIM_RX_ISR_NUMBER, SPIM_RX_ISR_PRIORITY);            #endif /* SPIM_InternalRxInterruptEnabled */        /* Clear any stray data from the RX and TX FIFO */    	SPIM_ClearFIFO();		#if(SPIM_RXBUFFERSIZE > 4u)            SPIM_rxBufferRead = 0u;        SPIM_rxBufferWrite = 0u;    #endif /* SPIM_RXBUFFERSIZE > 4u */	    #if(SPIM_TXBUFFERSIZE > 4u)            SPIM_txBufferRead = 0u;        SPIM_txBufferWrite = 0u;    #endif /* SPIM_TXBUFFERSIZE > 4u */        (void) SPIM_ReadTxStatus(); /* Clear any pending status bits */    (void) SPIM_ReadRxStatus(); /* Clear any pending status bits */		/* Configure the Initial interrupt mask */    #if (SPIM_TXBUFFERSIZE > 4u)        SPIM_TX_STATUS_MASK_REG  = SPIM_TX_INIT_INTERRUPTS_MASK &                                                 ~SPIM_STS_TX_FIFO_NOT_FULL;                    	#else /* SPIM_TXBUFFERSIZE < 4u */            SPIM_TX_STATUS_MASK_REG  = SPIM_TX_INIT_INTERRUPTS_MASK;       	#endif /* SPIM_TXBUFFERSIZE > 4u */        SPIM_RX_STATUS_MASK_REG  = SPIM_RX_INIT_INTERRUPTS_MASK; }

    /*******************************************************************************    * Function Name: SCB_1_UartInit    ****************************************************************************//**    *    *  Configures the SCB for the UART operation.    *    *******************************************************************************/    void SCB_1_UartInit(void)    {        /* Configure UART interface */        SCB_1_CTRL_REG = SCB_1_UART_DEFAULT_CTRL;        /* Configure sub-mode: UART, SmartCard or IrDA */        SCB_1_UART_CTRL_REG = SCB_1_UART_DEFAULT_UART_CTRL;        /* Configure RX direction */        SCB_1_UART_RX_CTRL_REG = SCB_1_UART_DEFAULT_UART_RX_CTRL;        SCB_1_RX_CTRL_REG      = SCB_1_UART_DEFAULT_RX_CTRL;        SCB_1_RX_FIFO_CTRL_REG = SCB_1_UART_DEFAULT_RX_FIFO_CTRL;        SCB_1_RX_MATCH_REG     = SCB_1_UART_DEFAULT_RX_MATCH_REG;        /* Configure TX direction */        SCB_1_UART_TX_CTRL_REG = SCB_1_UART_DEFAULT_UART_TX_CTRL;        SCB_1_TX_CTRL_REG      = SCB_1_UART_DEFAULT_TX_CTRL;        SCB_1_TX_FIFO_CTRL_REG = SCB_1_UART_DEFAULT_TX_FIFO_CTRL;    #if !(SCB_1_CY_SCBIP_V0 || SCB_1_CY_SCBIP_V1)        SCB_1_UART_FLOW_CTRL_REG = SCB_1_UART_DEFAULT_FLOW_CTRL;    #endif /* !(SCB_1_CY_SCBIP_V0 || SCB_1_CY_SCBIP_V1) */        /* Configure interrupt with UART handler but do not enable it */    #if(SCB_1_SCB_IRQ_INTERNAL)        CyIntDisable    (SCB_1_ISR_NUMBER);        CyIntSetPriority(SCB_1_ISR_NUMBER, SCB_1_ISR_PRIORITY);        (void) CyIntSetVector(SCB_1_ISR_NUMBER, &SCB_1_SPI_UART_ISR);    #endif /* (SCB_1_SCB_IRQ_INTERNAL) */        /* Configure WAKE interrupt */    #if(SCB_1_UART_RX_WAKEUP_IRQ)        CyIntDisable    (SCB_1_RX_WAKE_ISR_NUMBER);        CyIntSetPriority(SCB_1_RX_WAKE_ISR_NUMBER, SCB_1_RX_WAKE_ISR_PRIORITY);        (void) CyIntSetVector(SCB_1_RX_WAKE_ISR_NUMBER, &SCB_1_UART_WAKEUP_ISR);    #endif /* (SCB_1_UART_RX_WAKEUP_IRQ) */        /* Configure interrupt sources */        SCB_1_INTR_I2C_EC_MASK_REG = SCB_1_UART_DEFAULT_INTR_I2C_EC_MASK;        SCB_1_INTR_SPI_EC_MASK_REG = SCB_1_UART_DEFAULT_INTR_SPI_EC_MASK;        SCB_1_INTR_SLAVE_MASK_REG  = SCB_1_UART_DEFAULT_INTR_SLAVE_MASK;        SCB_1_INTR_MASTER_MASK_REG = SCB_1_UART_DEFAULT_INTR_MASTER_MASK;        SCB_1_INTR_RX_MASK_REG     = SCB_1_UART_DEFAULT_INTR_RX_MASK;        SCB_1_INTR_TX_MASK_REG     = SCB_1_UART_DEFAULT_INTR_TX_MASK;            /* Configure TX interrupt sources to restore. */        SCB_1_IntrTxMask = LO16(SCB_1_INTR_TX_MASK_REG);    #if(SCB_1_INTERNAL_RX_SW_BUFFER_CONST)        SCB_1_rxBufferHead     = 0u;        SCB_1_rxBufferTail     = 0u;        SCB_1_rxBufferOverflow = 0u;    #endif /* (SCB_1_INTERNAL_RX_SW_BUFFER_CONST) */    #if(SCB_1_INTERNAL_TX_SW_BUFFER_CONST)        SCB_1_txBufferHead = 0u;        SCB_1_txBufferTail = 0u;    #endif /* (SCB_1_INTERNAL_TX_SW_BUFFER_CONST) */    }

    /*******************************************************************************    * Function Name: UART_BCP_UartInit    ********************************************************************************    *    * Summary:    *  Configures the SCB for the UART operation.    *    * Parameters:    *  None    *    * Return:    *  None    *    *******************************************************************************/    void UART_BCP_UartInit(void)    {        /* Configure UART interface */        UART_BCP_CTRL_REG = UART_BCP_UART_DEFAULT_CTRL;        /* Configure sub-mode: UART, SmartCard or IrDA */        UART_BCP_UART_CTRL_REG = UART_BCP_UART_DEFAULT_UART_CTRL;        /* Configure RX direction */        UART_BCP_UART_RX_CTRL_REG = UART_BCP_UART_DEFAULT_UART_RX_CTRL;        UART_BCP_RX_CTRL_REG      = UART_BCP_UART_DEFAULT_RX_CTRL;        UART_BCP_RX_FIFO_CTRL_REG = UART_BCP_UART_DEFAULT_RX_FIFO_CTRL;        UART_BCP_RX_MATCH_REG     = UART_BCP_UART_DEFAULT_RX_MATCH_REG;        /* Configure TX direction */        UART_BCP_UART_TX_CTRL_REG = UART_BCP_UART_DEFAULT_UART_TX_CTRL;        UART_BCP_TX_CTRL_REG      = UART_BCP_UART_DEFAULT_TX_CTRL;        UART_BCP_TX_FIFO_CTRL_REG = UART_BCP_UART_DEFAULT_TX_FIFO_CTRL;    #if !(UART_BCP_CY_SCBIP_V0 || UART_BCP_CY_SCBIP_V1)        UART_BCP_UART_FLOW_CTRL_REG = UART_BCP_UART_DEFAULT_FLOW_CTRL;    #endif /* !(UART_BCP_CY_SCBIP_V0 || UART_BCP_CY_SCBIP_V1) */        /* Configure interrupt with UART handler but do not enable it */    #if(UART_BCP_SCB_IRQ_INTERNAL)        CyIntDisable    (UART_BCP_ISR_NUMBER);        CyIntSetPriority(UART_BCP_ISR_NUMBER, UART_BCP_ISR_PRIORITY);        (void) CyIntSetVector(UART_BCP_ISR_NUMBER, &UART_BCP_SPI_UART_ISR);    #endif /* (UART_BCP_SCB_IRQ_INTERNAL) */        /* Configure WAKE interrupt */    #if(UART_BCP_UART_RX_WAKEUP_IRQ)        CyIntDisable    (UART_BCP_RX_WAKE_ISR_NUMBER);        CyIntSetPriority(UART_BCP_RX_WAKE_ISR_NUMBER, UART_BCP_RX_WAKE_ISR_PRIORITY);        (void) CyIntSetVector(UART_BCP_RX_WAKE_ISR_NUMBER, &UART_BCP_UART_WAKEUP_ISR);    #endif /* (UART_BCP_UART_RX_WAKEUP_IRQ) */        /* Configure interrupt sources */        UART_BCP_INTR_I2C_EC_MASK_REG = UART_BCP_UART_DEFAULT_INTR_I2C_EC_MASK;        UART_BCP_INTR_SPI_EC_MASK_REG = UART_BCP_UART_DEFAULT_INTR_SPI_EC_MASK;        UART_BCP_INTR_SLAVE_MASK_REG  = UART_BCP_UART_DEFAULT_INTR_SLAVE_MASK;        UART_BCP_INTR_MASTER_MASK_REG = UART_BCP_UART_DEFAULT_INTR_MASTER_MASK;        UART_BCP_INTR_RX_MASK_REG     = UART_BCP_UART_DEFAULT_INTR_RX_MASK;        UART_BCP_INTR_TX_MASK_REG     = UART_BCP_UART_DEFAULT_INTR_TX_MASK;    #if(UART_BCP_INTERNAL_RX_SW_BUFFER_CONST)        UART_BCP_rxBufferHead     = 0u;        UART_BCP_rxBufferTail     = 0u;        UART_BCP_rxBufferOverflow = 0u;    #endif /* (UART_BCP_INTERNAL_RX_SW_BUFFER_CONST) */    #if(UART_BCP_INTERNAL_TX_SW_BUFFER_CONST)        UART_BCP_txBufferHead = 0u;        UART_BCP_txBufferTail = 0u;    #endif /* (UART_BCP_INTERNAL_TX_SW_BUFFER_CONST) */    }

/****************************************************************************** Function Name: _Watchdog_Init()******************************************************************************* Summary:*   Initialize the watchdog.** Parameters:*   None.** Return:*   None.** Note:******************************************************************************/void _Watchdog_Init(void){    // Unlock the WDT registers for modification.	CySysWdtUnlock();        // Write Mode for Counters as Interrupt on Match.    CySysWdtWriteMode(CY_SYS_WDT_COUNTER0, CY_SYS_WDT_MODE_INT);    CySysWdtWriteMode(CY_SYS_WDT_COUNTER1, CY_SYS_WDT_MODE_INT);        // Set Clear on Match for Counters.	CySysWdtWriteClearOnMatch(CY_SYS_WDT_COUNTER0, TRUE);    CySysWdtWriteClearOnMatch(CY_SYS_WDT_COUNTER1, TRUE);        // Set Watchdog interrupt to lower priority.	CyIntSetPriority(WATCHDOG_INT_VEC_NUM, WATCHDOG_INT_VEC_PRIORITY);        // Enable Watchdog Interrupt using Interrupt number.    CyIntEnable(WATCHDOG_INT_VEC_NUM);        // Write the match value in Counters.	CySysWdtWriteMatch(CY_SYS_WDT_COUNTER0, WATCHDOG_COUNTER0_PERIOD);    CySysWdtWriteMatch(CY_SYS_WDT_COUNTER1, WATCHDOG_COUNTER1_PERIOD);        // Enable Counters.    CySysWdtEnable(CY_SYS_WDT_COUNTER0_MASK);    CySysWdtEnable(CY_SYS_WDT_COUNTER1_MASK);		// Lock Watchdog to prevent further changes.    CySysWdtLock();        // Set the Watchdog Interrupt vector to the address of Interrupt routine 	// _Watchdog_Handler.	CyIntSetVector(WATCHDOG_INT_VEC_NUM, &_Watchdog_Handler);}

    /*******************************************************************************    * Function Name: I2C_1_I2CInit    ********************************************************************************    *    * Summary:    *  Configures the SCB for the I2C operation.    *    * Parameters:    *  None    *    * Return:    *  None    *    *******************************************************************************/    void I2C_1_I2CInit(void)    {        /* Configure I2C interface */        I2C_1_CTRL_REG     = I2C_1_I2C_DEFAULT_CTRL;        I2C_1_I2C_CTRL_REG = I2C_1_I2C_DEFAULT_I2C_CTRL;    #if(I2C_1_CY_SCBIP_V0)        /* Adjust SDA filter settings. Ticket ID#150521 */        I2C_1_SET_I2C_CFG_SDA_FILT_TRIM(I2C_1_EC_AM_I2C_CFG_SDA_FILT_TRIM);    #endif /* (I2C_1_CY_SCBIP_V0) */        /* Configure RX direction */        I2C_1_RX_CTRL_REG      = I2C_1_I2C_DEFAULT_RX_CTRL;        I2C_1_RX_FIFO_CTRL_REG = I2C_1_I2C_DEFAULT_RX_FIFO_CTRL;        /* Set default address and mask */        I2C_1_RX_MATCH_REG     = I2C_1_I2C_DEFAULT_RX_MATCH;        /* Configure TX direction */        I2C_1_TX_CTRL_REG      = I2C_1_I2C_DEFAULT_TX_CTRL;        I2C_1_TX_FIFO_CTRL_REG = I2C_1_I2C_DEFAULT_TX_FIFO_CTRL;        /* Configure interrupt with I2C handler but do not enable it */        CyIntDisable    (I2C_1_ISR_NUMBER);        CyIntSetPriority(I2C_1_ISR_NUMBER, I2C_1_ISR_PRIORITY);    #if(!I2C_1_I2C_EXTERN_INTR_HANDLER)        (void) CyIntSetVector(I2C_1_ISR_NUMBER, &I2C_1_I2C_ISR);    #endif /* (I2C_1_I2C_EXTERN_INTR_HANDLER) */        /* Configure interrupt sources */    #if(!I2C_1_CY_SCBIP_V1_I2C_ONLY)        I2C_1_INTR_SPI_EC_MASK_REG = I2C_1_I2C_DEFAULT_INTR_SPI_EC_MASK;    #endif /* (!I2C_1_CY_SCBIP_V1_I2C_ONLY) */        I2C_1_INTR_I2C_EC_MASK_REG = I2C_1_I2C_DEFAULT_INTR_I2C_EC_MASK;        I2C_1_INTR_SLAVE_MASK_REG  = I2C_1_I2C_DEFAULT_INTR_SLAVE_MASK;        I2C_1_INTR_MASTER_MASK_REG = I2C_1_I2C_DEFAULT_INTR_MASTER_MASK;        I2C_1_INTR_RX_MASK_REG     = I2C_1_I2C_DEFAULT_INTR_RX_MASK;        I2C_1_INTR_TX_MASK_REG     = I2C_1_I2C_DEFAULT_INTR_TX_MASK;        /* Configure global variables */        I2C_1_state = I2C_1_I2C_FSM_IDLE;    #if(I2C_1_I2C_SLAVE)        /* Internal slave variable */        I2C_1_slStatus        = 0u;        I2C_1_slRdBufIndex    = 0u;        I2C_1_slWrBufIndex    = 0u;        I2C_1_slOverFlowCount = 0u;    #endif /* (I2C_1_I2C_SLAVE) */    #if(I2C_1_I2C_MASTER)    /* Internal master variable */        I2C_1_mstrStatus     = 0u;        I2C_1_mstrRdBufIndex = 0u;        I2C_1_mstrWrBufIndex = 0u;    #endif /* (I2C_1_I2C_MASTER) */    }

/******************************************************************************** Function Name: USBUART_Suspend********************************************************************************** Summary:*  This function disables the USBFS block and prepares for power down mode.** Parameters:*  None.** Return:*   None.** Global variables:*  USBUART_backup.enable:  modified.** Reentrant:*  No.********************************************************************************/void USBUART_Suspend(void) {    uint8 enableInterrupts;    enableInterrupts = CyEnterCriticalSection();    if((CY_GET_REG8(USBUART_CR0_PTR) & USBUART_CR0_ENABLE) != 0u)    {   /* USB block is enabled */        USBUART_backup.enableState = 1u;        #if(USBUART_EP_MM != USBUART__EP_MANUAL)            USBUART_Stop_DMA(USBUART_MAX_EP);     /* Stop all DMAs */        #endif   /*  USBUART_EP_MM != USBUART__EP_MANUAL */        /* Ensure USB transmit enable is low (USB_USBIO_CR0.ten). - Manual Transmission - Disabled */        USBUART_USBIO_CR0_REG &= (uint8)~USBUART_USBIO_CR0_TEN;        CyDelayUs(0u);  /*~50ns delay */        /* Disable the USBIO by asserting PM.USB_CR0.fsusbio_pd_n(Inverted) and pd_pullup_hv(Inverted) high. */        USBUART_PM_USB_CR0_REG &=                                (uint8)~(USBUART_PM_USB_CR0_PD_N | USBUART_PM_USB_CR0_PD_PULLUP_N);        /* Disable the SIE */        USBUART_CR0_REG &= (uint8)~USBUART_CR0_ENABLE;        CyDelayUs(0u);  /* ~50ns delay */        /* Store mode and Disable VRegulator*/        USBUART_backup.mode = USBUART_CR1_REG & USBUART_CR1_REG_ENABLE;        USBUART_CR1_REG &= (uint8)~USBUART_CR1_REG_ENABLE;        CyDelayUs(1u);  /* 0.5 us min delay */        /* Disable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/        USBUART_PM_USB_CR0_REG &= (uint8)~USBUART_PM_USB_CR0_REF_EN;        /* Switch DP and DM terminals to GPIO mode and disconnect 1.5k pullup*/        USBUART_USBIO_CR1_REG |= USBUART_USBIO_CR1_IOMODE;        /* Disable USB in ACT PM */        USBUART_PM_ACT_CFG_REG &= (uint8)~USBUART_PM_ACT_EN_FSUSB;        /* Disable USB block for Standby Power Mode */        USBUART_PM_STBY_CFG_REG &= (uint8)~USBUART_PM_STBY_EN_FSUSB;        CyDelayUs(1u); /* min  0.5us delay required */    }    else    {        USBUART_backup.enableState = 0u;    }    CyExitCriticalSection(enableInterrupts);    /* Set the DP Interrupt for wake-up from sleep mode. */    #if(USBUART_DP_ISR_REMOVE == 0u)        (void) CyIntSetVector(USBUART_DP_INTC_VECT_NUM, &USBUART_DP_ISR);        CyIntSetPriority(USBUART_DP_INTC_VECT_NUM, USBUART_DP_INTC_PRIOR);        CyIntClearPending(USBUART_DP_INTC_VECT_NUM);        CyIntEnable(USBUART_DP_INTC_VECT_NUM);    #endif /* (USBUART_DP_ISR_REMOVE == 0u) */}

/******************************************************************************** Function Name: SPI_Init********************************************************************************** Summary:*  Inits/Restores default SPIM configuration provided with customizer.** Parameters:*  None.** Return:*  None.** Side Effects:*  When this function is called it initializes all of the necessary parameters*  for execution. i.e. setting the initial interrupt mask, configuring the*  interrupt service routine, configuring the bit-counter parameters and*  clearing the FIFO and Status Register.** Reentrant:*  No.********************************************************************************/void SPI_Init(void) {    /* Initialize the Bit counter */    SPI_COUNTER_PERIOD_REG = SPI_BITCTR_INIT;    /* Init TX ISR  */    #if(0u != SPI_INTERNAL_TX_INT_ENABLED)        CyIntDisable         (SPI_TX_ISR_NUMBER);        CyIntSetPriority     (SPI_TX_ISR_NUMBER,  SPI_TX_ISR_PRIORITY);        (void) CyIntSetVector(SPI_TX_ISR_NUMBER, &SPI_TX_ISR);    #endif /* (0u != SPI_INTERNAL_TX_INT_ENABLED) */    /* Init RX ISR  */    #if(0u != SPI_INTERNAL_RX_INT_ENABLED)        CyIntDisable         (SPI_RX_ISR_NUMBER);        CyIntSetPriority     (SPI_RX_ISR_NUMBER,  SPI_RX_ISR_PRIORITY);        (void) CyIntSetVector(SPI_RX_ISR_NUMBER, &SPI_RX_ISR);    #endif /* (0u != SPI_INTERNAL_RX_INT_ENABLED) */    /* Clear any stray data from the RX and TX FIFO */    SPI_ClearFIFO();    #if(SPI_RX_SOFTWARE_BUF_ENABLED)        SPI_rxBufferFull  = 0u;        SPI_rxBufferRead  = 0u;        SPI_rxBufferWrite = 0u;    #endif /* (SPI_RX_SOFTWARE_BUF_ENABLED) */    #if(SPI_TX_SOFTWARE_BUF_ENABLED)        SPI_txBufferFull  = 0u;        SPI_txBufferRead  = 0u;        SPI_txBufferWrite = 0u;    #endif /* (SPI_TX_SOFTWARE_BUF_ENABLED) */    (void) SPI_ReadTxStatus(); /* Clear Tx status and swStatusTx */    (void) SPI_ReadRxStatus(); /* Clear Rx status and swStatusRx */    /* Configure TX and RX interrupt mask */    SPI_TX_STATUS_MASK_REG = SPI_TX_INIT_INTERRUPTS_MASK;    SPI_RX_STATUS_MASK_REG = SPI_RX_INIT_INTERRUPTS_MASK;}

/******************************************************************************** Function Name: quaddec_right_Init********************************************************************************** Summary:   *  Inits/Restores default QuadDec configuration provided with customizer.** Parameters:  *  None.** Return: *  None.********************************************************************************/void quaddec_right_Init(void) {          #if (quaddec_right_COUNTER_SIZE == 32u)              /* Disable Interrupt. */        CyIntDisable(quaddec_right_ISR_NUMBER);                /* Set the ISR to point to the quaddec_right_isr Interrupt. */        CyIntSetVector(quaddec_right_ISR_NUMBER, quaddec_right_ISR);                /* Set the priority. */        CyIntSetPriority(quaddec_right_ISR_NUMBER, quaddec_right_ISR_PRIORITY);                   #endif /* quaddec_right_COUNTER_SIZE == 32u */    }

    /*******************************************************************************    * Function Name: SPI_SpiInit    ********************************************************************************    *    * Summary:    *  Configures the SCB for the SPI operation.    *    * Parameters:    *  None    *    * Return:    *  None    *    *******************************************************************************/    void SPI_SpiInit(void)    {        /* Configure SPI interface */        SPI_CTRL_REG     = SPI_SPI_DEFAULT_CTRL;        SPI_SPI_CTRL_REG = SPI_SPI_DEFAULT_SPI_CTRL;        /* Configure TX and RX direction */        SPI_RX_CTRL_REG      = SPI_SPI_DEFAULT_RX_CTRL;        SPI_RX_FIFO_CTRL_REG = SPI_SPI_DEFAULT_RX_FIFO_CTRL;        /* Configure TX and RX direction */        SPI_TX_CTRL_REG      = SPI_SPI_DEFAULT_TX_CTRL;        SPI_TX_FIFO_CTRL_REG = SPI_SPI_DEFAULT_TX_FIFO_CTRL;        /* Configure interrupt with SPI handler but do not enable it */    #if(SPI_SCB_IRQ_INTERNAL)            CyIntDisable    (SPI_ISR_NUMBER);            CyIntSetPriority(SPI_ISR_NUMBER, SPI_ISR_PRIORITY);            (void) CyIntSetVector(SPI_ISR_NUMBER, &SPI_SPI_UART_ISR);    #endif /* (SPI_SCB_IRQ_INTERNAL) */        /* Configure interrupt sources */        SPI_INTR_I2C_EC_MASK_REG = SPI_SPI_DEFAULT_INTR_I2C_EC_MASK;        SPI_INTR_SPI_EC_MASK_REG = SPI_SPI_DEFAULT_INTR_SPI_EC_MASK;        SPI_INTR_SLAVE_MASK_REG  = SPI_SPI_DEFAULT_INTR_SLAVE_MASK;        SPI_INTR_MASTER_MASK_REG = SPI_SPI_DEFAULT_INTR_MASTER_MASK;        SPI_INTR_RX_MASK_REG     = SPI_SPI_DEFAULT_INTR_RX_MASK;        SPI_INTR_TX_MASK_REG     = SPI_SPI_DEFAULT_INTR_TX_MASK;        /* Set active SS0 for master */    #if (SPI_SPI_MASTER_CONST)        SPI_SpiSetActiveSlaveSelect(SPI_SPI_SLAVE_SELECT0);    #endif /* (SPI_SPI_MASTER_CONST) */    #if(SPI_INTERNAL_RX_SW_BUFFER_CONST)        SPI_rxBufferHead     = 0u;        SPI_rxBufferTail     = 0u;        SPI_rxBufferOverflow = 0u;    #endif /* (SPI_INTERNAL_RX_SW_BUFFER_CONST) */    #if(SPI_INTERNAL_TX_SW_BUFFER_CONST)        SPI_txBufferHead = 0u;        SPI_txBufferTail = 0u;    #endif /* (SPI_INTERNAL_TX_SW_BUFFER_CONST) */    }

/******************************************************************************** Function Name: TPS_ADC_SAR_Init********************************************************************************** Summary:*  Initialize component's parameters to the parameters set by user in the*  customizer of the component placed onto schematic. Usually called in*  TPS_ADC_SAR_Start().** Parameters:*  None.** Return:*  None.** Global variables:*  The TPS_ADC_SAR_offset variable is initialized to 0.********************************************************************************/void TPS_ADC_SAR_Init(void){    /* This is only valid if there is an internal clock */    #if(TPS_ADC_SAR_DEFAULT_INTERNAL_CLK)        TPS_ADC_SAR_theACLK_SetMode(CYCLK_DUTY);    #endif /* End TPS_ADC_SAR_DEFAULT_INTERNAL_CLK */    #if(TPS_ADC_SAR_IRQ_REMOVE == 0u)        /* Start and set interrupt vector */        CyIntSetPriority(TPS_ADC_SAR_INTC_NUMBER, TPS_ADC_SAR_INTC_PRIOR_NUMBER);        (void)CyIntSetVector(TPS_ADC_SAR_INTC_NUMBER, &TPS_ADC_SAR_ISR);    #endif   /* End TPS_ADC_SAR_IRQ_REMOVE */    /* Enable IRQ mode*/    TPS_ADC_SAR_SAR_CSR1_REG |= TPS_ADC_SAR_SAR_IRQ_MASK_EN | TPS_ADC_SAR_SAR_IRQ_MODE_EDGE;    /*Set SAR ADC resolution ADC */    TPS_ADC_SAR_SetResolution(TPS_ADC_SAR_DEFAULT_RESOLUTION);    TPS_ADC_SAR_offset = 0;}

/******************************************************************************** Function Name: main********************************************************************************** Summary:*  At the beginning of the main function, the GPIO interrupt is set up and*  enabled. After that, initial priority for the GPIO interrupt is changed from*  1 to 3 (DEFAULT_PRIORITY). The custom interrupt (nested) is configured*  (sets up, sets priority) and enabled. In GPIOIsrHandler, the isr_GPIO*  pending interrupt clears, the green LED turns on, the nested software*  interrupt causes after approximately 1 second delay, green LED turns off.** Parameters:*  None.** Return:*  None.********************************************************************************/int main(){    /* Set initial state (off) for LED */    LED_Isr_Write(LIGHT_OFF);    LED_Nested_Write(LIGHT_OFF);    /* Sets up the GPIO interrupt and enables it */    isr_GPIO_StartEx(GPIOIsrHandler);    /* Changes initial priority for the GPIO interrupt */    isr_GPIO_SetPriority(DEFAULT_PRIORITY);    /* Sets up the nested interrupt, sets priority and enables it */    CyIntSetVector(NESTED_ISR,NestedIsrHandler);    CyIntSetPriority(NESTED_ISR,HIGHER_PRIORITY);    CyIntEnable(NESTED_ISR);    /* Enable global interrupts */    CyGlobalIntEnable;    for(;;)    {    }}

/******************************************************************************** Function Name: EzI2C_Init********************************************************************************** Summary:*  Initializes or restores the component according to the Configure dialog*  settings. It is not necessary to call EZI2C_Init() because the EZI2C_Start()*  API calls this function, which is the preferred method to begin component*  operation.** Parameters:*  None.** Return:*  None.** Global variables:*  EzI2C_initVar - It is used to indicate the initial configuration*  of this component.  The variable is initialized to zero and set to 1*  the first time EzI2C_Start() is called. This allows component  !*  initialization without re-initialization in all subsequent calls*  to the EzI2C_Start() routine.**  EzI2C_curStatus - Stores the current status of the component.**  EzI2C_curState- Stores the current state of an I2C state machine.**  EzI2C_rwOffsetS1 - The global variable which stores an offset for read*  and write operations, is set at each write sequence of the first slave*  address is reset if EzI2C_initVar is 0, by*  EzI2C_initVar function call.**  EzI2C_rwIndexS1 - The global variable which stores a pointer to the*  next value to be read or written for the first slave address is reset if*  EzI2C_initVar is 0, by EzI2C_initVar function call.** EzI2C_wrProtectS1 - The global variable which stores an offset where data*  is read only for the first slave address is reset if*  EzI2C_initVar is 0, by EzI2C_initVar function call.**  EzI2C_rwOffsetS2 - The global variable, which stores an offset for read*  and write operations, is set at each write sequence of the second slave*  device is reset if EzI2C_initVar is 0, by EzI2C_initVar*  function call.**  EzI2C_rwIndexS2 - The global variable which stores a pointer to the*  next value to be read or written for the second slave address is reset if*  EzI2C_initVar is 0, by EzI2C_initVar function call.** EzI2C_wrProtectS2 - The global variable which stores an offset where data*  is read only for the second slave address is reset if*  EzI2C_initVar is 0, by EzI2C_initVar function call.** Reentrant:*  No.********************************************************************************/void EzI2C_Init(void) {    /* Configure fixed function block */    EzI2C_CFG_REG  = EzI2C_DEFAULT_CFG;    EzI2C_XCFG_REG = EzI2C_DEFAULT_XCFG;    EzI2C_ADDR_REG = EzI2C_DEFAULT_ADDR;    EzI2C_CLKDIV1_REG = EzI2C_DEFAULT_CLKDIV1;    EzI2C_CLKDIV2_REG = EzI2C_DEFAULT_CLKDIV2;#if (EzI2C_TWO_ADDRESSES == EzI2C_ADDRESSES)    /* Set address variables */    EzI2C_SetAddress1(EzI2C_DEFAULT_ADDR1);    EzI2C_SetAddress2(EzI2C_DEFAULT_ADDR2);#endif /* #if (EzI2C_TWO_ADDRESSES == EzI2C_ADDRESSES) */    /* Configure interrupt */    CyIntDisable         (EzI2C_ISR_NUMBER);    CyIntSetPriority     (EzI2C_ISR_NUMBER, EzI2C_ISR_PRIORITY);    (void) CyIntSetVector(EzI2C_ISR_NUMBER, &EzI2C_ISR);     /* Reset state and status to default */    EzI2C_curState  = EzI2C_SM_IDLE;    EzI2C_curStatus = 0u;    /* Reset all buffer 1 indexes (primary address) */    EzI2C_rwOffsetS1  = 0u;    EzI2C_rwIndexS1   = 0u;    EzI2C_wrProtectS1 = 0u;#if (EzI2C_ADDRESSES == EzI2C_TWO_ADDRESSES)    /* Reset all buffer 2 indexes (secondary address) */    EzI2C_rwOffsetS2  = 0u;    EzI2C_rwIndexS2   = 0u;    EzI2C_wrProtectS2 = 0u;#endif  /* (EzI2C_ADDRESSES == EzI2C_TWO_ADDRESSES) */}

//.........这里部分代码省略.........            UART_1_txBuffer      =         config->txBuffer;            UART_1_txDataBits    = (uint8) config->dataBits;            UART_1_txBufferSize  = (uint8) config->txBufferSize;            /* Configure UART interface */            if(UART_1_UART_MODE_IRDA == config->mode)            {                /* OVS settings: IrDA */                UART_1_CTRL_REG  = ((0u != config->enableIrdaLowPower) ?                                                (UART_1_UART_GET_CTRL_OVS_IRDA_LP(config->oversample)) :                                                (UART_1_CTRL_OVS_IRDA_OVS16));            }            else            {                /* OVS settings: UART and SmartCard */                UART_1_CTRL_REG  = UART_1_GET_CTRL_OVS(config->oversample);            }            UART_1_CTRL_REG     |= UART_1_GET_CTRL_BYTE_MODE  (config->enableByteMode)      |                                             UART_1_GET_CTRL_ADDR_ACCEPT(config->multiprocAcceptAddr) |                                             UART_1_CTRL_UART;            /* Configure sub-mode: UART, SmartCard or IrDA */            UART_1_UART_CTRL_REG = UART_1_GET_UART_CTRL_MODE(config->mode);            /* Configure RX direction */            UART_1_UART_RX_CTRL_REG = UART_1_GET_UART_RX_CTRL_MODE(config->stopBits)              |                                        UART_1_GET_UART_RX_CTRL_POLARITY(config->enableInvertedRx)          |                                        UART_1_GET_UART_RX_CTRL_MP_MODE(config->enableMultiproc)            |                                        UART_1_GET_UART_RX_CTRL_DROP_ON_PARITY_ERR(config->dropOnParityErr) |                                        UART_1_GET_UART_RX_CTRL_DROP_ON_FRAME_ERR(config->dropOnFrameErr);            if(UART_1_UART_PARITY_NONE != config->parity)            {               UART_1_UART_RX_CTRL_REG |= UART_1_GET_UART_RX_CTRL_PARITY(config->parity) |                                                    UART_1_UART_RX_CTRL_PARITY_ENABLED;            }            UART_1_RX_CTRL_REG      = UART_1_GET_RX_CTRL_DATA_WIDTH(config->dataBits)       |                                                UART_1_GET_RX_CTRL_MEDIAN(config->enableMedianFilter) |                                                UART_1_GET_UART_RX_CTRL_ENABLED(config->direction);            UART_1_RX_FIFO_CTRL_REG = UART_1_GET_RX_FIFO_CTRL_TRIGGER_LEVEL(config->rxTriggerLevel);            /* Configure MP address */            UART_1_RX_MATCH_REG     = UART_1_GET_RX_MATCH_ADDR(config->multiprocAddr) |                                                UART_1_GET_RX_MATCH_MASK(config->multiprocAddrMask);            /* Configure RX direction */            UART_1_UART_TX_CTRL_REG = UART_1_GET_UART_TX_CTRL_MODE(config->stopBits) |                                                UART_1_GET_UART_TX_CTRL_RETRY_NACK(config->enableRetryNack);            if(UART_1_UART_PARITY_NONE != config->parity)            {               UART_1_UART_TX_CTRL_REG |= UART_1_GET_UART_TX_CTRL_PARITY(config->parity) |                                                    UART_1_UART_TX_CTRL_PARITY_ENABLED;            }            UART_1_TX_CTRL_REG      = UART_1_GET_TX_CTRL_DATA_WIDTH(config->dataBits)    |                                                UART_1_GET_UART_TX_CTRL_ENABLED(config->direction);            UART_1_TX_FIFO_CTRL_REG = UART_1_GET_TX_FIFO_CTRL_TRIGGER_LEVEL(config->txTriggerLevel);        #if !(UART_1_CY_SCBIP_V0 || UART_1_CY_SCBIP_V1)            UART_1_UART_FLOW_CTRL_REG = UART_1_GET_UART_FLOW_CTRL_CTS_ENABLE(config->enableCts) | /                                            UART_1_GET_UART_FLOW_CTRL_CTS_POLARITY (config->ctsPolarity)  | /                                            UART_1_GET_UART_FLOW_CTRL_RTS_POLARITY (config->rtsPolarity)  | /                                            UART_1_GET_UART_FLOW_CTRL_TRIGGER_LEVEL(config->rtsRxFifoLevel);        #endif /* !(UART_1_CY_SCBIP_V0 || UART_1_CY_SCBIP_V1) */            /* Configure interrupt with UART handler but do not enable it */            CyIntDisable    (UART_1_ISR_NUMBER);            CyIntSetPriority(UART_1_ISR_NUMBER, UART_1_ISR_PRIORITY);            (void) CyIntSetVector(UART_1_ISR_NUMBER, &UART_1_SPI_UART_ISR);            /* Configure WAKE interrupt */        #if(UART_1_UART_RX_WAKEUP_IRQ)            CyIntDisable    (UART_1_RX_WAKE_ISR_NUMBER);            CyIntSetPriority(UART_1_RX_WAKE_ISR_NUMBER, UART_1_RX_WAKE_ISR_PRIORITY);            (void) CyIntSetVector(UART_1_RX_WAKE_ISR_NUMBER, &UART_1_UART_WAKEUP_ISR);        #endif /* (UART_1_UART_RX_WAKEUP_IRQ) */            /* Configure interrupt sources */            UART_1_INTR_I2C_EC_MASK_REG = UART_1_NO_INTR_SOURCES;            UART_1_INTR_SPI_EC_MASK_REG = UART_1_NO_INTR_SOURCES;            UART_1_INTR_SLAVE_MASK_REG  = UART_1_NO_INTR_SOURCES;            UART_1_INTR_MASTER_MASK_REG = UART_1_NO_INTR_SOURCES;            UART_1_INTR_RX_MASK_REG     = config->rxInterruptMask;            UART_1_INTR_TX_MASK_REG     = config->txInterruptMask;            /* Clear RX buffer indexes */            UART_1_rxBufferHead     = 0u;            UART_1_rxBufferTail     = 0u;            UART_1_rxBufferOverflow = 0u;            /* Clear TX buffer indexes */            UART_1_txBufferHead = 0u;            UART_1_txBufferTail = 0u;        }    }

/******************************************************************************** Function Name: I2C_Init********************************************************************************** Summary:*  Initializes I2C registers with initial values provided from customizer.** Parameters:*  None.** Return:*  None.** Global variables:*  None.** Reentrant:*  No.********************************************************************************/void I2C_Init(void) {#if (I2C_FF_IMPLEMENTED)    /* Configure fixed function block */    I2C_CFG_REG  = I2C_DEFAULT_CFG;    I2C_XCFG_REG = I2C_DEFAULT_XCFG;    I2C_ADDR_REG = I2C_DEFAULT_ADDR;    I2C_CLKDIV1_REG = LO8(I2C_DEFAULT_DIVIDE_FACTOR);    I2C_CLKDIV2_REG = HI8(I2C_DEFAULT_DIVIDE_FACTOR);#else    uint8 intState;    /* Configure control and interrupt sources */    I2C_CFG_REG      = I2C_DEFAULT_CFG;    I2C_INT_MASK_REG = I2C_DEFAULT_INT_MASK;    /* Enable interrupt generation in status */    intState = CyEnterCriticalSection();    I2C_INT_ENABLE_REG |= I2C_INTR_ENABLE;    CyExitCriticalSection(intState);    /* Configure bit counter */    #if (I2C_MODE_SLAVE_ENABLED)        I2C_PERIOD_REG = I2C_DEFAULT_PERIOD;    #endif  /* (I2C_MODE_SLAVE_ENABLED) */    /* Configure clock generator */    #if (I2C_MODE_MASTER_ENABLED)        I2C_MCLK_PRD_REG = I2C_DEFAULT_MCLK_PRD;        I2C_MCLK_CMP_REG = I2C_DEFAULT_MCLK_CMP;    #endif /* (I2C_MODE_MASTER_ENABLED) */#endif /* (I2C_FF_IMPLEMENTED) */#if (I2C_TIMEOUT_ENABLED)    I2C_TimeoutInit();#endif /* (I2C_TIMEOUT_ENABLED) */    /* Configure internal interrupt */    CyIntDisable    (I2C_ISR_NUMBER);    CyIntSetPriority(I2C_ISR_NUMBER, I2C_ISR_PRIORITY);    #if (I2C_INTERN_I2C_INTR_HANDLER)        (void) CyIntSetVector(I2C_ISR_NUMBER, &I2C_ISR);    #endif /* (I2C_INTERN_I2C_INTR_HANDLER) */    /* Set FSM to default state */    I2C_state = I2C_SM_IDLE;#if (I2C_MODE_SLAVE_ENABLED)    /* Clear status and buffers index */    I2C_slStatus = 0u;    I2C_slRdBufIndex = 0u;    I2C_slWrBufIndex = 0u;    /* Configure matched address */    I2C_SlaveSetAddress(I2C_DEFAULT_ADDR);#endif /* (I2C_MODE_SLAVE_ENABLED) */#if (I2C_MODE_MASTER_ENABLED)    /* Clear status and buffers index */    I2C_mstrStatus = 0u;    I2C_mstrRdBufIndex = 0u;    I2C_mstrWrBufIndex = 0u;#endif /* (I2C_MODE_MASTER_ENABLED) */}

/******************************************************************************** Function Name: ServiceUSB********************************************************************************* Summary: This routine performs tasks that should be done soon after USB *          enumeration is completed (configure DMA, initialize state machine etc).*          When the USB configuration is changed, this routine reinitializes all*          the USB endpoints as required by the application.       ** Parameters:*  void** Return:*  void********************************************************************************/void ServiceUSB(void){    CYBIT macPC_flag=FALSE;	if(USB_INTERFACE_INACTIVE == USBDeviceState)    {        USBDeviceState = USB_INIT_AFTER_ENUMERATION_REQUIRED;    }		/* Initialization sequence for every USB host enumeration event */    if(USBDeviceState == USB_INIT_AFTER_ENUMERATION_REQUIRED)    {        uint16 index = 0;                USBDeviceState = USB_INIT_AFTER_ENUMERATION_COMPLETED;        SetAppleDeviceAudioSource(AUDIO_SOURCE_DIGITAL);        macPC_flag = IsMacPCConnected();                #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)            /* USER_CODE: [Audio Buffers] Add a separate for loop if the playback and recording audio buffer size are              * not equal */            for(index=0; index< OUT_AUDIOMAXPKT; index++)            {                #ifndef ENABLE_DIGITAL_AUDIO_OUT_ONLY                inRam[index] = 0;                #endif                #ifndef ENABLE_DIGITAL_AUDIO_IN_ONLY                outRam[index] = 0;                #endif            }            #ifndef ENABLE_DIGITAL_AUDIO_OUT_ONLY            inCnt = IN_AUDIOMAXPKT;            #endif        #endif                #ifdef CDC_ENABLED        USBUARTStart(); /* Initializes the USB UART interface */        #endif                        /* Configure the HID input endpoint buffer for Mac/PC playlist control */        if(macPC_flag)        {            USBFS_LoadInEP(MAC_PC_HID_CONTROL_ENDPOINT, (uint8 *)&playlistControlReport, sizeof(playlistControlReport));                        #ifdef PHONE_CONTROL_ENABLED            USBFS_ReadOutEP(MAC_PC_HID_OUT_ENDPOINT, &hidOutReport, sizeof(hidOutReport));            USBFS_EnableOutEP(MAC_PC_HID_OUT_ENDPOINT);            #endif        }                /* If Aux is not currently configured, then switch to digital audio mode */        if(IS_AUX_NOT_SELECTED())        {            ConfigureDigitalAudioDMA();        }        else        {            #ifdef LCD_MODULE_ENABLED            /* Else Display Aux Configured message on the LCD */            LCD2LineDisplay("Analog Loopback ",                            "                ");            #endif                        }                /* USER_CODE: [USB enumeration] placeholder for initializing custom user code after the USB host enumerates the         * accessory. This routine will be called once per accessory connection after the host issues SET_CONFIGURATION         * request */    }        #ifdef MIDI_ENABLED    if (midiEPInitialized == FALSE || usbReset)    {        /* Initialize MIDI only when a valid USB host is connected */        if ((IsUSBConfigured() && IsMacPCConnected()))        {            USBFS_MIDI_EP_Init();                        /* USB Component internally sets the priority of the UART TX and RX ISRs to 4 and 2 respectively, change the             * interrupt priority in the application code to match the system interrupt setup */                         CyIntSetPriority(MIDI1_UART_TX_VECT_NUM, MIDI_UART_INTERRUPT_PRIORITY_SIX);            CyIntSetPriority(MIDI1_UART_RX_VECT_NUM, MIDI_UART_INTERRUPT_PRIORITY_FIVE);            #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)            CyIntSetPriority(MIDI2_UART_TX_VECT_NUM, MIDI_UART_INTERRUPT_PRIORITY_SIX);            CyIntSetPriority(MIDI2_UART_RX_VECT_NUM, MIDI_UART_INTERRUPT_PRIORITY_FIVE);            #endif//.........这里部分代码省略.........

/******************************************************************************** Function Name: USBFS_1_Init********************************************************************************** Summary:*  Initialize component's hardware. Usually called in USBFS_1_Start().** Parameters:*  None.** Return:*  None.** Reentrant:*  No.********************************************************************************/void USBFS_1_Init(void) {    uint8 enableInterrupts;    #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)        uint16 i;    #endif   /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */    enableInterrupts = CyEnterCriticalSection();    /* Enable USB block  */    USBFS_1_PM_ACT_CFG_REG |= USBFS_1_PM_ACT_EN_FSUSB;    /* Enable USB block for Standby Power Mode */    USBFS_1_PM_STBY_CFG_REG |= USBFS_1_PM_STBY_EN_FSUSB;    /* Enable core clock */    USBFS_1_USB_CLK_EN_REG = USBFS_1_USB_CLK_ENABLE;    USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK;    /* ENABLING USBIO PADS IN USB MODE FROM I/O MODE */    /* Ensure USB transmit enable is low (USB_USBIO_CR0.ten). - Manual Transmission - Disabled */    USBFS_1_USBIO_CR0_REG &= ((uint8)(~USBFS_1_USBIO_CR0_TEN));    CyDelayUs(0u);  /*~50ns delay */    /* Disable the USBIO by asserting PM.USB_CR0.fsusbio_pd_n(Inverted)    *  high. This will have been set low by the power manger out of reset.    *  Also confirm USBIO pull-up disabled    */    USBFS_1_PM_USB_CR0_REG &= ((uint8)(~(USBFS_1_PM_USB_CR0_PD_N |                                                  USBFS_1_PM_USB_CR0_PD_PULLUP_N)));    /* Select iomode to USB mode*/    USBFS_1_USBIO_CR1_REG &= ((uint8)(~USBFS_1_USBIO_CR1_IOMODE));    /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/    USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_REF_EN;    /* The reference will be available 1 us after the regulator is enabled */    CyDelayUs(1u);    /* OR 40us after power restored */    CyDelayUs(40u);    /* Ensure the single ended disable bits are low (PRT15.INP_DIS[7:6])(input receiver enabled). */    USBFS_1_DM_INP_DIS_REG &= ((uint8)(~USBFS_1_DM_MASK));    USBFS_1_DP_INP_DIS_REG &= ((uint8)(~USBFS_1_DP_MASK));    /* Enable USBIO */    USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_PD_N;    CyDelayUs(2u);    /* Set the USBIO pull-up enable */    USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_PD_PULLUP_N;    /* Write WAx */    CY_SET_REG8(USBFS_1_ARB_RW1_WA_PTR,     0u);    CY_SET_REG8(USBFS_1_ARB_RW1_WA_MSB_PTR, 0u);    #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)        /* Init transfer descriptor. This will be used to detect the DMA state - initialized or not. */        for (i = 0u; i < USBFS_1_MAX_EP; i++)        {            USBFS_1_DmaTd[i] = DMA_INVALID_TD;        }    #endif   /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */    CyExitCriticalSection(enableInterrupts);    /* Set the bus reset Interrupt. */    (void) CyIntSetVector(USBFS_1_BUS_RESET_VECT_NUM,   &USBFS_1_BUS_RESET_ISR);    CyIntSetPriority(USBFS_1_BUS_RESET_VECT_NUM, USBFS_1_BUS_RESET_PRIOR);    /* Set the SOF Interrupt. */    #if(USBFS_1_SOF_ISR_REMOVE == 0u)        (void) CyIntSetVector(USBFS_1_SOF_VECT_NUM,   &USBFS_1_SOF_ISR);        CyIntSetPriority(USBFS_1_SOF_VECT_NUM, USBFS_1_SOF_PRIOR);    #endif   /* End USBFS_1_SOF_ISR_REMOVE */    /* Set the Control Endpoint Interrupt. */    (void) CyIntSetVector(USBFS_1_EP_0_VECT_NUM,   &USBFS_1_EP_0_ISR);    CyIntSetPriority(USBFS_1_EP_0_VECT_NUM, USBFS_1_EP_0_PRIOR);    /* Set the Data Endpoint 1 Interrupt. */    #if(USBFS_1_EP1_ISR_REMOVE == 0u)        (void) CyIntSetVector(USBFS_1_EP_1_VECT_NUM,   &USBFS_1_EP_1_ISR);        CyIntSetPriority(USBFS_1_EP_1_VECT_NUM, USBFS_1_EP_1_PRIOR);    #endif   /* End USBFS_1_EP1_ISR_REMOVE *///.........这里部分代码省略.........

/******************************************************************************** FUNCTION NAME: void UART_Start(void)** Summary:* Initialize and Enable the UART component** Parameters:* -None-** Return:* -None-** Theory:* Enable the clock input to enable operation** Side Effects:* -None-*******************************************************************************/void UART_Start(void){    if(UART_initvar == 0)	{		UART_initvar = 1;                #if(UART_RX_Enabled)                    #if(UART_RX_IntInterruptEnabled && (UART_RXBUFFERSIZE > 4))                /* Set the RX Interrupt. */                CyIntSetVector(UART_RX_VECT_NUM,   UART_RXISR);                CyIntSetPriority(UART_RX_VECT_NUM, UART_RX_PRIOR_NUM);                CyIntEnable(UART_RX_VECT_NUM);            #endif                       #if (UART_RXHW_Address_Enabled)                UART_SetRxAddressMode(UART_RXAddressMode);                 UART_SetRxAddress1(UART_RXHWADDRESS1);                UART_SetRxAddress2(UART_RXHWADDRESS2);            #endif                         /* Configure the Initial RX interrupt mask */            UART_RXSTATUS_MASK  = UART_INIT_RX_INTERRUPTS_MASK;            UART_RXSTATUS_ACTL  |= UART_INT_ENABLE;        #endif        #if(UART_TX_Enabled)            #if(UART_TX_IntInterruptEnabled && (UART_TXBUFFERSIZE > 4))                /* Set the TX Interrupt. */                CyIntSetVector(UART_TX_VECT_NUM,   UART_TXISR);                CyIntSetPriority(UART_TX_VECT_NUM, UART_TX_PRIOR_NUM);                CyIntEnable(UART_TX_VECT_NUM);            #endif            			  //Write Counter Value for TX Bit Clk Generator 			 #if(UART_TXCLKGEN_DP)				UART_TXBITCLKGEN_CTR = UART_BIT_CENTER;				UART_TXBITCLKTX_COMPLETE = (UART_NUMBER_OF_DATA_BITS +														UART_NUMBER_OF_START_BIT) *														UART_OverSampleCount;			#endif	                        /* Configure the Initial TX interrupt mask */            #if(UART_TX_IntInterruptEnabled && (UART_TXBUFFERSIZE > 4))                UART_TXSTATUS_MASK = UART_TX_STS_FIFO_EMPTY;            #else                UART_TXSTATUS_MASK = UART_INIT_TX_INTERRUPTS_MASK;            #endif            UART_TXSTATUS_ACTL  |= UART_INT_ENABLE;        #endif    }    /*Write Bit Counter Enable */     #if(UART_RX_Enabled)	    UART_RXBITCTR_CONTROL |= UART_CNTR_ENABLE;	 #endif		      #if(UART_TX_Enabled)		 #if(UART_TXCLKGEN_DP)		 	/* TODO: Start DP*/		#else			UART_TXBITCTR_CONTROL |= UART_CNTR_ENABLE;		#endif		 #endif		    #if(UART_InternalClockUsed)        /* Set the bit to enable the clock. */        *UART_IntClock_CLKEN |= UART_IntClock_CLKEN_MASK;    #else           #endif}

//.........这里部分代码省略.........            /* Set RX direction internal variables */            SERIAL_rxBuffer      =         config->rxBuffer;            SERIAL_rxDataBits    = (uint8) config->dataBits;            SERIAL_rxBufferSize  = (uint8) config->rxBufferSize;            /* Set TX direction internal variables */            SERIAL_txBuffer      =         config->txBuffer;            SERIAL_txDataBits    = (uint8) config->dataBits;            SERIAL_txBufferSize  = (uint8) config->txBufferSize;            /* Configure UART interface */            if(SERIAL_UART_MODE_IRDA == config->mode)            {                /* OVS settings: IrDA */                SERIAL_CTRL_REG  = ((0u != config->enableIrdaLowPower) ?                                                (SERIAL_UART_GET_CTRL_OVS_IRDA_LP(config->oversample)) :                                                (SERIAL_CTRL_OVS_IRDA_OVS16));            }            else            {                /* OVS settings: UART and SmartCard */                SERIAL_CTRL_REG  = SERIAL_GET_CTRL_OVS(config->oversample);            }            SERIAL_CTRL_REG     |= SERIAL_GET_CTRL_ADDR_ACCEPT(config->multiprocAcceptAddr) |                                             SERIAL_CTRL_UART;            /* Configure sub-mode: UART, SmartCard or IrDA */            SERIAL_UART_CTRL_REG = SERIAL_GET_UART_CTRL_MODE(config->mode);            /* Configure RX direction */            SERIAL_UART_RX_CTRL_REG = SERIAL_GET_UART_RX_CTRL_MODE(config->stopBits)              |                                        SERIAL_GET_UART_RX_CTRL_POLARITY(config->enableInvertedRx)          |                                        SERIAL_GET_UART_RX_CTRL_MP_MODE(config->enableMultiproc)            |                                        SERIAL_GET_UART_RX_CTRL_DROP_ON_PARITY_ERR(config->dropOnParityErr) |                                        SERIAL_GET_UART_RX_CTRL_DROP_ON_FRAME_ERR(config->dropOnFrameErr);            if(SERIAL_UART_PARITY_NONE != config->parity)            {               SERIAL_UART_RX_CTRL_REG |= SERIAL_GET_UART_RX_CTRL_PARITY(config->parity) |                                                    SERIAL_UART_RX_CTRL_PARITY_ENABLED;            }            SERIAL_RX_CTRL_REG      = SERIAL_GET_RX_CTRL_DATA_WIDTH(config->dataBits)       |                                                SERIAL_GET_RX_CTRL_MEDIAN(config->enableMedianFilter) |                                                SERIAL_GET_UART_RX_CTRL_ENABLED(config->direction);            SERIAL_RX_FIFO_CTRL_REG = SERIAL_GET_RX_FIFO_CTRL_TRIGGER_LEVEL(config->rxTriggerLevel);            /* Configure MP address */            SERIAL_RX_MATCH_REG     = SERIAL_GET_RX_MATCH_ADDR(config->multiprocAddr) |                                                SERIAL_GET_RX_MATCH_MASK(config->multiprocAddrMask);            /* Configure RX direction */            SERIAL_UART_TX_CTRL_REG = SERIAL_GET_UART_TX_CTRL_MODE(config->stopBits) |                                                SERIAL_GET_UART_TX_CTRL_RETRY_NACK(config->enableRetryNack);            if(SERIAL_UART_PARITY_NONE != config->parity)            {               SERIAL_UART_TX_CTRL_REG |= SERIAL_GET_UART_TX_CTRL_PARITY(config->parity) |                                                    SERIAL_UART_TX_CTRL_PARITY_ENABLED;            }            SERIAL_TX_CTRL_REG      = SERIAL_GET_TX_CTRL_DATA_WIDTH(config->dataBits)    |                                                SERIAL_GET_UART_TX_CTRL_ENABLED(config->direction);            SERIAL_TX_FIFO_CTRL_REG = SERIAL_GET_TX_FIFO_CTRL_TRIGGER_LEVEL(config->txTriggerLevel);            /* Configure interrupt with UART handler but do not enable it */            CyIntDisable    (SERIAL_ISR_NUMBER);            CyIntSetPriority(SERIAL_ISR_NUMBER, SERIAL_ISR_PRIORITY);            (void) CyIntSetVector(SERIAL_ISR_NUMBER, &SERIAL_SPI_UART_ISR);            /* Configure WAKE interrupt */        #if(SERIAL_UART_RX_WAKEUP_IRQ)            CyIntDisable    (SERIAL_RX_WAKE_ISR_NUMBER);            CyIntSetPriority(SERIAL_RX_WAKE_ISR_NUMBER, SERIAL_RX_WAKE_ISR_PRIORITY);            (void) CyIntSetVector(SERIAL_RX_WAKE_ISR_NUMBER, &SERIAL_UART_WAKEUP_ISR);        #endif /* (SERIAL_UART_RX_WAKEUP_IRQ) */            /* Configure interrupt sources */            SERIAL_INTR_I2C_EC_MASK_REG = SERIAL_NO_INTR_SOURCES;            SERIAL_INTR_SPI_EC_MASK_REG = SERIAL_NO_INTR_SOURCES;            SERIAL_INTR_SLAVE_MASK_REG  = SERIAL_NO_INTR_SOURCES;            SERIAL_INTR_MASTER_MASK_REG = SERIAL_NO_INTR_SOURCES;            SERIAL_INTR_RX_MASK_REG     = config->rxInterruptMask;            SERIAL_INTR_TX_MASK_REG     = config->txInterruptMask;            /* Clear RX buffer indexes */            SERIAL_rxBufferHead     = 0u;            SERIAL_rxBufferTail     = 0u;            SERIAL_rxBufferOverflow = 0u;            /* Clrea TX buffer indexes */            SERIAL_txBufferHead = 0u;            SERIAL_txBufferTail = 0u;        }    }

/******************************************************************************** Function Name: ADC_SAR_Seq_0_Init********************************************************************************** Summary:*  Initialize component's parameters to the parameters set by user in the*  customizer of the component placed onto schematic. Usually called in*  ADC_SAR_Seq_0_Start().** Parameters:*  None.** Return:*  None.** Global variables:*  The ADC_SAR_Seq_0_offset variable is initialized.********************************************************************************/void ADC_SAR_Seq_0_Init(void){    uint32 chNum;    uint32 tmpRegVal;    int32 counts;    #if(ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 1u)        static const uint8 CYCODE ADC_SAR_Seq_0_InputsPlacement[] =        {            (uint8)(ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_0_PORT << 4u) |            (uint8)ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_0_PIN            ,(uint8)(ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_1_PORT << 4u) |             (uint8)ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_1_PIN            #if(ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 2u)                ,(uint8)(ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_2_PORT << 4u) |                 (uint8)ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_2_PIN            #endif /* End ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 2u */            #if(ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 3u)                ,(uint8)(ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_3_PORT << 4u) |                 (uint8)ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_3_PIN            #endif /* End ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 3u */            #if(ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 4u)                ,(uint8)(ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_4_PORT << 4u) |                 (uint8)ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_4_PIN            #endif /* End ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 4u */            #if(ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 5u)                ,(uint8)(ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_5_PORT << 4u) |                 (uint8)ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_5_PIN            #endif /* End ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 5u */            #if(ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 6u)                ,(uint8)(ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_6_PORT << 4u) |                 (uint8)ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_6_PIN            #endif /* End ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 6u */            #if(ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 7u)                ,(uint8)(ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_7_PORT << 4u) |                 (uint8)ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_7_PIN            #endif /* End ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 7u */            #if(ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 8u)                ,(uint8)(ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_8_PORT << 4u) |                 (uint8)ADC_SAR_Seq_0_cy_psoc4_sarmux_8__CH_8_PIN            #endif /* End ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 8u */        };    #endif /* End ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 1u */    #if(ADC_SAR_Seq_0_IRQ_REMOVE == 0u)        /* Start and set interrupt vector */        CyIntSetPriority(ADC_SAR_Seq_0_INTC_NUMBER, ADC_SAR_Seq_0_INTC_PRIOR_NUMBER);        (void)CyIntSetVector(ADC_SAR_Seq_0_INTC_NUMBER, &ADC_SAR_Seq_0_ISR);    #endif   /* End ADC_SAR_Seq_0_IRQ_REMOVE */    /* Init SAR and MUX registers */    ADC_SAR_Seq_0_SAR_CHAN_EN_REG = ADC_SAR_Seq_0_DEFAULT_EN_CHANNELS;    ADC_SAR_Seq_0_SAR_CTRL_REG = ADC_SAR_Seq_0_DEFAULT_CTRL_REG_CFG;    ADC_SAR_Seq_0_SAR_SAMPLE_CTRL_REG = ADC_SAR_Seq_0_DEFAULT_SAMPLE_CTRL_REG_CFG;    ADC_SAR_Seq_0_SAR_RANGE_THRES_REG = ADC_SAR_Seq_0_DEFAULT_RANGE_THRES_REG_CFG;    ADC_SAR_Seq_0_SAR_RANGE_COND_REG  = ADC_SAR_Seq_0_COMPARE_MODE;    ADC_SAR_Seq_0_SAR_SAMPLE_TIME01_REG = ADC_SAR_Seq_0_DEFAULT_SAMPLE_TIME01_REG_CFG;    ADC_SAR_Seq_0_SAR_SAMPLE_TIME23_REG = ADC_SAR_Seq_0_DEFAULT_SAMPLE_TIME23_REG_CFG;    /* Connect Vm to VSSA when even one channel is single-ended or multiple channels configured */    #if(ADC_SAR_Seq_0_DEFAULT_MUX_SWITCH0 != 0u)        ADC_SAR_Seq_0_MUX_SWITCH0_REG |= ADC_SAR_Seq_0_DEFAULT_MUX_SWITCH0;         /* Set MUX_HW_CTRL_VSSA in MUX_SWITCH_HW_CTRL when multiple channels enabled */        #if(ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 1u)            ADC_SAR_Seq_0_MUX_SWITCH_HW_CTRL_REG |= ADC_SAR_Seq_0_DEFAULT_MUX_SWITCH0;         #endif /* ADC_SAR_Seq_0_TOTAL_CHANNELS_NUM > 1u */    #endif /*ADC_SAR_Seq_0_CHANNELS_MODE !=0 */        ADC_SAR_Seq_0_SAR_SATURATE_INTR_MASK_REG = 0u;    ADC_SAR_Seq_0_SAR_RANGE_INTR_MASK_REG = 0u;    ADC_SAR_Seq_0_SAR_INTR_MASK_REG = ADC_SAR_Seq_0_SAR_INTR_MASK;    ADC_SAR_Seq_0_ANA_TRIM_REG = ADC_SAR_Seq_0_TRIM_COEF;        /* Read and modify default configuration based on characterization */    tmpRegVal = ADC_SAR_Seq_0_SAR_DFT_CTRL_REG;    #if(ADC_SAR_Seq_0_NOMINAL_CLOCK_FREQ > (ADC_SAR_Seq_0_MAX_FREQUENCY / 2))        tmpRegVal &= (uint32)~ADC_SAR_Seq_0_DCEN;        tmpRegVal |= ADC_SAR_Seq_0_SEL_CSEL_DFT_CHAR;    #else  /* clock speed < 9 Mhz */          tmpRegVal |= ADC_SAR_Seq_0_DLY_INC;    #endif /* clock speed > 9 Mhz */    ADC_SAR_Seq_0_SAR_DFT_CTRL_REG = tmpRegVal;//.........这里部分代码省略.........

/******************************************************************************** Function Name: Sensirion_I2C_Init********************************************************************************** Summary:*  Initializes I2C registers with initial values provided from customizer.** Parameters:*  None** Return:*  None** Global variables:*  None** Reentrant:*  No********************************************************************************/void Sensirion_I2C_Init(void) {    #if(Sensirion_I2C_FF_IMPLEMENTED)        Sensirion_I2C_CFG_REG  = Sensirion_I2C_DEFAULT_CFG;        Sensirion_I2C_XCFG_REG = Sensirion_I2C_DEFAULT_XCFG;        #if(CY_PSOC5A)            Sensirion_I2C_CLKDIV_REG  = LO8(Sensirion_I2C_DEFAULT_DIVIDE_FACTOR);        #else            Sensirion_I2C_CLKDIV1_REG = LO8(Sensirion_I2C_DEFAULT_DIVIDE_FACTOR);            Sensirion_I2C_CLKDIV2_REG = HI8(Sensirion_I2C_DEFAULT_DIVIDE_FACTOR);        #endif /* (CY_PSOC5A) */    #else        uint8 enableInterrupts;        Sensirion_I2C_CFG_REG      = Sensirion_I2C_DEFAULT_CFG;      /* control  */        Sensirion_I2C_INT_MASK_REG = Sensirion_I2C_DEFAULT_INT_MASK; /* int_mask */        /* Enable interrupts from block */        enableInterrupts = CyEnterCriticalSection();        Sensirion_I2C_INT_ENABLE_REG |= Sensirion_I2C_INTR_ENABLE; /* aux_ctl */        CyExitCriticalSection(enableInterrupts);        #if(Sensirion_I2C_MODE_MASTER_ENABLED)            Sensirion_I2C_MCLK_PRD_REG = Sensirion_I2C_DEFAULT_MCLK_PRD;            Sensirion_I2C_MCLK_CMP_REG = Sensirion_I2C_DEFAULT_MCLK_CMP;         #endif /* (Sensirion_I2C_MODE_MASTER_ENABLED) */        #if(Sensirion_I2C_MODE_SLAVE_ENABLED)            Sensirion_I2C_PERIOD_REG = Sensirion_I2C_DEFAULT_PERIOD;        #endif  /* (Sensirion_I2C_MODE_SLAVE_ENABLED) */    #endif /* (Sensirion_I2C_FF_IMPLEMENTED) */    #if(Sensirion_I2C_TIMEOUT_ENABLED)        Sensirion_I2C_TimeoutInit();    #endif /* (Sensirion_I2C_TIMEOUT_ENABLED) */    /* Disable Interrupt and set vector and priority */    CyIntDisable    (Sensirion_I2C_ISR_NUMBER);    CyIntSetPriority(Sensirion_I2C_ISR_NUMBER, Sensirion_I2C_ISR_PRIORITY);    #if(Sensirion_I2C_INTERN_I2C_INTR_HANDLER)        (void) CyIntSetVector(Sensirion_I2C_ISR_NUMBER, &Sensirion_I2C_ISR);    #endif /* (Sensirion_I2C_INTERN_I2C_INTR_HANDLER) */    /* Put state machine in idle state */    Sensirion_I2C_state = Sensirion_I2C_SM_IDLE;    #if(Sensirion_I2C_MODE_SLAVE_ENABLED)        /* Reset status and buffers index */        Sensirion_I2C_SlaveClearReadBuf();        Sensirion_I2C_SlaveClearWriteBuf();        Sensirion_I2C_slStatus = 0u; /* Reset slave status */        /* Set default address */        Sensirion_I2C_SlaveSetAddress(Sensirion_I2C_DEFAULT_ADDR);    #endif /* (Sensirion_I2C_MODE_SLAVE_ENABLED) */    #if(Sensirion_I2C_MODE_MASTER_ENABLED)        /* Reset status and buffers index */        Sensirion_I2C_MasterClearReadBuf();        Sensirion_I2C_MasterClearWriteBuf();        (void) Sensirion_I2C_MasterClearStatus();    #endif /* (Sensirion_I2C_MODE_MASTER_ENABLED) */}

    /*******************************************************************************    * Function Name: I2C_MASTER_I2CInit    ********************************************************************************    *    * Summary:    *  Configures the SCB for I2C operation.    *    * Parameters:    *  config:  Pointer to a structure that contains the following ordered list of    *           fields. These fields match the selections available in the    *           customizer.    *    * Return:    *  None    *    *******************************************************************************/    void I2C_MASTER_I2CInit(const I2C_MASTER_I2C_INIT_STRUCT *config)    {        uint32 medianFilter;        uint32 locEnableWake;        if(NULL == config)        {            CYASSERT(0u != 0u); /* Halt execution due to bad function parameter */        }        else        {            /* Configure pins */            I2C_MASTER_SetPins(I2C_MASTER_SCB_MODE_I2C, I2C_MASTER_DUMMY_PARAM,                                                                    I2C_MASTER_DUMMY_PARAM);            /* Store internal configuration */            I2C_MASTER_scbMode       = (uint8) I2C_MASTER_SCB_MODE_I2C;            I2C_MASTER_scbEnableWake = (uint8) config->enableWake;            I2C_MASTER_scbEnableIntr = (uint8) I2C_MASTER_SCB_IRQ_INTERNAL;            I2C_MASTER_mode          = (uint8) config->mode;            I2C_MASTER_acceptAddr    = (uint8) config->acceptAddr;        #if (I2C_MASTER_CY_SCBIP_V0)            /* Adjust SDA filter settings. Ticket ID#150521 */            I2C_MASTER_SET_I2C_CFG_SDA_FILT_TRIM(I2C_MASTER_EC_AM_I2C_CFG_SDA_FILT_TRIM);        #endif /* (I2C_MASTER_CY_SCBIP_V0) */            /* Adjust AF and DF filter settings. Ticket ID#176179 */            if (((I2C_MASTER_I2C_MODE_SLAVE != config->mode) &&                 (config->dataRate <= I2C_MASTER_I2C_DATA_RATE_FS_MODE_MAX)) ||                 (I2C_MASTER_I2C_MODE_SLAVE == config->mode))            {                /* AF = 1, DF = 0 */                I2C_MASTER_I2C_CFG_ANALOG_FITER_ENABLE;                medianFilter = I2C_MASTER_DIGITAL_FILTER_DISABLE;            }            else            {                /* AF = 0, DF = 1 */                I2C_MASTER_I2C_CFG_ANALOG_FITER_DISABLE;                medianFilter = I2C_MASTER_DIGITAL_FILTER_ENABLE;            }        #if (!I2C_MASTER_CY_SCBIP_V0)            locEnableWake = (I2C_MASTER_I2C_MULTI_MASTER_SLAVE) ? (0u) : (config->enableWake);        #else            locEnableWake = config->enableWake;        #endif /* (!I2C_MASTER_CY_SCBIP_V0) */            /* Configure I2C interface */            I2C_MASTER_CTRL_REG     = I2C_MASTER_GET_CTRL_BYTE_MODE  (config->enableByteMode) |                                            I2C_MASTER_GET_CTRL_ADDR_ACCEPT(config->acceptAddr)     |                                            I2C_MASTER_GET_CTRL_EC_AM_MODE (locEnableWake);            I2C_MASTER_I2C_CTRL_REG = I2C_MASTER_GET_I2C_CTRL_HIGH_PHASE_OVS(config->oversampleHigh) |                                            I2C_MASTER_GET_I2C_CTRL_LOW_PHASE_OVS (config->oversampleLow)  |                                            I2C_MASTER_GET_I2C_CTRL_SL_MSTR_MODE  (config->mode)           |                                            I2C_MASTER_I2C_CTRL;            /* Configure RX direction */            I2C_MASTER_RX_CTRL_REG      = I2C_MASTER_GET_RX_CTRL_MEDIAN(medianFilter) |                                                I2C_MASTER_I2C_RX_CTRL;            I2C_MASTER_RX_FIFO_CTRL_REG = I2C_MASTER_CLEAR_REG;            /* Set default address and mask */            I2C_MASTER_RX_MATCH_REG    = ((I2C_MASTER_I2C_SLAVE) ?                                                (I2C_MASTER_GET_I2C_8BIT_ADDRESS(config->slaveAddr) |                                                 I2C_MASTER_GET_RX_MATCH_MASK(config->slaveAddrMask)) :                                                (I2C_MASTER_CLEAR_REG));            /* Configure TX direction */            I2C_MASTER_TX_CTRL_REG      = I2C_MASTER_I2C_TX_CTRL;            I2C_MASTER_TX_FIFO_CTRL_REG = I2C_MASTER_CLEAR_REG;            /* Configure interrupt with I2C handler but do not enable it */            CyIntDisable    (I2C_MASTER_ISR_NUMBER);            CyIntSetPriority(I2C_MASTER_ISR_NUMBER, I2C_MASTER_ISR_PRIORITY);            (void) CyIntSetVector(I2C_MASTER_ISR_NUMBER, &I2C_MASTER_I2C_ISR);            /* Configure interrupt sources *///.........这里部分代码省略.........