自学教程：C++ HWREG16函数代码示例

//*****************************************************************************////! /brief Translates the data by reversing the bits in each byte and then sets//! this data to add into the CRC module to generate a new signature.//!//! This function first reverses the bits in each byte of the data and then//! generates the new signature from the current signature and new translated//! data.//!//! /param baseAddress is the base address of the CRC module.//! /param dataIn is the data to be added, through the CRC module, to the//!        signature.//!        /n Modified bits are /b CRCDIRB of /b CRCDIRB register.//!//! /return None////*****************************************************************************void CRC_setDataByteBitsReversed (uint32_t baseAddress,                                  uint16_t dataIn){    HWREG16(baseAddress + OFS_CRCDIRB) = dataIn;}

//*****************************************************************************////! /brief Clear all interrupt flags for the PMM//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b PMMIFG register.//!//! /return None////*****************************************************************************void PMM_clearPMMIFGS(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_PMMIFG) = 0;        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

//*****************************************************************************////! /brief Disables supervisor high side in LPM with tpd = 20 ?s(1)//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b SVSMHCTL register.//!//! /return None////*****************************************************************************void PMM_SvsHDisabledInLPMNormPerf(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_SVSMHCTL) &= ~(SVSMHACE + SVSHFP + SVSHMD);        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

//*****************************************************************************////! /brief Enables the POR signal generation when a low-voltage event is//! registered by the low-side SVS//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b PMMIE register.//!//! /return None////*****************************************************************************void PMM_enableSvsLReset(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_PMMRIE) |= SVSLPE;        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

//*****************************************************************************////! /brief Disables the POR signal generation when a low-voltage event is//! registered by the high-side SVS//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b PMMIE register.//!//! /return None////*****************************************************************************void PMM_disableSvsHReset(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_PMMRIE) &= ~SVSHPE;        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

void LCD_E_off(uint16_t baseAddress){    HWREG16(SYS_BASE + OFS_SYSCFG2) &= ~LCDPCTL;    HWREG16(baseAddress + OFS_LCDCTL0) &= ~LCDON;}

//*****************************************************************************////! /brief Disables the low-side SVS and SVM circuitry//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b SVSMLCTL register.//!//! /return None////*****************************************************************************void PMM_disableSvsLSvmL(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_SVSMLCTL) &= ~(SVSLE + SVMLE);        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

void USCI_B_I2C_setSlaveAddress(uint16_t baseAddress,                                uint8_t slaveAddress){    //Set the address of the slave with which the master will communicate.    HWREG16(baseAddress + OFS_UCBxI2CSA) = (slaveAddress);}

void DAC12_A_disableGrouping(uint16_t baseAddress){    HWREG16(baseAddress + OFS_DAC12_0CTL0) &= ~(DAC12GRP);}

//*****************************************************************************////! /brief Sets the seed for the CRC.//!//! This function sets the seed for the CRC to begin generating a signature//! with the given seed and all passed data. Using this funtion resets the CRC//! signature.//!//! /param baseAddress is the base address of the CRC module.//! /param seed is the seed for the CRC to start generating a signature from.//!        /n Modified bits are /b CRCINIRES of /b CRCINIRES register.//!//! /return None////*****************************************************************************void CRC_setSeed (uint32_t baseAddress,                  uint16_t seed){    HWREG16(baseAddress + OFS_CRCINIRES) = seed;}

//*****************************************************************************////! /brief Sets the 16 bit data to add into the CRC module to generate a new//! signature.//!//! This function sets the given data into the CRC module to generate the new//! signature from the current signature and new data.//!//! /param baseAddress is the base address of the CRC module.//! /param dataIn is the data to be added, through the CRC module, to the//!        signature.//!        /n Modified bits are /b CRCDI of /b CRCDI register.//!//! /return None////*****************************************************************************void CRC_set16BitData (uint32_t baseAddress,                       uint16_t dataIn){    HWREG16(baseAddress + OFS_CRCDI) = dataIn;}

//*****************************************************************************////! /brief Returns the bit-wise reversed format of the Signature Result.//!//! This function returns the bit-wise reversed format of the Signature Result.//!//! /param baseAddress is the base address of the CRC module.//!//! /return The bit-wise reversed format of the Signature Result////*****************************************************************************uint16_t CRC_getResultBitsReversed (uint32_t baseAddress){    return ( HWREG16(baseAddress + OFS_CRCRESR) );}

//*****************************************************************************////! /brief Returns the value pf the Signature Result.//!//! This function returns the value of the signature result generated by the//! CRC.//!//! /param baseAddress is the base address of the CRC module.//!//! /return The value currently in the data register////*****************************************************************************uint16_t CRC_getResult (uint32_t baseAddress){    return ( HWREG16(baseAddress + OFS_CRCINIRES) );}

//*****************************************************************************////! /brief Returns the value currently in the Data register.//!//! This function returns the value currently in the data register. If set in//! byte bits reversed format, then the translated data would be returned.//!//! /param baseAddress is the base address of the CRC module.//!//! /return The value currently in the data register////*****************************************************************************uint16_t CRC_getData (uint32_t baseAddress){    return ( HWREG16(baseAddress + OFS_CRCDI) );}

void DAC12_A_disable(uint16_t baseAddress,                     uint8_t submoduleSelect){    //Reset amplifier setting to turn DAC12_A off completely    HWREG16(baseAddress + submoduleSelect + OFS_DAC12_0CTL0) &= ~(DAC12AMP_7);}

void DAC12_A_enableInterrupt(uint16_t baseAddress,                             uint8_t submoduleSelect){    HWREG16(baseAddress + submoduleSelect + OFS_DAC12_0CTL0) |= DAC12IE;}

void DAC12_A_enableGrouping(uint16_t baseAddress){    HWREG16(baseAddress + OFS_DAC12_0CTL0) |= DAC12GRP;}

uint16_t DAC12_A_getInterruptStatus(uint16_t baseAddress,                                    uint8_t submoduleSelect){    return (HWREG16(baseAddress + submoduleSelect +                    OFS_DAC12_0CTL0) & DAC12IFG);}

//*****************************************************************************////! /brief Enables the high-side SVM circuitry//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b SVSMHCTL register.//!//! /return None////*****************************************************************************void PMM_enableSvmH(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_SVSMHCTL) |= SVMHE;        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

void DAC12_A_clearInterrupt(uint16_t baseAddress,                            uint8_t submoduleSelect){    HWREG16(baseAddress + submoduleSelect + OFS_DAC12_0CTL0) &= ~(DAC12IFG);}

//*****************************************************************************////! /brief Disables the high-side SVS and SVM circuitry//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b SVSMHCTL register.//!//! /return None////*****************************************************************************void PMM_disableSvsHSvmH(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_SVSMHCTL) &= ~(SVSHE + SVMHE);        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

uint16_t DAC12_A_getCalibrationData(uint16_t baseAddress,                                    uint8_t submoduleSelect){    return ((uint16_t)(HWREG16(baseAddress + submoduleSelect +                               OFS_DAC12_0CALDAT)));}

//*****************************************************************************////! /brief Enables the interrupt generation when a low-voltage event is//! registered by the low-side SVM//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b PMMIE register.//!//! /return None////*****************************************************************************void PMM_enableSvmLInterrupt(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_PMMRIE) |= SVMLIE;        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

void DAC12_A_enableConversions(uint16_t baseAddress,                               uint8_t submoduleSelect){    HWREG16(baseAddress + submoduleSelect + OFS_DAC12_0CTL0) |= DAC12ENC;}

//*****************************************************************************////! /brief Disables the interrupt generation when a low-voltage event is//! registered by the high-side SVM//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b PMMIE register.//!//! /return None////*****************************************************************************void PMM_disableSvmHInterrupt(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_PMMRIE) &= ~SVMHIE;        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

void DAC12_A_setData(uint16_t baseAddress,                     uint8_t submoduleSelect,                     uint16_t data){    HWREG16(baseAddress + submoduleSelect + OFS_DAC12_0DAT) = data;}

//*****************************************************************************////! /brief Disables supervisor low side in LPM with twake-up-slow from LPM2,//! LPM3, and LPM4//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b SVSMLCTL register.//!//! /return None////*****************************************************************************void PMM_SvsLDisabledInLPMSlowWake(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_SVSMLCTL) &= ~(SVSLFP + SVSMLACE + SVSLMD);        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

void DAC12_A_disableConversions(uint16_t baseAddress,                                uint8_t submoduleSelect){    HWREG16(baseAddress + submoduleSelect + OFS_DAC12_0CTL0) &= ~(DAC12ENC);}

//*****************************************************************************////! /brief Optimized to provide tpd = 2.5 ?s(1) in LPM with least power//!//! /param baseAddress is the base address of the PMM module.//!//! Modified bits of /b PMMCTL0 register and bits of /b SVSMLCTL register.//!//! /return None////*****************************************************************************void PMM_SvsHOptimizedInLPMFullPerf(uint32_t baseAddress){        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0xA5;        HWREG16(baseAddress + OFS_SVSMHCTL) |= (SVSHMD + SVSHFP + SVSMHACE);        HWREG8(baseAddress + OFS_PMMCTL0_H) = 0x00;}

//*****************************************************************************////! /brief Locks the configuration registers and disables write access//!//! /param baseAddress is the base address of the LDOPWR module.//!//! Modified bits of /b LDOKEYPID register.//!//! /return None////*****************************************************************************void LDOPWR_lockConfiguration( uint32_t baseAddress ){        HWREG16(baseAddress + OFS_LDOKEYPID) = 0x0000;}