自学教程：C++ IEEE80211_IS_CHAN_B函数代码示例

static voidprint_chaninfo(const struct ieee80211_channel *c){#define	IEEE80211_IS_CHAN_PASSIVE(_c) /	(((_c)->ic_flags & IEEE80211_CHAN_PASSIVE))	char buf[14];	buf[0] = '/0';	if (IEEE80211_IS_CHAN_FHSS(c))		strlcat(buf, " FHSS", sizeof(buf));	if (IEEE80211_IS_CHAN_A(c))		strlcat(buf, " 11a", sizeof(buf));	/* XXX 11g schizophrenia */	if (IEEE80211_IS_CHAN_G(c) ||	    IEEE80211_IS_CHAN_PUREG(c))		strlcat(buf, " 11g", sizeof(buf));	else if (IEEE80211_IS_CHAN_B(c))		strlcat(buf, " 11b", sizeof(buf));	if (IEEE80211_IS_CHAN_STURBO(c))		strlcat(buf, " Static", sizeof(buf));	if (IEEE80211_IS_CHAN_DTURBO(c))		strlcat(buf, " Dynamic", sizeof(buf));	printf("Channel %3u : %u%c Mhz%-14.14s",		c->ic_ieee, c->ic_freq,		IEEE80211_IS_CHAN_PASSIVE(c) ? '*' : ' ', buf);#undef IEEE80211_IS_CHAN_PASSIVE}

/* * ADC GAIN/DC offset calibration is for calibrating two ADCs that * are acting as one by interleaving incoming symbols. This isn't * relevant for 2.4GHz 20MHz wide modes because, as far as I can tell, * the secondary ADC is never enabled. It is enabled however for * 5GHz modes. * * It hasn't been confirmed whether doing this calibration is needed * at all in the above modes and/or whether it's actually harmful. * So for now, let's leave it enabled and just remember to get * confirmation that it needs to be clarified. * * See US Patent No: US 7,541,952 B1: *  " Method and Apparatus for Offset and Gain Compensation for *    Analog-to-Digital Converters." */static OS_INLINE HAL_BOOLar5416IsCalSupp(struct ath_hal *ah, const struct ieee80211_channel *chan,	HAL_CAL_TYPE calType) {	struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;	switch (calType & cal->suppCals) {	case IQ_MISMATCH_CAL:		/* Run IQ Mismatch for non-CCK only */		return !IEEE80211_IS_CHAN_B(chan);	case ADC_GAIN_CAL:	case ADC_DC_CAL:		/*		 * Run ADC Gain Cal for either 5ghz any or 2ghz HT40.		 *		 * Don't run ADC calibrations for 5ghz fast clock mode		 * in HT20 - only one ADC is used.		 */		if (IEEE80211_IS_CHAN_HT20(chan) &&		    (IS_5GHZ_FAST_CLOCK_EN(ah, chan)))			return AH_FALSE;		if (IEEE80211_IS_CHAN_5GHZ(chan))			return AH_TRUE;		if (IEEE80211_IS_CHAN_HT40(chan))			return AH_TRUE;		return AH_FALSE;	}	return AH_FALSE;}

static voidprint_chaninfo(const struct ieee80211_channel *c){	char buf[14];	buf[0] = '/0';	if (IEEE80211_IS_CHAN_FHSS(c))		strlcat(buf, " FHSS", sizeof(buf));	if (IEEE80211_IS_CHAN_A(c))		strlcat(buf, " 11a", sizeof(buf));	/* XXX 11g schizophrenia */	if (IEEE80211_IS_CHAN_G(c) ||	    IEEE80211_IS_CHAN_PUREG(c))		strlcat(buf, " 11g", sizeof(buf));	else if (IEEE80211_IS_CHAN_B(c))		strlcat(buf, " 11b", sizeof(buf));	if (IEEE80211_IS_CHAN_STURBO(c))		strlcat(buf, " Static", sizeof(buf));	if (IEEE80211_IS_CHAN_DTURBO(c))		strlcat(buf, " Dynamic", sizeof(buf));	if (IEEE80211_IS_CHAN_HALF(c))		strlcat(buf, " Half", sizeof(buf));	if (IEEE80211_IS_CHAN_QUARTER(c))		strlcat(buf, " Quarter", sizeof(buf));	printf("Channel %3u : %u%c%c Mhz%-14.14s",		c->ic_ieee, c->ic_freq,		IEEE80211_IS_CHAN_PASSIVE(c) ? '*' : ' ', 	        IEEE80211_IS_CHAN_RADAR(c) ? '!' : ' ', 	       buf);}

/* * Reads EEPROM header info from device structure and programs * all rf registers * * REQUIRES: Access to the analog rf device */static HAL_BOOLar2316SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,	uint16_t modesIndex, uint16_t *rfXpdGain){#define	RF_BANK_SETUP(_priv, _ix, _col) do {				    /	int i;								    /	for (i = 0; i < N(ar5212Bank##_ix##_2316); i++)			    /		(_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2316[i][_col];/} while (0)	struct ath_hal_5212 *ahp = AH5212(ah);	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;	uint16_t ob2GHz = 0, db2GHz = 0;	struct ar2316State *priv = AR2316(ah);	int regWrites = 0;	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u/n",	    __func__, chan->ic_freq, chan->ic_flags, modesIndex);	HALASSERT(priv != AH_NULL);	/* Setup rf parameters */	if (IEEE80211_IS_CHAN_B(chan)) {		ob2GHz = ee->ee_obFor24;		db2GHz = ee->ee_dbFor24;	} else {		ob2GHz = ee->ee_obFor24g;		db2GHz = ee->ee_dbFor24g;	}	/* Bank 1 Write */	RF_BANK_SETUP(priv, 1, 1);	/* Bank 2 Write */	RF_BANK_SETUP(priv, 2, modesIndex);	/* Bank 3 Write */	RF_BANK_SETUP(priv, 3, modesIndex);	/* Bank 6 Write */	RF_BANK_SETUP(priv, 6, modesIndex);	ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz,   3, 178, 0);	ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz,   3, 175, 0);	/* Bank 7 Setup */	RF_BANK_SETUP(priv, 7, modesIndex);	/* Write Analog registers */	HAL_INI_WRITE_BANK(ah, ar5212Bank1_2316, priv->Bank1Data, regWrites);	HAL_INI_WRITE_BANK(ah, ar5212Bank2_2316, priv->Bank2Data, regWrites);	HAL_INI_WRITE_BANK(ah, ar5212Bank3_2316, priv->Bank3Data, regWrites);	HAL_INI_WRITE_BANK(ah, ar5212Bank6_2316, priv->Bank6Data, regWrites);	HAL_INI_WRITE_BANK(ah, ar5212Bank7_2316, priv->Bank7Data, regWrites);	/* Now that we have reprogrammed rfgain value, clear the flag. */	ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;	return AH_TRUE;#undef	RF_BANK_SETUP}

static voidar5212AniCckErrTrigger(struct ath_hal *ah){	struct ath_hal_5212 *ahp = AH5212(ah);	const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;	struct ar5212AniState *aniState;	const struct ar5212AniParams *params;	HALASSERT(chan != AH_NULL);	if (!ANI_ENA(ah))		return;	/* first, raise noise immunity level, up to max */	aniState = ahp->ah_curani;	params = aniState->params;	if (aniState->noiseImmunityLevel+1 <= params->maxNoiseImmunityLevel) {		HALDEBUG(ah, HAL_DEBUG_ANI, "%s: raise NI to %u/n", __func__,		    aniState->noiseImmunityLevel + 1);		ar5212AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,				 aniState->noiseImmunityLevel + 1);		return;	}	if (ANI_ENA_RSSI(ah)) {		int32_t rssi = BEACON_RSSI(ahp);		if (rssi >  params->rssiThrLow) {			/*			 * Beacon signal in mid and high range,			 * raise firstep level.			 */			if (aniState->firstepLevel+1 <= params->maxFirstepLevel) {				HALDEBUG(ah, HAL_DEBUG_ANI,				    "%s: rssi %d raise ST %u/n", __func__, rssi,				    aniState->firstepLevel+1);				ar5212AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,						 aniState->firstepLevel + 1);			}		} else {			/*			 * Beacon rssi is low, zero firstep level to maximize			 * CCK sensitivity in 11b/g mode.			 */			/* XXX can optimize */			if (IEEE80211_IS_CHAN_B(chan) ||			    IEEE80211_IS_CHAN_G(chan)) {				if (aniState->firstepLevel > 0) {					HALDEBUG(ah, HAL_DEBUG_ANI,					    "%s: rssi %d zero ST (was %u)/n",					    __func__, rssi,					    aniState->firstepLevel);					ar5212AniControl(ah,					    HAL_ANI_FIRSTEP_LEVEL, 0);				}			}		}	}}

/* * Determine if calibration is supported by device and channel flags */static OS_INLINE HAL_BOOLar5416IsCalSupp(struct ath_hal *ah, const struct ieee80211_channel *chan,	HAL_CAL_TYPE calType) {	struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;	switch (calType & cal->suppCals) {	case IQ_MISMATCH_CAL:		/* Run IQ Mismatch for non-CCK only */		return !IEEE80211_IS_CHAN_B(chan);	case ADC_GAIN_CAL:	case ADC_DC_CAL:		/* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */		return !IEEE80211_IS_CHAN_B(chan) &&		    !(IEEE80211_IS_CHAN_2GHZ(chan) && IEEE80211_IS_CHAN_HT20(chan));	}	return AH_FALSE;}

static intiwm_mvm_scan_skip_channel(struct ieee80211_channel *c){	if (IEEE80211_IS_CHAN_2GHZ(c) && IEEE80211_IS_CHAN_B(c))		return 0;	else if (IEEE80211_IS_CHAN_5GHZ(c) && IEEE80211_IS_CHAN_A(c))		return 0;	else		return 1;}

static intiwm_mvm_scan_fill_channels(struct iwm_softc *sc, struct iwm_scan_cmd *cmd,	int flags, int n_ssids, int basic_ssid){	struct ieee80211com *ic = sc->sc_ic;	uint16_t passive_dwell = iwm_mvm_get_passive_dwell(sc, flags);	uint16_t active_dwell = iwm_mvm_get_active_dwell(sc, flags, n_ssids);	struct iwm_scan_channel *chan = (struct iwm_scan_channel *)		(cmd->data + le16toh(cmd->tx_cmd.len));	int type = (1 << n_ssids) - 1;	struct ieee80211_channel *c;	int nchan, j;	if (!basic_ssid)		type |= (1 << n_ssids);	for (nchan = j = 0; j < ic->ic_nchans; j++) {		c = &ic->ic_channels[j];		/* For 2GHz, only populate 11b channels */		/* For 5GHz, only populate 11a channels */		/*		 * Catch other channels, in case we have 900MHz channels or		 * something in the chanlist.		 */		if ((flags & IEEE80211_CHAN_2GHZ) && (! IEEE80211_IS_CHAN_B(c))) {			continue;		} else if ((flags & IEEE80211_CHAN_5GHZ) && (! IEEE80211_IS_CHAN_A(c))) {			continue;		} else {			IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_EEPROM,			    "%s: skipping channel (freq=%d, ieee=%d, flags=0x%08x)/n",			    __func__,			    c->ic_freq,			    c->ic_ieee,			    c->ic_flags);		}		IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_EEPROM,		    "Adding channel %d (%d Mhz) to the list/n",			nchan, c->ic_freq);		chan->channel = htole16(ieee80211_mhz2ieee(c->ic_freq, flags));		chan->type = htole32(type);		if (c->ic_flags & IEEE80211_CHAN_PASSIVE)			chan->type &= htole32(~IWM_SCAN_CHANNEL_TYPE_ACTIVE);		chan->active_dwell = htole16(active_dwell);		chan->passive_dwell = htole16(passive_dwell);		chan->iteration_count = htole16(1);		chan++;		nchan++;	}	if (nchan == 0)		device_printf(sc->sc_dev,		    "%s: NO CHANNEL!/n", __func__);	return nchan;}

void icm_display_channel_flags(ICM_CHANNEL_T* pch){    ICM_DEV_INFO_T* pdev = get_pdev();    if (IEEE80211_IS_CHAN_FHSS(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/tFHSS/n");    }    if (IEEE80211_IS_CHAN_11NA(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/t11na/n");    } else if (IEEE80211_IS_CHAN_A(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/t11a/n");    } else if (IEEE80211_IS_CHAN_11NG(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/t11ng/n");    } else if (IEEE80211_IS_CHAN_G(pch) ||        IEEE80211_IS_CHAN_PUREG(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/t11g/n");    } else if (IEEE80211_IS_CHAN_B(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/t11b/n");    }    if (IEEE80211_IS_CHAN_TURBO(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/tTurbo/n");    }    if(IEEE80211_IS_CHAN_11N_CTL_CAPABLE(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/tControl capable/n");    }    if(IEEE80211_IS_CHAN_11N_CTL_U_CAPABLE(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/tControl capable upper/n");    }    if(IEEE80211_IS_CHAN_11N_CTL_L_CAPABLE(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/tControl capable lower/n");    }    if (IEEE80211_IS_CHAN_DFSFLAG(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/tDFS/n");    }    if (IEEE80211_IS_CHAN_HALF(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/tHalf/n");    }    if (IEEE80211_IS_CHAN_PASSIVE(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/tPassive/n");    }    if (IEEE80211_IS_CHAN_QUARTER(pch)) {        ICM_DPRINTF(pdev, ICM_PRCTRL_FLAG_NONE, ICM_DEBUG_LEVEL_DEFAULT, ICM_MODULE_ID_UTIL, "/tQuarter/n");    }}

voidieee80211_channel_init(struct ifnet *ifp){	struct ieee80211com *ic = (void *)ifp;	struct ieee80211_channel *c;	int i;	/*	 * Fill in 802.11 available channel set, mark	 * all available channels as active, and pick	 * a default channel if not already specified.	 */	memset(ic->ic_chan_avail, 0, sizeof(ic->ic_chan_avail));	ic->ic_modecaps |= 1<<IEEE80211_MODE_AUTO;	for (i = 0; i <= IEEE80211_CHAN_MAX; i++) {		c = &ic->ic_channels[i];		if (c->ic_flags) {			/*			 * Verify driver passed us valid data.			 */			if (i != ieee80211_chan2ieee(ic, c)) {				printf("%s: bad channel ignored; "					"freq %u flags %x number %u/n",					ifp->if_xname, c->ic_freq, c->ic_flags,					i);				c->ic_flags = 0;	/* NB: remove */				continue;			}			setbit(ic->ic_chan_avail, i);			/*			 * Identify mode capabilities.			 */			if (IEEE80211_IS_CHAN_A(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_11A;			if (IEEE80211_IS_CHAN_B(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_11B;			if (IEEE80211_IS_CHAN_PUREG(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_11G;			if (IEEE80211_IS_CHAN_T(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_TURBO;		}	}	/* validate ic->ic_curmode */	if ((ic->ic_modecaps & (1<<ic->ic_curmode)) == 0)		ic->ic_curmode = IEEE80211_MODE_AUTO;	ic->ic_des_chan = IEEE80211_CHAN_ANYC;	/* any channel is ok */	ic->ic_scan_lock = IEEE80211_SCAN_UNLOCKED;}

static charchannel_type(const struct ieee80211_channel *c){	if (IEEE80211_IS_CHAN_ST(c))		return 'S';	if (IEEE80211_IS_CHAN_108A(c))		return 'T';	if (IEEE80211_IS_CHAN_108G(c))		return 'G';	if (IEEE80211_IS_CHAN_HT(c))		return 'n';	if (IEEE80211_IS_CHAN_A(c))		return 'a';	if (IEEE80211_IS_CHAN_ANYG(c))		return 'g';	if (IEEE80211_IS_CHAN_B(c))		return 'b';	return 'f';}

/* * Return the test group for the specific channel based on * the current regulatory setup. */u_intath_hal_getctl(struct ath_hal *ah, const struct ieee80211_channel *c){	u_int ctl;	if (AH_PRIVATE(ah)->ah_rd2GHz == AH_PRIVATE(ah)->ah_rd5GHz ||	    (ah->ah_countryCode == CTRY_DEFAULT && isWwrSKU(ah)))		ctl = SD_NO_CTL;	else if (IEEE80211_IS_CHAN_2GHZ(c))		ctl = AH_PRIVATE(ah)->ah_rd2GHz->conformanceTestLimit;	else		ctl = AH_PRIVATE(ah)->ah_rd5GHz->conformanceTestLimit;	if (IEEE80211_IS_CHAN_B(c))		return ctl | CTL_11B;	if (IEEE80211_IS_CHAN_G(c))		return ctl | CTL_11G;	if (IEEE80211_IS_CHAN_108G(c))		return ctl | CTL_108G;	if (IEEE80211_IS_CHAN_TURBO(c))		return ctl | CTL_TURBO;	if (IEEE80211_IS_CHAN_A(c))		return ctl | CTL_11A;	return ctl;}

static HAL_BOOLar2316GetChannelMaxMinPower(struct ath_hal *ah,	const struct ieee80211_channel *chan,	int16_t *maxPow, int16_t *minPow){	uint16_t freq = chan->ic_freq;		/* NB: never mapped */	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;	const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL;	const RAW_DATA_PER_CHANNEL_2316 *data=AH_NULL;	uint16_t numChannels;	int totalD,totalF, totalMin,last, i;	*maxPow = 0;	if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];	else if (IEEE80211_IS_CHAN_B(chan))		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];	else		return(AH_FALSE);	numChannels = pRawDataset->numChannels;	data = pRawDataset->pDataPerChannel;		/* Make sure the channel is in the range of the TP values 	 *  (freq piers)	 */	if (numChannels < 1)		return(AH_FALSE);	if ((freq < data[0].channelValue) ||	    (freq > data[numChannels-1].channelValue)) {		if (freq < data[0].channelValue) {			*maxPow = ar2316GetMaxPower(ah, &data[0]);			*minPow = ar2316GetMinPower(ah, &data[0]);			return(AH_TRUE);		} else {			*maxPow = ar2316GetMaxPower(ah, &data[numChannels - 1]);			*minPow = ar2316GetMinPower(ah, &data[numChannels - 1]);			return(AH_TRUE);		}	}	/* Linearly interpolate the power value now */	for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);	     last = i++);	totalD = data[i].channelValue - data[last].channelValue;	if (totalD > 0) {		totalF = ar2316GetMaxPower(ah, &data[i]) - ar2316GetMaxPower(ah, &data[last]);		*maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + 				     ar2316GetMaxPower(ah, &data[last])*totalD)/totalD);		totalMin = ar2316GetMinPower(ah, &data[i]) - ar2316GetMinPower(ah, &data[last]);		*minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +				     ar2316GetMinPower(ah, &data[last])*totalD)/totalD);		return(AH_TRUE);	} else {		if (freq == data[i].channelValue) {			*maxPow = ar2316GetMaxPower(ah, &data[i]);			*minPow = ar2316GetMinPower(ah, &data[i]);			return(AH_TRUE);		} else			return(AH_FALSE);	}}

static HAL_BOOLar2316SetPowerTable(struct ath_hal *ah,	int16_t *minPower, int16_t *maxPower,	const struct ieee80211_channel *chan, 	uint16_t *rfXpdGain){	struct ath_hal_5212 *ahp = AH5212(ah);	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;	const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL;	uint16_t pdGainOverlap_t2;	int16_t minCalPower2316_t2;	uint16_t *pdadcValues = ahp->ah_pcdacTable;	uint16_t gainBoundaries[4];	uint32_t reg32, regoffset;	int i, numPdGainsUsed;#ifndef AH_USE_INIPDGAIN	uint32_t tpcrg1;#endif	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x/n",	    __func__, chan->ic_freq, chan->ic_flags);	if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];	else if (IEEE80211_IS_CHAN_B(chan))		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];	else {		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode/n", __func__);		return AH_FALSE;	}	pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),					  AR_PHY_TPCRG5_PD_GAIN_OVERLAP);    	numPdGainsUsed = ar2316getGainBoundariesAndPdadcsForPowers(ah,		chan->channel, pRawDataset, pdGainOverlap_t2,		&minCalPower2316_t2,gainBoundaries, rfXpdGain, pdadcValues);	HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);#ifdef AH_USE_INIPDGAIN	/*	 * Use pd_gains curve from eeprom; Atheros always uses	 * the default curve from the ini file but some vendors	 * (e.g. Zcomax) want to override this curve and not	 * honoring their settings results in tx power 5dBm low.	 */	OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, 			 (pRawDataset->pDataPerChannel[0].numPdGains - 1));#else	tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);	tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)		  | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);	switch (numPdGainsUsed) {	case 3:		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;		tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);		/* fall thru... */	case 2:		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;		tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);		/* fall thru... */	case 1:		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;		tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);		break;	}#ifdef AH_DEBUG	if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))		HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "		    "pd_gains (default 0x%x, calculated 0x%x)/n",		    __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);#endif	OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);#endif	/*	 * Note the pdadc table may not start at 0 dBm power, could be	 * negative or greater than 0.  Need to offset the power	 * values by the amount of minPower for griffin	 */	if (minCalPower2316_t2 != 0)		ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2316_t2);	else		ahp->ah_txPowerIndexOffset = 0;	/* Finally, write the power values into the baseband power table */	regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */	for (i = 0; i < 32; i++) {		reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0)  | 			((pdadcValues[4*i + 1] & 0xFF) << 8)  |			((pdadcValues[4*i + 2] & 0xFF) << 16) |			((pdadcValues[4*i + 3] & 0xFF) << 24) ;        		OS_REG_WRITE(ah, regoffset, reg32);		regoffset += 4;	}	OS_REG_WRITE(ah, AR_PHY_TPCRG5, 		     SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 		     SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |		     SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |//.........这里部分代码省略.........

voidieee80211_ifattach(struct ifnet *ifp){	struct ieee80211com *ic = (void *)ifp;	struct ieee80211_channel *c;	int i;	ether_ifattach(ifp, ic->ic_myaddr);#if NBPFILTER > 0	bpfattach2(ifp, DLT_IEEE802_11,	    sizeof(struct ieee80211_frame_addr4), &ic->ic_rawbpf);#endif	ieee80211_crypto_attach(ifp);	/*	 * Fill in 802.11 available channel set, mark	 * all available channels as active, and pick	 * a default channel if not already specified.	 */	memset(ic->ic_chan_avail, 0, sizeof(ic->ic_chan_avail));	ic->ic_modecaps |= 1<<IEEE80211_MODE_AUTO;	for (i = 0; i <= IEEE80211_CHAN_MAX; i++) {		c = &ic->ic_channels[i];		if (c->ic_flags) {			/*			 * Verify driver passed us valid data.			 */			if (i != ieee80211_chan2ieee(ic, c)) {				if_printf(ifp, "bad channel ignored; "					"freq %u flags %x number %u/n",					c->ic_freq, c->ic_flags, i);				c->ic_flags = 0;	/* NB: remove */				continue;			}			setbit(ic->ic_chan_avail, i);			/*			 * Identify mode capabilities.			 */			if (IEEE80211_IS_CHAN_A(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_11A;			if (IEEE80211_IS_CHAN_B(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_11B;			if (IEEE80211_IS_CHAN_PUREG(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_11G;			if (IEEE80211_IS_CHAN_FHSS(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_FH;			if (IEEE80211_IS_CHAN_T(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_TURBO;		}	}	/* validate ic->ic_curmode */	if ((ic->ic_modecaps & (1<<ic->ic_curmode)) == 0)		ic->ic_curmode = IEEE80211_MODE_AUTO;	ieee80211_setbasicrates(ic);	(void) ieee80211_setmode(ic, ic->ic_curmode);	ic->ic_des_chan = IEEE80211_CHAN_ANYC;	/* any channel is ok */	if (ic->ic_lintval == 0)		ic->ic_lintval = 100;		/* default sleep */	ic->ic_bmisstimeout = 7*ic->ic_lintval;	/* default 7 beacons */	ieee80211_node_attach(ifp);	ieee80211_proto_attach(ifp);}

/* * Fill in 802.11 available channel set, mark * all available channels as active, and pick * a default channel if not already specified. */static voidieee80211_chan_init(struct ieee80211com *ic){#define	DEFAULTRATES(m, def) do { /	if (ic->ic_sup_rates[m].rs_nrates == 0) /		ic->ic_sup_rates[m] = def; /} while (0)	struct ieee80211_channel *c;	int i;	KASSERT(0 < ic->ic_nchans && ic->ic_nchans <= IEEE80211_CHAN_MAX,		("invalid number of channels specified: %u", ic->ic_nchans));	memset(ic->ic_chan_avail, 0, sizeof(ic->ic_chan_avail));	memset(ic->ic_modecaps, 0, sizeof(ic->ic_modecaps));	setbit(ic->ic_modecaps, IEEE80211_MODE_AUTO);	for (i = 0; i < ic->ic_nchans; i++) {		c = &ic->ic_channels[i];		KASSERT(c->ic_flags != 0, ("channel with no flags"));		/*		 * Help drivers that work only with frequencies by filling		 * in IEEE channel #'s if not already calculated.  Note this		 * mimics similar work done in ieee80211_setregdomain when		 * changing regulatory state.		 */		if (c->ic_ieee == 0)			c->ic_ieee = ieee80211_mhz2ieee(c->ic_freq,c->ic_flags);		if (IEEE80211_IS_CHAN_HT40(c) && c->ic_extieee == 0)			c->ic_extieee = ieee80211_mhz2ieee(c->ic_freq +			    (IEEE80211_IS_CHAN_HT40U(c) ? 20 : -20),			    c->ic_flags);		/* default max tx power to max regulatory */		if (c->ic_maxpower == 0)			c->ic_maxpower = 2*c->ic_maxregpower;		setbit(ic->ic_chan_avail, c->ic_ieee);		/*		 * Identify mode capabilities.		 */		if (IEEE80211_IS_CHAN_A(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_11A);		if (IEEE80211_IS_CHAN_B(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_11B);		if (IEEE80211_IS_CHAN_ANYG(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_11G);		if (IEEE80211_IS_CHAN_FHSS(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_FH);		if (IEEE80211_IS_CHAN_108A(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_TURBO_A);		if (IEEE80211_IS_CHAN_108G(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_TURBO_G);		if (IEEE80211_IS_CHAN_ST(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_STURBO_A);		if (IEEE80211_IS_CHAN_HALF(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_HALF);		if (IEEE80211_IS_CHAN_QUARTER(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_QUARTER);		if (IEEE80211_IS_CHAN_HTA(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_11NA);		if (IEEE80211_IS_CHAN_HTG(c))			setbit(ic->ic_modecaps, IEEE80211_MODE_11NG);	}	/* initialize candidate channels to all available */	memcpy(ic->ic_chan_active, ic->ic_chan_avail,		sizeof(ic->ic_chan_avail));	/* sort channel table to allow lookup optimizations */	ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);	/* invalidate any previous state */	ic->ic_bsschan = IEEE80211_CHAN_ANYC;	ic->ic_prevchan = NULL;	ic->ic_csa_newchan = NULL;	/* arbitrarily pick the first channel */	ic->ic_curchan = &ic->ic_channels[0];	ic->ic_rt = ieee80211_get_ratetable(ic->ic_curchan);	/* fillin well-known rate sets if driver has not specified */	DEFAULTRATES(IEEE80211_MODE_11B,	 ieee80211_rateset_11b);	DEFAULTRATES(IEEE80211_MODE_11G,	 ieee80211_rateset_11g);	DEFAULTRATES(IEEE80211_MODE_11A,	 ieee80211_rateset_11a);	DEFAULTRATES(IEEE80211_MODE_TURBO_A,	 ieee80211_rateset_11a);	DEFAULTRATES(IEEE80211_MODE_TURBO_G,	 ieee80211_rateset_11g);	DEFAULTRATES(IEEE80211_MODE_STURBO_A,	 ieee80211_rateset_11a);	DEFAULTRATES(IEEE80211_MODE_HALF,	 ieee80211_rateset_half);	DEFAULTRATES(IEEE80211_MODE_QUARTER,	 ieee80211_rateset_quarter);	DEFAULTRATES(IEEE80211_MODE_11NA,	 ieee80211_rateset_11a);	DEFAULTRATES(IEEE80211_MODE_11NG,	 ieee80211_rateset_11g);	/*	 * Set auto mode to reset active channel state and any desired channel.	 */	(void) ieee80211_setmode(ic, IEEE80211_MODE_AUTO);#undef DEFAULTRATES}

voidieee80211_ifattach(struct ifnet *ifp){	struct ieee80211com *ic = (void *)ifp;	struct ieee80211_channel *c;	int i;	memcpy(((struct arpcom *)ifp)->ac_enaddr, ic->ic_myaddr,		ETHER_ADDR_LEN);	ether_ifattach(ifp);	ifp->if_output = ieee80211_output;#if NBPFILTER > 0	bpfattach(&ic->ic_rawbpf, ifp, DLT_IEEE802_11,	    sizeof(struct ieee80211_frame_addr4));#endif	ieee80211_crypto_attach(ifp);	/*	 * Fill in 802.11 available channel set, mark	 * all available channels as active, and pick	 * a default channel if not already specified.	 */	memset(ic->ic_chan_avail, 0, sizeof(ic->ic_chan_avail));	ic->ic_modecaps |= 1<<IEEE80211_MODE_AUTO;	for (i = 0; i <= IEEE80211_CHAN_MAX; i++) {		c = &ic->ic_channels[i];		if (c->ic_flags) {			/*			 * Verify driver passed us valid data.			 */			if (i != ieee80211_chan2ieee(ic, c)) {				printf("%s: bad channel ignored; "					"freq %u flags %x number %u/n",					ifp->if_xname, c->ic_freq, c->ic_flags,					i);				c->ic_flags = 0;	/* NB: remove */				continue;			}			setbit(ic->ic_chan_avail, i);			/*			 * Identify mode capabilities.			 */			if (IEEE80211_IS_CHAN_A(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_11A;			if (IEEE80211_IS_CHAN_B(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_11B;			if (IEEE80211_IS_CHAN_PUREG(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_11G;			if (IEEE80211_IS_CHAN_T(c))				ic->ic_modecaps |= 1<<IEEE80211_MODE_TURBO;		}	}	/* validate ic->ic_curmode */	if ((ic->ic_modecaps & (1<<ic->ic_curmode)) == 0)		ic->ic_curmode = IEEE80211_MODE_AUTO;	ic->ic_des_chan = IEEE80211_CHAN_ANYC;	/* any channel is ok */	ic->ic_scan_lock = IEEE80211_SCAN_UNLOCKED;	/* IEEE 802.11 defines a MTU >= 2290 */	ifp->if_capabilities |= IFCAP_VLAN_MTU;	ieee80211_setbasicrates(ic);	(void)ieee80211_setmode(ic, ic->ic_curmode);	if (ic->ic_lintval == 0)		ic->ic_lintval = 100;		/* default sleep */	ic->ic_bmisstimeout = 7*ic->ic_lintval;	/* default 7 beacons */	ic->ic_dtim_period = 1;	/* all TIMs are DTIMs */	LIST_INSERT_HEAD(&ieee80211com_head, ic, ic_list);	ieee80211_node_attach(ifp);	ieee80211_proto_attach(ifp);	if_addgroup(ifp, "wlan");	ifp->if_priority = IF_WIRELESS_DEFAULT_PRIORITY;}

/* * Set the retry, aifs, cwmin/max, readyTime regs for specified queue */HAL_BOOLar5211ResetTxQueue(struct ath_hal *ah, u_int q){	struct ath_hal_5211 *ahp = AH5211(ah);	const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;	HAL_TX_QUEUE_INFO *qi;	uint32_t cwMin, chanCwMin, value;	if (q >= HAL_NUM_TX_QUEUES) {		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid queue num %u/n",		    __func__, q);		return AH_FALSE;	}	qi = &ahp->ah_txq[q];	if (qi->tqi_type == HAL_TX_QUEUE_INACTIVE) {		HALDEBUG(ah, HAL_DEBUG_TXQUEUE, "%s: inactive queue %u/n",		    __func__, q);		return AH_TRUE;		/* XXX??? */	}	if (qi->tqi_cwmin == HAL_TXQ_USEDEFAULT) {		/*		 * Select cwmin according to channel type.		 * NB: chan can be NULL during attach		 */		if (chan && IEEE80211_IS_CHAN_B(chan))			chanCwMin = INIT_CWMIN_11B;		else			chanCwMin = INIT_CWMIN;		/* make sure that the CWmin is of the form (2^n - 1) */		for (cwMin = 1; cwMin < chanCwMin; cwMin = (cwMin << 1) | 1)			;	} else		cwMin = qi->tqi_cwmin;	/* set cwMin/Max and AIFS values */	OS_REG_WRITE(ah, AR_DLCL_IFS(q),		  SM(cwMin, AR_D_LCL_IFS_CWMIN)		| SM(qi->tqi_cwmax, AR_D_LCL_IFS_CWMAX)		| SM(qi->tqi_aifs, AR_D_LCL_IFS_AIFS));	/* Set retry limit values */	OS_REG_WRITE(ah, AR_DRETRY_LIMIT(q), 		   SM(INIT_SSH_RETRY, AR_D_RETRY_LIMIT_STA_SH)		 | SM(INIT_SLG_RETRY, AR_D_RETRY_LIMIT_STA_LG)		 | SM(qi->tqi_lgretry, AR_D_RETRY_LIMIT_FR_LG)		 | SM(qi->tqi_shretry, AR_D_RETRY_LIMIT_FR_SH)	);	/* enable early termination on the QCU */	OS_REG_WRITE(ah, AR_QMISC(q), AR_Q_MISC_DCU_EARLY_TERM_REQ);	if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_OAHU) {		/* Configure DCU to use the global sequence count */		OS_REG_WRITE(ah, AR_DMISC(q), AR5311_D_MISC_SEQ_NUM_CONTROL);	}	/* multiqueue support */	if (qi->tqi_cbrPeriod) {		OS_REG_WRITE(ah, AR_QCBRCFG(q), 			  SM(qi->tqi_cbrPeriod,AR_Q_CBRCFG_CBR_INTERVAL)			| SM(qi->tqi_cbrOverflowLimit, AR_Q_CBRCFG_CBR_OVF_THRESH));		OS_REG_WRITE(ah, AR_QMISC(q),			OS_REG_READ(ah, AR_QMISC(q)) |			AR_Q_MISC_FSP_CBR |			(qi->tqi_cbrOverflowLimit ?				AR_Q_MISC_CBR_EXP_CNTR_LIMIT : 0));	}	if (qi->tqi_readyTime) {		OS_REG_WRITE(ah, AR_QRDYTIMECFG(q),			SM(qi->tqi_readyTime, AR_Q_RDYTIMECFG_INT) | 			AR_Q_RDYTIMECFG_EN);	}	if (qi->tqi_burstTime) {		OS_REG_WRITE(ah, AR_DCHNTIME(q),			SM(qi->tqi_burstTime, AR_D_CHNTIME_DUR) |			AR_D_CHNTIME_EN);		if (qi->tqi_qflags & HAL_TXQ_RDYTIME_EXP_POLICY_ENABLE) {			OS_REG_WRITE(ah, AR_QMISC(q),			     OS_REG_READ(ah, AR_QMISC(q)) |			     AR_Q_MISC_RDYTIME_EXP_POLICY);		}	}	if (qi->tqi_qflags & HAL_TXQ_BACKOFF_DISABLE) {		OS_REG_WRITE(ah, AR_DMISC(q),			OS_REG_READ(ah, AR_DMISC(q)) |			AR_D_MISC_POST_FR_BKOFF_DIS);	}	if (qi->tqi_qflags & HAL_TXQ_FRAG_BURST_BACKOFF_ENABLE) {		OS_REG_WRITE(ah, AR_DMISC(q),			OS_REG_READ(ah, AR_DMISC(q)) |			AR_D_MISC_FRAG_BKOFF_EN);	}	switch (qi->tqi_type) {	case HAL_TX_QUEUE_BEACON:		/* Configure QCU for beacons */		OS_REG_WRITE(ah, AR_QMISC(q),//.........这里部分代码省略.........

//.........这里部分代码省略.........			       AR_PHY_DAG_CTRLCCK_EN_RSSI_THR);		OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK,				 AR_PHY_DAG_CTRLCCK_RSSI_THR, 2);				/* Set the mute mask to the correct default */		OS_REG_WRITE(ah, AR_SEQ_MASK, 0x0000000F);	}		if (AH_PRIVATE(ah)->ah_phyRev >= AR_PHY_CHIP_ID_REV_3) {		/* Clear reg to alllow RX_CLEAR line debug */		OS_REG_WRITE(ah, AR_PHY_BLUETOOTH,  0);	}	if (AH_PRIVATE(ah)->ah_phyRev >= AR_PHY_CHIP_ID_REV_4) {#ifdef notyet		/* Enable burst prefetch for the data queues */		OS_REG_RMW_FIELD(ah, AR_D_FPCTL, ... );		/* Enable double-buffering */		OS_REG_CLR_BIT(ah, AR_TXCFG, AR_TXCFG_DBL_BUF_DIS);#endif	}	if (IS_5312_2_X(ah)) {		/* ADC_CTRL */		OS_REG_WRITE(ah, AR_PHY_SIGMA_DELTA,			     SM(2, AR_PHY_SIGMA_DELTA_ADC_SEL) |			     SM(4, AR_PHY_SIGMA_DELTA_FILT2) |			     SM(0x16, AR_PHY_SIGMA_DELTA_FILT1) |			     SM(0, AR_PHY_SIGMA_DELTA_ADC_CLIP));		if (IEEE80211_IS_CHAN_2GHZ(chan))			OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, AR_PHY_RXGAIN_TXRX_RF_MAX, 0x0F);		/* CCK Short parameter adjustment in 11B mode */		if (IEEE80211_IS_CHAN_B(chan))			OS_REG_RMW_FIELD(ah, AR_PHY_CCK_RXCTRL4, AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT, 12);		/* Set ADC/DAC select values */		OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x04);		/* Increase 11A AGC Settling */		if (IEEE80211_IS_CHAN_A(chan))			OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_AGC, 32);	} else {		/* Set ADC/DAC select values */		OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x0e);	}	/* Setup the transmit power values. */	if (!ar5212SetTransmitPower(ah, chan, rfXpdGain)) {		HALDEBUG(ah, HAL_DEBUG_ANY,		    "%s: error init'ing transmit power/n", __func__);		FAIL(HAL_EIO);	}	/* Write the analog registers */	if (!ahp->ah_rfHal->setRfRegs(ah, chan, modesIndex, rfXpdGain)) {		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: ar5212SetRfRegs failed/n",		    __func__);		FAIL(HAL_EIO);	}	/* Write delta slope for OFDM enabled modes (A, G, Turbo) */	if (IEEE80211_IS_CHAN_OFDM(chan)) {		if (IS_5413(ah) ||		   AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER5_3)			ar5212SetSpurMitigation(ah, chan);